2018-02-20 11:41:55 +01:00
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using ChocolArm64.State;
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2018-05-12 01:10:27 +02:00
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2018-02-20 11:41:55 +01:00
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using NUnit.Framework;
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2018-05-12 01:10:27 +02:00
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using System.Runtime.Intrinsics;
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using System.Runtime.Intrinsics.X86;
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2018-02-20 11:41:55 +01:00
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namespace Ryujinx.Tests.Cpu
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{
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2018-02-23 13:29:20 +01:00
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public class CpuTestSimdMove : CpuTest
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2018-02-20 11:41:55 +01:00
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{
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2018-06-18 19:55:26 +02:00
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[Test, Description("TRN1 V0.4S, V1.4S, V2.4S")]
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2018-04-12 16:52:00 +02:00
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public void Trn1_V_4S([Random(2)] uint A0, [Random(2)] uint A1, [Random(2)] uint A2, [Random(2)] uint A3,
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[Random(2)] uint B0, [Random(2)] uint B1, [Random(2)] uint B2, [Random(2)] uint B3)
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{
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uint Opcode = 0x4E822820;
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2018-05-12 01:10:27 +02:00
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Vector128<float> V1 = Sse.StaticCast<uint, float>(Sse2.SetVector128(A3, A2, A1, A0));
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Vector128<float> V2 = Sse.StaticCast<uint, float>(Sse2.SetVector128(B3, B2, B1, B0));
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2018-04-12 16:52:00 +02:00
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AThreadState ThreadState = SingleOpcode(Opcode, V1: V1, V2: V2);
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2018-05-12 01:10:27 +02:00
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Sse41.Extract(Sse.StaticCast<float, uint>(ThreadState.V0), (byte)0);
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Assert.That(Sse41.Extract(Sse.StaticCast<float, uint>(ThreadState.V0), (byte)0), Is.EqualTo(A0));
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Assert.That(Sse41.Extract(Sse.StaticCast<float, uint>(ThreadState.V0), (byte)1), Is.EqualTo(B0));
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Assert.That(Sse41.Extract(Sse.StaticCast<float, uint>(ThreadState.V0), (byte)2), Is.EqualTo(A2));
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Assert.That(Sse41.Extract(Sse.StaticCast<float, uint>(ThreadState.V0), (byte)3), Is.EqualTo(B2));
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2018-04-12 16:52:00 +02:00
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}
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2018-06-18 19:55:26 +02:00
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[Test, Description("TRN1 V0.8B, V1.8B, V2.8B")]
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2018-04-12 16:52:00 +02:00
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public void Trn1_V_8B([Random(2)] byte A0, [Random(1)] byte A1, [Random(2)] byte A2, [Random(1)] byte A3,
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[Random(2)] byte A4, [Random(1)] byte A5, [Random(2)] byte A6, [Random(1)] byte A7,
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[Random(2)] byte B0, [Random(1)] byte B1, [Random(2)] byte B2, [Random(1)] byte B3,
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[Random(2)] byte B4, [Random(1)] byte B5, [Random(2)] byte B6, [Random(1)] byte B7)
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{
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uint Opcode = 0x0E022820;
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2018-05-12 01:10:27 +02:00
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Vector128<float> V1 = Sse.StaticCast<byte, float>(Sse2.SetVector128(0, 0, 0, 0, 0, 0, 0, 0, A7, A6, A5, A4, A3, A2, A1, A0));
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Vector128<float> V2 = Sse.StaticCast<byte, float>(Sse2.SetVector128(0, 0, 0, 0, 0, 0, 0, 0, B7, B6, B5, B4, B3, B2, B1, B0));
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2018-04-12 16:52:00 +02:00
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AThreadState ThreadState = SingleOpcode(Opcode, V1: V1, V2: V2);
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2018-05-12 01:10:27 +02:00
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Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)0), Is.EqualTo(A0));
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Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)1), Is.EqualTo(B0));
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Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)2), Is.EqualTo(A2));
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Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)3), Is.EqualTo(B2));
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Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)4), Is.EqualTo(A4));
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Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)5), Is.EqualTo(B4));
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Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)6), Is.EqualTo(A6));
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Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)7), Is.EqualTo(B6));
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2018-04-12 16:52:00 +02:00
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}
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2018-06-18 19:55:26 +02:00
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[Test, Description("TRN2 V0.4S, V1.4S, V2.4S")]
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2018-04-12 16:52:00 +02:00
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public void Trn2_V_4S([Random(2)] uint A0, [Random(2)] uint A1, [Random(2)] uint A2, [Random(2)] uint A3,
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[Random(2)] uint B0, [Random(2)] uint B1, [Random(2)] uint B2, [Random(2)] uint B3)
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{
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uint Opcode = 0x4E826820;
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2018-05-12 01:10:27 +02:00
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Vector128<float> V1 = Sse.StaticCast<uint, float>(Sse2.SetVector128(A3, A2, A1, A0));
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Vector128<float> V2 = Sse.StaticCast<uint, float>(Sse2.SetVector128(B3, B2, B1, B0));
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2018-04-12 16:52:00 +02:00
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AThreadState ThreadState = SingleOpcode(Opcode, V1: V1, V2: V2);
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2018-05-12 01:10:27 +02:00
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Assert.That(Sse41.Extract(Sse.StaticCast<float, uint>(ThreadState.V0), (byte)0), Is.EqualTo(A1));
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Assert.That(Sse41.Extract(Sse.StaticCast<float, uint>(ThreadState.V0), (byte)1), Is.EqualTo(B1));
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Assert.That(Sse41.Extract(Sse.StaticCast<float, uint>(ThreadState.V0), (byte)2), Is.EqualTo(A3));
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Assert.That(Sse41.Extract(Sse.StaticCast<float, uint>(ThreadState.V0), (byte)3), Is.EqualTo(B3));
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2018-04-12 16:52:00 +02:00
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}
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2018-06-18 19:55:26 +02:00
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[Test, Description("TRN2 V0.8B, V1.8B, V2.8B")]
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2018-04-12 16:52:00 +02:00
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public void Trn2_V_8B([Random(1)] byte A0, [Random(2)] byte A1, [Random(1)] byte A2, [Random(2)] byte A3,
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[Random(1)] byte A4, [Random(2)] byte A5, [Random(1)] byte A6, [Random(2)] byte A7,
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[Random(1)] byte B0, [Random(2)] byte B1, [Random(1)] byte B2, [Random(2)] byte B3,
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[Random(1)] byte B4, [Random(2)] byte B5, [Random(1)] byte B6, [Random(2)] byte B7)
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{
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uint Opcode = 0x0E026820;
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2018-05-12 01:10:27 +02:00
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Vector128<float> V1 = Sse.StaticCast<byte, float>(Sse2.SetVector128(0, 0, 0, 0, 0, 0, 0, 0, A7, A6, A5, A4, A3, A2, A1, A0));
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Vector128<float> V2 = Sse.StaticCast<byte, float>(Sse2.SetVector128(0, 0, 0, 0, 0, 0, 0, 0, B7, B6, B5, B4, B3, B2, B1, B0));
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2018-04-12 16:52:00 +02:00
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AThreadState ThreadState = SingleOpcode(Opcode, V1: V1, V2: V2);
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2018-05-12 01:10:27 +02:00
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Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)0), Is.EqualTo(A1));
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Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)1), Is.EqualTo(B1));
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Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)2), Is.EqualTo(A3));
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Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)3), Is.EqualTo(B3));
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Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)4), Is.EqualTo(A5));
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Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)5), Is.EqualTo(B5));
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Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)6), Is.EqualTo(A7));
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Assert.That(Sse41.Extract(Sse.StaticCast<float, byte>(ThreadState.V0), (byte)7), Is.EqualTo(B7));
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2018-04-12 16:52:00 +02:00
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}
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2018-02-20 11:41:55 +01:00
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[TestCase(0u, 0u, 0x2313221221112010ul, 0x0000000000000000ul)]
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[TestCase(1u, 0u, 0x2313221221112010ul, 0x2717261625152414ul)]
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[TestCase(0u, 1u, 0x2322131221201110ul, 0x0000000000000000ul)]
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[TestCase(1u, 1u, 0x2322131221201110ul, 0x2726171625241514ul)]
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[TestCase(0u, 2u, 0x2322212013121110ul, 0x0000000000000000ul)]
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[TestCase(1u, 2u, 0x2322212013121110ul, 0x2726252417161514ul)]
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[TestCase(1u, 3u, 0x1716151413121110ul, 0x2726252423222120ul)]
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public void Zip1_V(uint Q, uint size, ulong Result_0, ulong Result_1)
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{
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// ZIP1 V0.<T>, V1.<T>, V2.<T>
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uint Opcode = 0x0E023820 | (Q << 30) | (size << 22);
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2018-05-12 01:10:27 +02:00
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Vector128<float> V1 = MakeVectorE0E1(0x1716151413121110, 0x1F1E1D1C1B1A1918);
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Vector128<float> V2 = MakeVectorE0E1(0x2726252423222120, 0x2F2E2D2C2B2A2928);
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2018-02-20 11:41:55 +01:00
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AThreadState ThreadState = SingleOpcode(Opcode, V1: V1, V2: V2);
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2018-05-12 01:10:27 +02:00
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Assert.AreEqual(Result_0, GetVectorE0(ThreadState.V0));
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Assert.AreEqual(Result_1, GetVectorE1(ThreadState.V0));
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2018-02-20 11:41:55 +01:00
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}
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[TestCase(0u, 0u, 0x2717261625152414ul, 0x0000000000000000ul)]
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[TestCase(1u, 0u, 0x2B1B2A1A29192818ul, 0x2F1F2E1E2D1D2C1Cul)]
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[TestCase(0u, 1u, 0x2726171625241514ul, 0x0000000000000000ul)]
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[TestCase(1u, 1u, 0x2B2A1B1A29281918ul, 0x2F2E1F1E2D2C1D1Cul)]
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[TestCase(0u, 2u, 0x2726252417161514ul, 0x0000000000000000ul)]
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[TestCase(1u, 2u, 0x2B2A29281B1A1918ul, 0x2F2E2D2C1F1E1D1Cul)]
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[TestCase(1u, 3u, 0x1F1E1D1C1B1A1918ul, 0x2F2E2D2C2B2A2928ul)]
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public void Zip2_V(uint Q, uint size, ulong Result_0, ulong Result_1)
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{
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// ZIP2 V0.<T>, V1.<T>, V2.<T>
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uint Opcode = 0x0E027820 | (Q << 30) | (size << 22);
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2018-05-12 01:10:27 +02:00
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Vector128<float> V1 = MakeVectorE0E1(0x1716151413121110, 0x1F1E1D1C1B1A1918);
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Vector128<float> V2 = MakeVectorE0E1(0x2726252423222120, 0x2F2E2D2C2B2A2928);
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2018-02-20 11:41:55 +01:00
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AThreadState ThreadState = SingleOpcode(Opcode, V1: V1, V2: V2);
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2018-05-12 01:10:27 +02:00
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Assert.AreEqual(Result_0, GetVectorE0(ThreadState.V0));
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Assert.AreEqual(Result_1, GetVectorE1(ThreadState.V0));
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2018-02-20 11:41:55 +01:00
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}
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}
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}
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