2018-02-09 04:26:20 +01:00
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using ChocolArm64.Exceptions;
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2018-02-05 00:08:20 +01:00
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using ChocolArm64.State;
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using System;
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using System.Collections.Generic;
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2018-06-04 21:11:11 +02:00
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using System.Runtime.CompilerServices;
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2018-03-10 03:12:57 +01:00
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using System.Runtime.InteropServices;
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2018-05-12 01:10:27 +02:00
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using System.Runtime.Intrinsics;
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using System.Runtime.Intrinsics.X86;
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2018-06-22 04:05:42 +02:00
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using System.Threading;
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2018-02-05 00:08:20 +01:00
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namespace ChocolArm64.Memory
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{
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NvServices refactoring (#120)
* Initial implementation of NvMap/NvHostCtrl
* More work on NvHostCtrl
* Refactoring of nvservices, move GPU Vmm, make Vmm per-process, refactor most gpu devices, move Gpu to Core, fix CbBind
* Implement GetGpuTime, support CancelSynchronization, fix issue on InsertWaitingMutex, proper double buffering support (again, not working properly for commercial games, only hb)
* Try to fix perf regression reading/writing textures, moved syncpts and events to a UserCtx class, delete global state when the process exits, other minor tweaks
* Remove now unused code, add comment about probably wrong result codes
2018-05-07 20:53:23 +02:00
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public unsafe class AMemory : IAMemory, IDisposable
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2018-02-05 00:08:20 +01:00
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{
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2018-02-18 20:28:07 +01:00
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private const long ErgMask = (4 << AThreadState.ErgSizeLog2) - 1;
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2018-02-06 16:15:08 +01:00
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2018-02-05 00:08:20 +01:00
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public AMemoryMgr Manager { get; private set; }
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2018-06-22 04:05:42 +02:00
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private class ArmMonitor
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2018-02-05 00:08:20 +01:00
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{
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2018-06-22 04:05:42 +02:00
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public long Position;
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public bool ExState;
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2018-02-05 00:08:20 +01:00
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public bool HasExclusiveAccess(long Position)
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{
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return this.Position == Position && ExState;
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}
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}
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2018-06-22 04:05:42 +02:00
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private Dictionary<int, ArmMonitor> Monitors;
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2018-02-05 00:08:20 +01:00
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2018-03-10 03:12:57 +01:00
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public IntPtr Ram { get; private set; }
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2018-02-05 00:08:20 +01:00
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private byte* RamPtr;
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2018-07-08 21:55:15 +02:00
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private int HostPageSize;
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2018-03-10 03:12:57 +01:00
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public AMemory()
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2018-02-05 00:08:20 +01:00
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{
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2018-02-28 00:45:07 +01:00
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Manager = new AMemoryMgr();
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2018-02-05 00:08:20 +01:00
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2018-06-22 04:05:42 +02:00
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Monitors = new Dictionary<int, ArmMonitor>();
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2018-02-05 00:08:20 +01:00
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2018-07-08 21:55:15 +02:00
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IntPtr Size = (IntPtr)AMemoryMgr.RamSize + AMemoryMgr.PageSize;
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2018-06-09 02:15:56 +02:00
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if (RuntimeInformation.IsOSPlatform(OSPlatform.Windows))
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{
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2018-07-08 21:55:15 +02:00
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Ram = AMemoryWin32.Allocate(Size);
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HostPageSize = AMemoryWin32.GetPageSize(Ram, Size);
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2018-06-09 02:15:56 +02:00
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}
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else
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{
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2018-07-08 21:55:15 +02:00
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Ram = Marshal.AllocHGlobal(Size);
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2018-06-09 02:15:56 +02:00
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}
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2018-03-10 03:12:57 +01:00
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2018-02-05 00:08:20 +01:00
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RamPtr = (byte*)Ram;
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}
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2018-06-22 04:05:42 +02:00
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public void RemoveMonitor(AThreadState State)
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2018-02-05 00:08:20 +01:00
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{
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lock (Monitors)
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{
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2018-06-22 04:05:42 +02:00
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ClearExclusive(State);
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2018-02-06 16:15:08 +01:00
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2018-06-22 04:05:42 +02:00
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Monitors.Remove(State.ThreadId);
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2018-02-05 00:08:20 +01:00
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}
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}
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2018-02-18 20:28:07 +01:00
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public void SetExclusive(AThreadState ThreadState, long Position)
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2018-02-05 00:08:20 +01:00
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{
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2018-02-14 03:43:08 +01:00
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Position &= ~ErgMask;
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2018-02-05 00:08:20 +01:00
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lock (Monitors)
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{
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2018-06-22 04:05:42 +02:00
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foreach (ArmMonitor Mon in Monitors.Values)
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2018-02-05 00:08:20 +01:00
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{
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2018-06-22 04:05:42 +02:00
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if (Mon.Position == Position && Mon.ExState)
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{
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Mon.ExState = false;
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}
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2018-02-05 00:08:20 +01:00
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}
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2018-06-22 04:05:42 +02:00
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if (!Monitors.TryGetValue(ThreadState.ThreadId, out ArmMonitor ThreadMon))
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2018-02-05 00:08:20 +01:00
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{
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2018-06-22 04:05:42 +02:00
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ThreadMon = new ArmMonitor();
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Monitors.Add(ThreadState.ThreadId, ThreadMon);
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2018-02-05 00:08:20 +01:00
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}
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2018-06-22 04:05:42 +02:00
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ThreadMon.Position = Position;
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ThreadMon.ExState = true;
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2018-02-05 00:08:20 +01:00
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}
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}
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2018-02-18 20:28:07 +01:00
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public bool TestExclusive(AThreadState ThreadState, long Position)
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2018-02-05 00:08:20 +01:00
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{
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2018-06-22 04:05:42 +02:00
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//Note: Any call to this method also should be followed by a
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//call to ClearExclusiveForStore if this method returns true.
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2018-02-14 03:43:08 +01:00
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Position &= ~ErgMask;
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2018-06-22 04:05:42 +02:00
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Monitor.Enter(Monitors);
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if (!Monitors.TryGetValue(ThreadState.ThreadId, out ArmMonitor ThreadMon))
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2018-02-05 00:08:20 +01:00
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{
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2018-06-22 04:05:42 +02:00
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return false;
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}
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bool ExState = ThreadMon.HasExclusiveAccess(Position);
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2018-02-05 00:08:20 +01:00
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2018-06-22 04:05:42 +02:00
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if (!ExState)
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{
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Monitor.Exit(Monitors);
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2018-02-05 00:08:20 +01:00
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}
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2018-06-22 04:05:42 +02:00
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return ExState;
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2018-02-05 00:08:20 +01:00
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}
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2018-06-22 04:05:42 +02:00
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public void ClearExclusiveForStore(AThreadState ThreadState)
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2018-02-05 00:08:20 +01:00
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{
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2018-06-22 04:05:42 +02:00
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if (Monitors.TryGetValue(ThreadState.ThreadId, out ArmMonitor ThreadMon))
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2018-02-05 00:08:20 +01:00
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{
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2018-06-22 04:05:42 +02:00
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ThreadMon.ExState = false;
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2018-02-05 00:08:20 +01:00
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}
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2018-06-22 04:05:42 +02:00
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Monitor.Exit(Monitors);
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2018-02-05 00:08:20 +01:00
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}
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2018-06-22 04:05:42 +02:00
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public void ClearExclusive(AThreadState ThreadState)
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2018-02-14 03:43:08 +01:00
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{
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lock (Monitors)
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{
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2018-06-22 04:05:42 +02:00
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if (Monitors.TryGetValue(ThreadState.ThreadId, out ArmMonitor ThreadMon))
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{
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ThreadMon.ExState = false;
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}
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2018-02-14 03:43:08 +01:00
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}
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}
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2018-06-22 04:05:42 +02:00
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public void WriteInt32ToSharedAddr(long Position, int Value)
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2018-02-14 03:43:08 +01:00
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{
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2018-06-22 04:05:42 +02:00
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long MaskedPosition = Position & ~ErgMask;
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2018-02-14 03:43:08 +01:00
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lock (Monitors)
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{
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2018-06-22 04:05:42 +02:00
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foreach (ArmMonitor Mon in Monitors.Values)
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{
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if (Mon.Position == MaskedPosition && Mon.ExState)
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{
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Mon.ExState = false;
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}
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}
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WriteInt32(Position, Value);
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2018-02-14 03:43:08 +01:00
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}
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}
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2018-07-08 21:55:15 +02:00
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public int GetHostPageSize()
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2018-06-09 02:15:56 +02:00
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{
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2018-07-08 21:55:15 +02:00
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return HostPageSize;
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2018-06-09 02:15:56 +02:00
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}
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2018-07-29 06:39:15 +02:00
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public (bool[], long) IsRegionModified(long Position, long Size)
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2018-06-09 02:15:56 +02:00
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{
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if (!RuntimeInformation.IsOSPlatform(OSPlatform.Windows))
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{
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2018-07-29 06:39:15 +02:00
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return (null, 0);
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2018-06-09 02:15:56 +02:00
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}
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long EndPos = Position + Size;
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if ((ulong)EndPos < (ulong)Position)
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{
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2018-07-29 06:39:15 +02:00
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return (null, 0);
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2018-06-09 02:15:56 +02:00
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}
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if ((ulong)EndPos > AMemoryMgr.RamSize)
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{
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2018-07-29 06:39:15 +02:00
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return (null, 0);
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2018-06-09 02:15:56 +02:00
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}
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IntPtr MemAddress = new IntPtr(RamPtr + Position);
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IntPtr MemSize = new IntPtr(Size);
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2018-07-08 21:55:15 +02:00
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int HostPageMask = HostPageSize - 1;
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Position &= ~HostPageMask;
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Size = EndPos - Position;
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IntPtr[] Addresses = new IntPtr[(Size + HostPageMask) / HostPageSize];
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AMemoryWin32.IsRegionModified(MemAddress, MemSize, Addresses, out int Count);
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bool[] Modified = new bool[Addresses.Length];
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for (int Index = 0; Index < Count; Index++)
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{
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long VA = Addresses[Index].ToInt64() - Ram.ToInt64();
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Modified[(VA - Position) / HostPageSize] = true;
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}
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2018-07-29 06:39:15 +02:00
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return (Modified, Count);
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2018-06-09 02:15:56 +02:00
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}
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2018-07-19 21:02:51 +02:00
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public IntPtr GetHostAddress(long Position, long Size)
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{
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EnsureRangeIsValid(Position, Size, AMemoryPerm.Read);
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return (IntPtr)(RamPtr + (ulong)Position);
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}
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2018-03-11 00:39:16 +01:00
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public sbyte ReadSByte(long Position)
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{
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return (sbyte)ReadByte(Position);
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}
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public short ReadInt16(long Position)
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{
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return (short)ReadUInt16(Position);
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}
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public int ReadInt32(long Position)
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{
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return (int)ReadUInt32(Position);
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}
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public long ReadInt64(long Position)
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{
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return (long)ReadUInt64(Position);
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}
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2018-02-05 00:08:20 +01:00
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public byte ReadByte(long Position)
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{
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2018-02-09 04:26:20 +01:00
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EnsureAccessIsValid(Position, AMemoryPerm.Read);
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2018-03-11 00:39:16 +01:00
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return ReadByteUnchecked(Position);
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2018-02-05 00:08:20 +01:00
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}
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public ushort ReadUInt16(long Position)
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{
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2018-03-10 03:12:57 +01:00
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EnsureAccessIsValid(Position + 0, AMemoryPerm.Read);
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EnsureAccessIsValid(Position + 1, AMemoryPerm.Read);
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2018-02-09 04:26:20 +01:00
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2018-03-11 00:39:16 +01:00
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return ReadUInt16Unchecked(Position);
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2018-02-05 00:08:20 +01:00
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}
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public uint ReadUInt32(long Position)
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{
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2018-03-10 03:12:57 +01:00
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EnsureAccessIsValid(Position + 0, AMemoryPerm.Read);
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EnsureAccessIsValid(Position + 3, AMemoryPerm.Read);
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2018-02-09 04:26:20 +01:00
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2018-03-11 00:39:16 +01:00
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return ReadUInt32Unchecked(Position);
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2018-02-05 00:08:20 +01:00
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}
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public ulong ReadUInt64(long Position)
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{
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2018-03-10 03:12:57 +01:00
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EnsureAccessIsValid(Position + 0, AMemoryPerm.Read);
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EnsureAccessIsValid(Position + 7, AMemoryPerm.Read);
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2018-02-09 04:26:20 +01:00
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2018-03-11 00:39:16 +01:00
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return ReadUInt64Unchecked(Position);
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2018-02-05 00:08:20 +01:00
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}
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2018-05-12 01:10:27 +02:00
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public Vector128<float> ReadVector8(long Position)
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2018-02-17 22:06:11 +01:00
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{
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2018-05-12 01:10:27 +02:00
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if (Sse2.IsSupported)
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{
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return Sse.StaticCast<byte, float>(Sse2.SetVector128(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ReadByte(Position)));
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}
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else
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{
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throw new PlatformNotSupportedException();
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}
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2018-02-17 22:06:11 +01:00
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}
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2018-05-12 01:10:27 +02:00
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public Vector128<float> ReadVector16(long Position)
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2018-02-17 22:06:11 +01:00
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{
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2018-05-12 01:10:27 +02:00
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if (Sse2.IsSupported)
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{
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return Sse.StaticCast<ushort, float>(Sse2.Insert(Sse2.SetZeroVector128<ushort>(), ReadUInt16(Position), 0));
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}
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else
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{
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throw new PlatformNotSupportedException();
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}
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2018-02-17 22:06:11 +01:00
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}
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2018-05-12 01:10:27 +02:00
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public Vector128<float> ReadVector32(long Position)
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2018-02-17 22:06:11 +01:00
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{
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2018-05-12 01:10:27 +02:00
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EnsureAccessIsValid(Position + 0, AMemoryPerm.Read);
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EnsureAccessIsValid(Position + 3, AMemoryPerm.Read);
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if (Sse.IsSupported)
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{
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return Sse.LoadScalarVector128((float*)(RamPtr + (uint)Position));
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}
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else
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{
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throw new PlatformNotSupportedException();
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}
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2018-02-17 22:06:11 +01:00
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}
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2018-05-12 01:10:27 +02:00
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public Vector128<float> ReadVector64(long Position)
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2018-02-17 22:06:11 +01:00
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{
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2018-05-12 01:10:27 +02:00
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EnsureAccessIsValid(Position + 0, AMemoryPerm.Read);
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EnsureAccessIsValid(Position + 7, AMemoryPerm.Read);
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if (Sse2.IsSupported)
|
|
|
|
{
|
|
|
|
return Sse.StaticCast<double, float>(Sse2.LoadScalarVector128((double*)(RamPtr + (uint)Position)));
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
2018-02-17 22:06:11 +01:00
|
|
|
}
|
|
|
|
|
2018-05-12 01:10:27 +02:00
|
|
|
public Vector128<float> ReadVector128(long Position)
|
2018-02-05 00:08:20 +01:00
|
|
|
{
|
2018-05-12 01:10:27 +02:00
|
|
|
EnsureAccessIsValid(Position + 0, AMemoryPerm.Read);
|
|
|
|
EnsureAccessIsValid(Position + 15, AMemoryPerm.Read);
|
|
|
|
|
|
|
|
if (Sse.IsSupported)
|
|
|
|
{
|
|
|
|
return Sse.LoadVector128((float*)(RamPtr + (uint)Position));
|
|
|
|
}
|
|
|
|
else
|
2018-02-05 00:08:20 +01:00
|
|
|
{
|
2018-05-12 01:10:27 +02:00
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
2018-02-05 00:08:20 +01:00
|
|
|
}
|
|
|
|
|
2018-03-11 00:39:16 +01:00
|
|
|
public sbyte ReadSByteUnchecked(long Position)
|
|
|
|
{
|
|
|
|
return (sbyte)ReadByteUnchecked(Position);
|
|
|
|
}
|
|
|
|
|
|
|
|
public short ReadInt16Unchecked(long Position)
|
|
|
|
{
|
|
|
|
return (short)ReadUInt16Unchecked(Position);
|
|
|
|
}
|
|
|
|
|
|
|
|
public int ReadInt32Unchecked(long Position)
|
|
|
|
{
|
|
|
|
return (int)ReadUInt32Unchecked(Position);
|
|
|
|
}
|
|
|
|
|
|
|
|
public long ReadInt64Unchecked(long Position)
|
|
|
|
{
|
|
|
|
return (long)ReadUInt64Unchecked(Position);
|
|
|
|
}
|
|
|
|
|
|
|
|
public byte ReadByteUnchecked(long Position)
|
|
|
|
{
|
|
|
|
return *((byte*)(RamPtr + (uint)Position));
|
|
|
|
}
|
|
|
|
|
|
|
|
public ushort ReadUInt16Unchecked(long Position)
|
|
|
|
{
|
|
|
|
return *((ushort*)(RamPtr + (uint)Position));
|
|
|
|
}
|
|
|
|
|
|
|
|
public uint ReadUInt32Unchecked(long Position)
|
|
|
|
{
|
|
|
|
return *((uint*)(RamPtr + (uint)Position));
|
|
|
|
}
|
|
|
|
|
|
|
|
public ulong ReadUInt64Unchecked(long Position)
|
|
|
|
{
|
|
|
|
return *((ulong*)(RamPtr + (uint)Position));
|
|
|
|
}
|
|
|
|
|
2018-05-12 01:10:27 +02:00
|
|
|
public Vector128<float> ReadVector8Unchecked(long Position)
|
2018-03-11 00:39:16 +01:00
|
|
|
{
|
2018-05-12 01:10:27 +02:00
|
|
|
if (Sse2.IsSupported)
|
|
|
|
{
|
|
|
|
return Sse.StaticCast<byte, float>(Sse2.SetVector128(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, ReadByte(Position)));
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
2018-03-11 00:39:16 +01:00
|
|
|
}
|
|
|
|
|
2018-06-04 21:11:11 +02:00
|
|
|
[MethodImpl(MethodImplOptions.AggressiveInlining)]
|
2018-05-12 01:10:27 +02:00
|
|
|
public Vector128<float> ReadVector16Unchecked(long Position)
|
2018-03-11 00:39:16 +01:00
|
|
|
{
|
2018-05-12 01:10:27 +02:00
|
|
|
if (Sse2.IsSupported)
|
|
|
|
{
|
|
|
|
return Sse.StaticCast<ushort, float>(Sse2.Insert(Sse2.SetZeroVector128<ushort>(), ReadUInt16Unchecked(Position), 0));
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
2018-03-11 00:39:16 +01:00
|
|
|
}
|
|
|
|
|
2018-06-09 04:49:53 +02:00
|
|
|
[MethodImpl(MethodImplOptions.NoInlining)]
|
2018-05-12 01:10:27 +02:00
|
|
|
public Vector128<float> ReadVector32Unchecked(long Position)
|
2018-03-11 00:39:16 +01:00
|
|
|
{
|
2018-05-12 01:10:27 +02:00
|
|
|
if (Sse.IsSupported)
|
|
|
|
{
|
2018-06-09 04:54:50 +02:00
|
|
|
return Sse.LoadScalarVector128((float*)(RamPtr + (uint)Position));
|
2018-05-12 01:10:27 +02:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
2018-03-11 00:39:16 +01:00
|
|
|
}
|
|
|
|
|
2018-06-09 04:49:53 +02:00
|
|
|
[MethodImpl(MethodImplOptions.NoInlining)]
|
2018-05-12 01:10:27 +02:00
|
|
|
public Vector128<float> ReadVector64Unchecked(long Position)
|
2018-03-11 00:39:16 +01:00
|
|
|
{
|
2018-05-12 01:10:27 +02:00
|
|
|
if (Sse2.IsSupported)
|
|
|
|
{
|
|
|
|
return Sse.StaticCast<double, float>(Sse2.LoadScalarVector128((double*)(RamPtr + (uint)Position)));
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
2018-03-11 00:39:16 +01:00
|
|
|
}
|
|
|
|
|
2018-06-04 21:11:11 +02:00
|
|
|
[MethodImpl(MethodImplOptions.AggressiveInlining)]
|
2018-05-12 01:10:27 +02:00
|
|
|
public Vector128<float> ReadVector128Unchecked(long Position)
|
2018-03-11 00:39:16 +01:00
|
|
|
{
|
2018-05-12 01:10:27 +02:00
|
|
|
if (Sse.IsSupported)
|
2018-03-11 00:39:16 +01:00
|
|
|
{
|
2018-06-09 04:54:50 +02:00
|
|
|
return Sse.LoadVector128((float*)(RamPtr + (uint)Position));
|
2018-05-12 01:10:27 +02:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
2018-03-11 00:39:16 +01:00
|
|
|
}
|
|
|
|
|
2018-06-09 18:05:41 +02:00
|
|
|
public byte[] ReadBytes(long Position, long Size)
|
|
|
|
{
|
|
|
|
if ((uint)Size > int.MaxValue)
|
|
|
|
{
|
|
|
|
throw new ArgumentOutOfRangeException(nameof(Size));
|
|
|
|
}
|
|
|
|
|
|
|
|
EnsureRangeIsValid(Position, Size, AMemoryPerm.Read);
|
|
|
|
|
|
|
|
byte[] Data = new byte[Size];
|
|
|
|
|
|
|
|
Marshal.Copy((IntPtr)(RamPtr + (uint)Position), Data, 0, (int)Size);
|
|
|
|
|
|
|
|
return Data;
|
|
|
|
}
|
|
|
|
|
2018-03-11 00:39:16 +01:00
|
|
|
public void WriteSByte(long Position, sbyte Value)
|
|
|
|
{
|
|
|
|
WriteByte(Position, (byte)Value);
|
|
|
|
}
|
|
|
|
|
|
|
|
public void WriteInt16(long Position, short Value)
|
|
|
|
{
|
|
|
|
WriteUInt16(Position, (ushort)Value);
|
|
|
|
}
|
|
|
|
|
|
|
|
public void WriteInt32(long Position, int Value)
|
|
|
|
{
|
|
|
|
WriteUInt32(Position, (uint)Value);
|
|
|
|
}
|
|
|
|
|
|
|
|
public void WriteInt64(long Position, long Value)
|
|
|
|
{
|
|
|
|
WriteUInt64(Position, (ulong)Value);
|
|
|
|
}
|
2018-02-05 00:08:20 +01:00
|
|
|
|
|
|
|
public void WriteByte(long Position, byte Value)
|
|
|
|
{
|
2018-02-09 04:26:20 +01:00
|
|
|
EnsureAccessIsValid(Position, AMemoryPerm.Write);
|
|
|
|
|
2018-03-11 00:39:16 +01:00
|
|
|
WriteByteUnchecked(Position, Value);
|
2018-02-05 00:08:20 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
public void WriteUInt16(long Position, ushort Value)
|
|
|
|
{
|
2018-03-10 03:12:57 +01:00
|
|
|
EnsureAccessIsValid(Position + 0, AMemoryPerm.Write);
|
|
|
|
EnsureAccessIsValid(Position + 1, AMemoryPerm.Write);
|
2018-02-09 04:26:20 +01:00
|
|
|
|
2018-03-11 00:39:16 +01:00
|
|
|
WriteUInt16Unchecked(Position, Value);
|
2018-02-05 00:08:20 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
public void WriteUInt32(long Position, uint Value)
|
|
|
|
{
|
2018-03-10 03:12:57 +01:00
|
|
|
EnsureAccessIsValid(Position + 0, AMemoryPerm.Write);
|
|
|
|
EnsureAccessIsValid(Position + 3, AMemoryPerm.Write);
|
2018-02-09 04:26:20 +01:00
|
|
|
|
2018-03-11 00:39:16 +01:00
|
|
|
WriteUInt32Unchecked(Position, Value);
|
2018-02-05 00:08:20 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
public void WriteUInt64(long Position, ulong Value)
|
|
|
|
{
|
2018-03-10 03:12:57 +01:00
|
|
|
EnsureAccessIsValid(Position + 0, AMemoryPerm.Write);
|
|
|
|
EnsureAccessIsValid(Position + 7, AMemoryPerm.Write);
|
2018-02-09 04:26:20 +01:00
|
|
|
|
2018-03-11 00:39:16 +01:00
|
|
|
WriteUInt64Unchecked(Position, Value);
|
2018-02-05 00:08:20 +01:00
|
|
|
}
|
|
|
|
|
2018-05-12 01:10:27 +02:00
|
|
|
public void WriteVector8(long Position, Vector128<float> Value)
|
2018-02-17 22:06:11 +01:00
|
|
|
{
|
2018-05-12 01:10:27 +02:00
|
|
|
if (Sse41.IsSupported)
|
|
|
|
{
|
|
|
|
WriteByte(Position, Sse41.Extract(Sse.StaticCast<float, byte>(Value), 0));
|
|
|
|
}
|
|
|
|
else if (Sse2.IsSupported)
|
|
|
|
{
|
|
|
|
WriteByte(Position, (byte)Sse2.Extract(Sse.StaticCast<float, ushort>(Value), 0));
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
2018-02-17 22:06:11 +01:00
|
|
|
}
|
|
|
|
|
2018-05-12 01:10:27 +02:00
|
|
|
public void WriteVector16(long Position, Vector128<float> Value)
|
2018-02-17 22:06:11 +01:00
|
|
|
{
|
2018-05-12 01:10:27 +02:00
|
|
|
if (Sse2.IsSupported)
|
|
|
|
{
|
|
|
|
WriteUInt16(Position, Sse2.Extract(Sse.StaticCast<float, ushort>(Value), 0));
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
2018-02-17 22:06:11 +01:00
|
|
|
}
|
|
|
|
|
2018-05-12 01:10:27 +02:00
|
|
|
public void WriteVector32(long Position, Vector128<float> Value)
|
2018-02-17 22:06:11 +01:00
|
|
|
{
|
2018-05-12 01:10:27 +02:00
|
|
|
EnsureAccessIsValid(Position + 0, AMemoryPerm.Write);
|
|
|
|
EnsureAccessIsValid(Position + 3, AMemoryPerm.Write);
|
|
|
|
|
|
|
|
if (Sse.IsSupported)
|
|
|
|
{
|
|
|
|
Sse.StoreScalar((float*)(RamPtr + (uint)Position), Value);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
2018-02-17 22:06:11 +01:00
|
|
|
}
|
|
|
|
|
2018-05-12 01:10:27 +02:00
|
|
|
public void WriteVector64(long Position, Vector128<float> Value)
|
2018-02-17 22:06:11 +01:00
|
|
|
{
|
2018-05-12 01:10:27 +02:00
|
|
|
EnsureAccessIsValid(Position + 0, AMemoryPerm.Write);
|
|
|
|
EnsureAccessIsValid(Position + 7, AMemoryPerm.Write);
|
|
|
|
|
|
|
|
if (Sse2.IsSupported)
|
|
|
|
{
|
|
|
|
Sse2.StoreScalar((double*)(RamPtr + (uint)Position), Sse.StaticCast<float, double>(Value));
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
2018-02-17 22:06:11 +01:00
|
|
|
}
|
|
|
|
|
2018-05-12 01:10:27 +02:00
|
|
|
public void WriteVector128(long Position, Vector128<float> Value)
|
2018-02-05 00:08:20 +01:00
|
|
|
{
|
2018-05-12 01:10:27 +02:00
|
|
|
EnsureAccessIsValid(Position + 0, AMemoryPerm.Write);
|
|
|
|
EnsureAccessIsValid(Position + 15, AMemoryPerm.Write);
|
|
|
|
|
|
|
|
if (Sse.IsSupported)
|
|
|
|
{
|
|
|
|
Sse.Store((float*)(RamPtr + (uint)Position), Value);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
2018-02-05 00:08:20 +01:00
|
|
|
}
|
|
|
|
|
2018-03-11 00:39:16 +01:00
|
|
|
public void WriteSByteUnchecked(long Position, sbyte Value)
|
|
|
|
{
|
|
|
|
WriteByteUnchecked(Position, (byte)Value);
|
|
|
|
}
|
|
|
|
|
|
|
|
public void WriteInt16Unchecked(long Position, short Value)
|
|
|
|
{
|
|
|
|
WriteUInt16Unchecked(Position, (ushort)Value);
|
|
|
|
}
|
|
|
|
|
|
|
|
public void WriteInt32Unchecked(long Position, int Value)
|
|
|
|
{
|
|
|
|
WriteUInt32Unchecked(Position, (uint)Value);
|
|
|
|
}
|
|
|
|
|
|
|
|
public void WriteInt64Unchecked(long Position, long Value)
|
|
|
|
{
|
|
|
|
WriteUInt64Unchecked(Position, (ulong)Value);
|
|
|
|
}
|
|
|
|
|
|
|
|
public void WriteByteUnchecked(long Position, byte Value)
|
|
|
|
{
|
|
|
|
*((byte*)(RamPtr + (uint)Position)) = Value;
|
|
|
|
}
|
|
|
|
|
|
|
|
public void WriteUInt16Unchecked(long Position, ushort Value)
|
|
|
|
{
|
|
|
|
*((ushort*)(RamPtr + (uint)Position)) = Value;
|
|
|
|
}
|
|
|
|
|
|
|
|
public void WriteUInt32Unchecked(long Position, uint Value)
|
|
|
|
{
|
|
|
|
*((uint*)(RamPtr + (uint)Position)) = Value;
|
|
|
|
}
|
|
|
|
|
|
|
|
public void WriteUInt64Unchecked(long Position, ulong Value)
|
|
|
|
{
|
|
|
|
*((ulong*)(RamPtr + (uint)Position)) = Value;
|
|
|
|
}
|
|
|
|
|
2018-06-04 21:11:11 +02:00
|
|
|
[MethodImpl(MethodImplOptions.AggressiveInlining)]
|
2018-05-12 01:10:27 +02:00
|
|
|
public void WriteVector8Unchecked(long Position, Vector128<float> Value)
|
2018-03-11 00:39:16 +01:00
|
|
|
{
|
2018-05-12 01:10:27 +02:00
|
|
|
if (Sse41.IsSupported)
|
|
|
|
{
|
|
|
|
WriteByteUnchecked(Position, Sse41.Extract(Sse.StaticCast<float, byte>(Value), 0));
|
|
|
|
}
|
|
|
|
else if (Sse2.IsSupported)
|
|
|
|
{
|
|
|
|
WriteByteUnchecked(Position, (byte)Sse2.Extract(Sse.StaticCast<float, ushort>(Value), 0));
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
2018-03-11 00:39:16 +01:00
|
|
|
}
|
|
|
|
|
2018-06-04 21:11:11 +02:00
|
|
|
[MethodImpl(MethodImplOptions.AggressiveInlining)]
|
2018-05-12 01:10:27 +02:00
|
|
|
public void WriteVector16Unchecked(long Position, Vector128<float> Value)
|
2018-03-11 00:39:16 +01:00
|
|
|
{
|
2018-05-12 01:10:27 +02:00
|
|
|
if (Sse2.IsSupported)
|
|
|
|
{
|
|
|
|
WriteUInt16Unchecked(Position, Sse2.Extract(Sse.StaticCast<float, ushort>(Value), 0));
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
2018-03-11 00:39:16 +01:00
|
|
|
}
|
|
|
|
|
2018-06-09 04:49:53 +02:00
|
|
|
[MethodImpl(MethodImplOptions.NoInlining)]
|
2018-05-12 01:10:27 +02:00
|
|
|
public void WriteVector32Unchecked(long Position, Vector128<float> Value)
|
2018-03-11 00:39:16 +01:00
|
|
|
{
|
2018-05-12 01:10:27 +02:00
|
|
|
if (Sse.IsSupported)
|
|
|
|
{
|
|
|
|
Sse.StoreScalar((float*)(RamPtr + (uint)Position), Value);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
2018-03-11 00:39:16 +01:00
|
|
|
}
|
|
|
|
|
2018-06-09 04:49:53 +02:00
|
|
|
[MethodImpl(MethodImplOptions.NoInlining)]
|
2018-05-12 01:10:27 +02:00
|
|
|
public void WriteVector64Unchecked(long Position, Vector128<float> Value)
|
2018-03-11 00:39:16 +01:00
|
|
|
{
|
2018-05-12 01:10:27 +02:00
|
|
|
if (Sse2.IsSupported)
|
|
|
|
{
|
|
|
|
Sse2.StoreScalar((double*)(RamPtr + (uint)Position), Sse.StaticCast<float, double>(Value));
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
2018-03-11 00:39:16 +01:00
|
|
|
}
|
|
|
|
|
2018-06-04 21:11:11 +02:00
|
|
|
[MethodImpl(MethodImplOptions.AggressiveInlining)]
|
2018-05-12 01:10:27 +02:00
|
|
|
public void WriteVector128Unchecked(long Position, Vector128<float> Value)
|
2018-03-11 00:39:16 +01:00
|
|
|
{
|
2018-05-12 01:10:27 +02:00
|
|
|
if (Sse.IsSupported)
|
|
|
|
{
|
|
|
|
Sse.Store((float*)(RamPtr + (uint)Position), Value);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
2018-03-11 00:39:16 +01:00
|
|
|
}
|
|
|
|
|
2018-06-09 18:05:41 +02:00
|
|
|
public void WriteBytes(long Position, byte[] Data)
|
2018-02-05 00:08:20 +01:00
|
|
|
{
|
2018-06-09 18:05:41 +02:00
|
|
|
EnsureRangeIsValid(Position, (uint)Data.Length, AMemoryPerm.Write);
|
2018-03-10 03:12:57 +01:00
|
|
|
|
2018-06-09 18:05:41 +02:00
|
|
|
Marshal.Copy(Data, 0, (IntPtr)(RamPtr + (uint)Position), Data.Length);
|
2018-03-10 03:12:57 +01:00
|
|
|
}
|
2018-02-09 04:26:20 +01:00
|
|
|
|
2018-06-09 02:15:02 +02:00
|
|
|
private void EnsureRangeIsValid(long Position, long Size, AMemoryPerm Perm)
|
|
|
|
{
|
2018-06-09 04:54:50 +02:00
|
|
|
long EndPos = Position + Size;
|
|
|
|
|
2018-06-09 18:05:41 +02:00
|
|
|
Position &= ~AMemoryMgr.PageMask;
|
|
|
|
|
2018-06-09 04:54:50 +02:00
|
|
|
while ((ulong)Position < (ulong)EndPos)
|
2018-06-09 02:15:02 +02:00
|
|
|
{
|
|
|
|
EnsureAccessIsValid(Position, Perm);
|
2018-06-09 04:54:50 +02:00
|
|
|
|
2018-06-09 02:15:02 +02:00
|
|
|
Position += AMemoryMgr.PageSize;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-06-09 18:05:41 +02:00
|
|
|
private void EnsureAccessIsValid(long Position, AMemoryPerm Perm)
|
|
|
|
{
|
|
|
|
if (!Manager.IsMapped(Position))
|
|
|
|
{
|
|
|
|
throw new VmmPageFaultException(Position);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!Manager.HasPermission(Position, Perm))
|
|
|
|
{
|
|
|
|
throw new VmmAccessViolationException(Position, Perm);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-03-10 03:12:57 +01:00
|
|
|
public void Dispose()
|
|
|
|
{
|
|
|
|
Dispose(true);
|
|
|
|
}
|
|
|
|
|
|
|
|
protected virtual void Dispose(bool disposing)
|
|
|
|
{
|
|
|
|
if (Ram != IntPtr.Zero)
|
2018-02-09 04:26:20 +01:00
|
|
|
{
|
2018-06-09 02:15:56 +02:00
|
|
|
if (RuntimeInformation.IsOSPlatform(OSPlatform.Windows))
|
|
|
|
{
|
|
|
|
AMemoryWin32.Free(Ram);
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
Marshal.FreeHGlobal(Ram);
|
|
|
|
}
|
2018-03-10 03:12:57 +01:00
|
|
|
|
|
|
|
Ram = IntPtr.Zero;
|
2018-02-09 04:26:20 +01:00
|
|
|
}
|
2018-02-05 00:08:20 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|