2018-10-31 02:43:02 +01:00
|
|
|
using ChocolArm64.Instructions;
|
|
|
|
using ChocolArm64.State;
|
|
|
|
using System;
|
|
|
|
|
|
|
|
namespace ChocolArm64.Decoders
|
|
|
|
{
|
|
|
|
class OpCode64 : IOpCode64
|
|
|
|
{
|
|
|
|
public long Position { get; private set; }
|
|
|
|
public int RawOpCode { get; private set; }
|
|
|
|
|
2019-01-25 02:59:53 +01:00
|
|
|
public int OpCodeSizeInBytes { get; protected set; } = 4;
|
|
|
|
|
|
|
|
public InstEmitter Emitter { get; protected set; }
|
|
|
|
public RegisterSize RegisterSize { get; protected set; }
|
2018-10-31 02:43:02 +01:00
|
|
|
|
|
|
|
public OpCode64(Inst inst, long position, int opCode)
|
|
|
|
{
|
|
|
|
Position = position;
|
|
|
|
RawOpCode = opCode;
|
|
|
|
|
|
|
|
RegisterSize = RegisterSize.Int64;
|
|
|
|
|
2019-01-25 02:59:53 +01:00
|
|
|
Emitter = inst.Emitter;
|
2018-10-31 02:43:02 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
public int GetBitsCount()
|
|
|
|
{
|
|
|
|
switch (RegisterSize)
|
|
|
|
{
|
|
|
|
case RegisterSize.Int32: return 32;
|
|
|
|
case RegisterSize.Int64: return 64;
|
|
|
|
case RegisterSize.Simd64: return 64;
|
|
|
|
case RegisterSize.Simd128: return 128;
|
|
|
|
}
|
|
|
|
|
|
|
|
throw new InvalidOperationException();
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|