2018-02-23 13:29:20 +01:00
|
|
|
using ChocolArm64;
|
2018-02-16 01:04:38 +01:00
|
|
|
using ChocolArm64.Memory;
|
|
|
|
using ChocolArm64.State;
|
2018-06-18 19:55:26 +02:00
|
|
|
|
2018-02-16 01:04:38 +01:00
|
|
|
using NUnit.Framework;
|
2018-06-18 19:55:26 +02:00
|
|
|
|
2018-09-01 16:24:05 +02:00
|
|
|
using Ryujinx.Tests.Unicorn;
|
|
|
|
|
2018-05-12 01:10:27 +02:00
|
|
|
using System;
|
2018-08-15 20:59:51 +02:00
|
|
|
using System.Runtime.InteropServices;
|
2018-05-12 01:10:27 +02:00
|
|
|
using System.Runtime.Intrinsics;
|
|
|
|
using System.Runtime.Intrinsics.X86;
|
2018-06-11 02:46:42 +02:00
|
|
|
using System.Threading;
|
2018-02-16 01:04:38 +01:00
|
|
|
|
|
|
|
namespace Ryujinx.Tests.Cpu
|
|
|
|
{
|
|
|
|
[TestFixture]
|
2018-02-23 13:29:20 +01:00
|
|
|
public class CpuTest
|
2018-02-16 01:04:38 +01:00
|
|
|
{
|
2018-02-23 13:29:20 +01:00
|
|
|
protected long Position { get; private set; }
|
2018-11-01 05:22:09 +01:00
|
|
|
private long _size;
|
2018-02-23 13:29:20 +01:00
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
private long _entryPoint;
|
2018-02-23 13:29:20 +01:00
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
private IntPtr _ramPointer;
|
2018-08-15 20:59:51 +02:00
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
private MemoryManager _memory;
|
|
|
|
private CpuThread _thread;
|
2018-02-16 01:04:38 +01:00
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
private static bool _unicornAvailable;
|
|
|
|
private UnicornAArch64 _unicornEmu;
|
2018-09-01 16:24:05 +02:00
|
|
|
|
|
|
|
static CpuTest()
|
|
|
|
{
|
2018-11-01 05:22:09 +01:00
|
|
|
_unicornAvailable = UnicornAArch64.IsAvailable();
|
2018-09-08 19:23:07 +02:00
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
if (!_unicornAvailable)
|
2018-09-01 16:24:05 +02:00
|
|
|
{
|
2018-09-08 19:23:07 +02:00
|
|
|
Console.WriteLine("WARNING: Could not find Unicorn.");
|
2018-09-01 16:24:05 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-02-16 01:04:38 +01:00
|
|
|
[SetUp]
|
|
|
|
public void Setup()
|
|
|
|
{
|
2018-09-01 16:24:05 +02:00
|
|
|
Position = 0x1000;
|
2018-11-01 05:22:09 +01:00
|
|
|
_size = 0x1000;
|
2018-02-23 13:29:20 +01:00
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
_entryPoint = Position;
|
2018-02-23 13:29:20 +01:00
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
Translator translator = new Translator();
|
|
|
|
_ramPointer = Marshal.AllocHGlobal(new IntPtr(_size));
|
|
|
|
_memory = new MemoryManager(_ramPointer);
|
|
|
|
_memory.Map(Position, 0, _size);
|
|
|
|
_thread = new CpuThread(translator, _memory, _entryPoint);
|
2018-09-01 16:24:05 +02:00
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
if (_unicornAvailable)
|
2018-09-01 16:24:05 +02:00
|
|
|
{
|
2018-11-01 05:22:09 +01:00
|
|
|
_unicornEmu = new UnicornAArch64();
|
|
|
|
_unicornEmu.MemoryMap((ulong)Position, (ulong)_size, MemoryPermission.READ | MemoryPermission.EXEC);
|
|
|
|
_unicornEmu.PC = (ulong)_entryPoint;
|
2018-09-01 16:24:05 +02:00
|
|
|
}
|
2018-02-16 01:04:38 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
[TearDown]
|
|
|
|
public void Teardown()
|
|
|
|
{
|
2018-11-01 05:22:09 +01:00
|
|
|
Marshal.FreeHGlobal(_ramPointer);
|
|
|
|
_memory = null;
|
|
|
|
_thread = null;
|
|
|
|
_unicornEmu = null;
|
2018-02-16 01:04:38 +01:00
|
|
|
}
|
|
|
|
|
2018-02-23 13:29:20 +01:00
|
|
|
protected void Reset()
|
2018-02-16 01:04:38 +01:00
|
|
|
{
|
2018-02-23 13:29:20 +01:00
|
|
|
Teardown();
|
|
|
|
Setup();
|
2018-02-16 01:04:38 +01:00
|
|
|
}
|
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
protected void Opcode(uint opcode)
|
2018-02-16 01:04:38 +01:00
|
|
|
{
|
2018-11-01 05:22:09 +01:00
|
|
|
_thread.Memory.WriteUInt32(Position, opcode);
|
2018-09-08 19:23:07 +02:00
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
if (_unicornAvailable)
|
2018-09-01 16:24:05 +02:00
|
|
|
{
|
2018-11-01 05:22:09 +01:00
|
|
|
_unicornEmu.MemoryWrite32((ulong)Position, opcode);
|
2018-09-01 16:24:05 +02:00
|
|
|
}
|
2018-09-08 19:23:07 +02:00
|
|
|
|
2018-02-23 13:29:20 +01:00
|
|
|
Position += 4;
|
|
|
|
}
|
2018-02-16 01:04:38 +01:00
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
protected void SetThreadState(ulong x0 = 0, ulong x1 = 0, ulong x2 = 0, ulong x3 = 0, ulong x31 = 0,
|
|
|
|
Vector128<float> v0 = default(Vector128<float>),
|
|
|
|
Vector128<float> v1 = default(Vector128<float>),
|
|
|
|
Vector128<float> v2 = default(Vector128<float>),
|
|
|
|
Vector128<float> v3 = default(Vector128<float>),
|
|
|
|
bool overflow = false, bool carry = false, bool zero = false, bool negative = false,
|
|
|
|
int fpcr = 0x0, int fpsr = 0x0)
|
2018-02-23 13:29:20 +01:00
|
|
|
{
|
2018-11-01 05:22:09 +01:00
|
|
|
_thread.ThreadState.X0 = x0;
|
|
|
|
_thread.ThreadState.X1 = x1;
|
|
|
|
_thread.ThreadState.X2 = x2;
|
|
|
|
_thread.ThreadState.X3 = x3;
|
2018-09-08 19:23:07 +02:00
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
_thread.ThreadState.X31 = x31;
|
2018-09-08 19:23:07 +02:00
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
_thread.ThreadState.V0 = v0;
|
|
|
|
_thread.ThreadState.V1 = v1;
|
|
|
|
_thread.ThreadState.V2 = v2;
|
|
|
|
_thread.ThreadState.V3 = v3;
|
2018-09-08 19:23:07 +02:00
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
_thread.ThreadState.Overflow = overflow;
|
|
|
|
_thread.ThreadState.Carry = carry;
|
|
|
|
_thread.ThreadState.Zero = zero;
|
|
|
|
_thread.ThreadState.Negative = negative;
|
2018-09-08 19:23:07 +02:00
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
_thread.ThreadState.Fpcr = fpcr;
|
|
|
|
_thread.ThreadState.Fpsr = fpsr;
|
2018-09-01 16:24:05 +02:00
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
if (_unicornAvailable)
|
2018-09-01 16:24:05 +02:00
|
|
|
{
|
2018-11-01 05:22:09 +01:00
|
|
|
_unicornEmu.X[0] = x0;
|
|
|
|
_unicornEmu.X[1] = x1;
|
|
|
|
_unicornEmu.X[2] = x2;
|
|
|
|
_unicornEmu.X[3] = x3;
|
2018-09-08 19:23:07 +02:00
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
_unicornEmu.SP = x31;
|
2018-09-08 19:23:07 +02:00
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
_unicornEmu.Q[0] = v0;
|
|
|
|
_unicornEmu.Q[1] = v1;
|
|
|
|
_unicornEmu.Q[2] = v2;
|
|
|
|
_unicornEmu.Q[3] = v3;
|
2018-09-08 19:23:07 +02:00
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
_unicornEmu.OverflowFlag = overflow;
|
|
|
|
_unicornEmu.CarryFlag = carry;
|
|
|
|
_unicornEmu.ZeroFlag = zero;
|
|
|
|
_unicornEmu.NegativeFlag = negative;
|
2018-09-08 19:23:07 +02:00
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
_unicornEmu.Fpcr = fpcr;
|
|
|
|
_unicornEmu.Fpsr = fpsr;
|
2018-09-01 16:24:05 +02:00
|
|
|
}
|
2018-02-23 13:29:20 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
protected void ExecuteOpcodes()
|
|
|
|
{
|
2018-11-01 05:22:09 +01:00
|
|
|
using (ManualResetEvent wait = new ManualResetEvent(false))
|
2018-02-23 13:29:20 +01:00
|
|
|
{
|
2018-11-01 05:22:09 +01:00
|
|
|
_thread.ThreadState.Break += (sender, e) => _thread.StopExecution();
|
|
|
|
_thread.WorkFinished += (sender, e) => wait.Set();
|
2018-02-23 13:29:20 +01:00
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
_thread.Execute();
|
|
|
|
wait.WaitOne();
|
2018-02-23 13:29:20 +01:00
|
|
|
}
|
2018-09-01 16:24:05 +02:00
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
if (_unicornAvailable)
|
2018-09-01 16:24:05 +02:00
|
|
|
{
|
2018-11-01 05:22:09 +01:00
|
|
|
_unicornEmu.RunForCount((ulong)(Position - _entryPoint - 8) / 4);
|
2018-09-01 16:24:05 +02:00
|
|
|
}
|
2018-02-23 13:29:20 +01:00
|
|
|
}
|
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
protected CpuThreadState GetThreadState() => _thread.ThreadState;
|
|
|
|
|
|
|
|
protected CpuThreadState SingleOpcode(uint opcode,
|
|
|
|
ulong x0 = 0, ulong x1 = 0, ulong x2 = 0, ulong x3 = 0, ulong x31 = 0,
|
|
|
|
Vector128<float> v0 = default(Vector128<float>),
|
|
|
|
Vector128<float> v1 = default(Vector128<float>),
|
|
|
|
Vector128<float> v2 = default(Vector128<float>),
|
|
|
|
Vector128<float> v3 = default(Vector128<float>),
|
|
|
|
bool overflow = false, bool carry = false, bool zero = false, bool negative = false,
|
|
|
|
int fpcr = 0x0, int fpsr = 0x0)
|
|
|
|
{
|
|
|
|
Opcode(opcode);
|
|
|
|
Opcode(0xD4200000); // BRK #0
|
|
|
|
Opcode(0xD65F03C0); // RET
|
|
|
|
SetThreadState(x0, x1, x2, x3, x31, v0, v1, v2, v3, overflow, carry, zero, negative, fpcr, fpsr);
|
2018-02-23 13:29:20 +01:00
|
|
|
ExecuteOpcodes();
|
|
|
|
|
|
|
|
return GetThreadState();
|
2018-02-16 01:04:38 +01:00
|
|
|
}
|
2018-05-12 01:10:27 +02:00
|
|
|
|
2018-10-23 16:12:45 +02:00
|
|
|
/// <summary>Rounding Mode control field.</summary>
|
|
|
|
public enum RMode
|
|
|
|
{
|
2018-11-01 05:22:09 +01:00
|
|
|
/// <summary>Round to Nearest mode.</summary>
|
|
|
|
Rn,
|
|
|
|
/// <summary>Round towards Plus Infinity mode.</summary>
|
|
|
|
Rp,
|
|
|
|
/// <summary>Round towards Minus Infinity mode.</summary>
|
|
|
|
Rm,
|
|
|
|
/// <summary>Round towards Zero mode.</summary>
|
|
|
|
Rz
|
2018-10-23 16:12:45 +02:00
|
|
|
};
|
|
|
|
|
2018-10-06 03:45:59 +02:00
|
|
|
/// <summary>Floating-point Control Register.</summary>
|
2018-11-01 05:22:09 +01:00
|
|
|
protected enum Fpcr
|
2018-10-06 03:45:59 +02:00
|
|
|
{
|
2018-10-23 16:12:45 +02:00
|
|
|
/// <summary>Rounding Mode control field.</summary>
|
|
|
|
RMode = 22,
|
|
|
|
/// <summary>Flush-to-zero mode control bit.</summary>
|
2018-11-01 05:22:09 +01:00
|
|
|
Fz = 24,
|
2018-10-06 03:45:59 +02:00
|
|
|
/// <summary>Default NaN mode control bit.</summary>
|
2018-11-01 05:22:09 +01:00
|
|
|
Dn = 25,
|
2018-10-23 16:12:45 +02:00
|
|
|
/// <summary>Alternative half-precision control bit.</summary>
|
2018-11-01 05:22:09 +01:00
|
|
|
Ahp = 26
|
2018-10-06 03:45:59 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
/// <summary>Floating-point Status Register.</summary>
|
2018-11-01 05:22:09 +01:00
|
|
|
[Flags] protected enum Fpsr
|
2018-09-08 19:23:07 +02:00
|
|
|
{
|
|
|
|
None = 0,
|
|
|
|
|
|
|
|
/// <summary>Invalid Operation cumulative floating-point exception bit.</summary>
|
2018-11-01 05:22:09 +01:00
|
|
|
Ioc = 1 << 0,
|
2018-09-08 19:23:07 +02:00
|
|
|
/// <summary>Divide by Zero cumulative floating-point exception bit.</summary>
|
2018-11-01 05:22:09 +01:00
|
|
|
Dzc = 1 << 1,
|
2018-09-08 19:23:07 +02:00
|
|
|
/// <summary>Overflow cumulative floating-point exception bit.</summary>
|
2018-11-01 05:22:09 +01:00
|
|
|
Ofc = 1 << 2,
|
2018-09-08 19:23:07 +02:00
|
|
|
/// <summary>Underflow cumulative floating-point exception bit.</summary>
|
2018-11-01 05:22:09 +01:00
|
|
|
Ufc = 1 << 3,
|
2018-09-08 19:23:07 +02:00
|
|
|
/// <summary>Inexact cumulative floating-point exception bit.</summary>
|
2018-11-01 05:22:09 +01:00
|
|
|
Ixc = 1 << 4,
|
2018-09-08 19:23:07 +02:00
|
|
|
/// <summary>Input Denormal cumulative floating-point exception bit.</summary>
|
2018-11-01 05:22:09 +01:00
|
|
|
Idc = 1 << 7,
|
2018-10-06 03:45:59 +02:00
|
|
|
|
2018-09-08 19:23:07 +02:00
|
|
|
/// <summary>Cumulative saturation bit.</summary>
|
2018-11-01 05:22:09 +01:00
|
|
|
Qc = 1 << 27
|
2018-09-08 19:23:07 +02:00
|
|
|
}
|
|
|
|
|
2018-10-06 03:45:59 +02:00
|
|
|
[Flags] protected enum FpSkips
|
|
|
|
{
|
|
|
|
None = 0,
|
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
IfNaNS = 1,
|
|
|
|
IfNaND = 2,
|
2018-09-17 06:54:05 +02:00
|
|
|
|
2018-10-06 03:45:59 +02:00
|
|
|
IfUnderflow = 4,
|
|
|
|
IfOverflow = 8
|
|
|
|
}
|
|
|
|
|
|
|
|
protected enum FpTolerances
|
|
|
|
{
|
|
|
|
None,
|
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
UpToOneUlpsS,
|
|
|
|
UpToOneUlpsD
|
2018-10-06 03:45:59 +02:00
|
|
|
}
|
2018-09-17 06:54:05 +02:00
|
|
|
|
|
|
|
protected void CompareAgainstUnicorn(
|
2018-11-01 05:22:09 +01:00
|
|
|
Fpsr fpsrMask = Fpsr.None,
|
|
|
|
FpSkips fpSkips = FpSkips.None,
|
|
|
|
FpTolerances fpTolerances = FpTolerances.None)
|
2018-09-01 16:24:05 +02:00
|
|
|
{
|
2018-11-01 05:22:09 +01:00
|
|
|
if (!_unicornAvailable)
|
2018-09-01 16:24:05 +02:00
|
|
|
{
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
if (fpSkips != FpSkips.None)
|
2018-09-17 06:54:05 +02:00
|
|
|
{
|
2018-11-01 05:22:09 +01:00
|
|
|
ManageFpSkips(fpSkips);
|
2018-09-17 06:54:05 +02:00
|
|
|
}
|
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
Assert.That(_thread.ThreadState.X0, Is.EqualTo(_unicornEmu.X[0]));
|
|
|
|
Assert.That(_thread.ThreadState.X1, Is.EqualTo(_unicornEmu.X[1]));
|
|
|
|
Assert.That(_thread.ThreadState.X2, Is.EqualTo(_unicornEmu.X[2]));
|
|
|
|
Assert.That(_thread.ThreadState.X3, Is.EqualTo(_unicornEmu.X[3]));
|
|
|
|
Assert.That(_thread.ThreadState.X4, Is.EqualTo(_unicornEmu.X[4]));
|
|
|
|
Assert.That(_thread.ThreadState.X5, Is.EqualTo(_unicornEmu.X[5]));
|
|
|
|
Assert.That(_thread.ThreadState.X6, Is.EqualTo(_unicornEmu.X[6]));
|
|
|
|
Assert.That(_thread.ThreadState.X7, Is.EqualTo(_unicornEmu.X[7]));
|
|
|
|
Assert.That(_thread.ThreadState.X8, Is.EqualTo(_unicornEmu.X[8]));
|
|
|
|
Assert.That(_thread.ThreadState.X9, Is.EqualTo(_unicornEmu.X[9]));
|
|
|
|
Assert.That(_thread.ThreadState.X10, Is.EqualTo(_unicornEmu.X[10]));
|
|
|
|
Assert.That(_thread.ThreadState.X11, Is.EqualTo(_unicornEmu.X[11]));
|
|
|
|
Assert.That(_thread.ThreadState.X12, Is.EqualTo(_unicornEmu.X[12]));
|
|
|
|
Assert.That(_thread.ThreadState.X13, Is.EqualTo(_unicornEmu.X[13]));
|
|
|
|
Assert.That(_thread.ThreadState.X14, Is.EqualTo(_unicornEmu.X[14]));
|
|
|
|
Assert.That(_thread.ThreadState.X15, Is.EqualTo(_unicornEmu.X[15]));
|
|
|
|
Assert.That(_thread.ThreadState.X16, Is.EqualTo(_unicornEmu.X[16]));
|
|
|
|
Assert.That(_thread.ThreadState.X17, Is.EqualTo(_unicornEmu.X[17]));
|
|
|
|
Assert.That(_thread.ThreadState.X18, Is.EqualTo(_unicornEmu.X[18]));
|
|
|
|
Assert.That(_thread.ThreadState.X19, Is.EqualTo(_unicornEmu.X[19]));
|
|
|
|
Assert.That(_thread.ThreadState.X20, Is.EqualTo(_unicornEmu.X[20]));
|
|
|
|
Assert.That(_thread.ThreadState.X21, Is.EqualTo(_unicornEmu.X[21]));
|
|
|
|
Assert.That(_thread.ThreadState.X22, Is.EqualTo(_unicornEmu.X[22]));
|
|
|
|
Assert.That(_thread.ThreadState.X23, Is.EqualTo(_unicornEmu.X[23]));
|
|
|
|
Assert.That(_thread.ThreadState.X24, Is.EqualTo(_unicornEmu.X[24]));
|
|
|
|
Assert.That(_thread.ThreadState.X25, Is.EqualTo(_unicornEmu.X[25]));
|
|
|
|
Assert.That(_thread.ThreadState.X26, Is.EqualTo(_unicornEmu.X[26]));
|
|
|
|
Assert.That(_thread.ThreadState.X27, Is.EqualTo(_unicornEmu.X[27]));
|
|
|
|
Assert.That(_thread.ThreadState.X28, Is.EqualTo(_unicornEmu.X[28]));
|
|
|
|
Assert.That(_thread.ThreadState.X29, Is.EqualTo(_unicornEmu.X[29]));
|
|
|
|
Assert.That(_thread.ThreadState.X30, Is.EqualTo(_unicornEmu.X[30]));
|
|
|
|
|
|
|
|
Assert.That(_thread.ThreadState.X31, Is.EqualTo(_unicornEmu.SP));
|
|
|
|
|
|
|
|
if (fpTolerances == FpTolerances.None)
|
2018-09-17 06:54:05 +02:00
|
|
|
{
|
2018-11-01 05:22:09 +01:00
|
|
|
Assert.That(_thread.ThreadState.V0, Is.EqualTo(_unicornEmu.Q[0]));
|
2018-09-17 06:54:05 +02:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2018-11-01 05:22:09 +01:00
|
|
|
ManageFpTolerances(fpTolerances);
|
2018-09-17 06:54:05 +02:00
|
|
|
}
|
2018-11-01 05:22:09 +01:00
|
|
|
Assert.That(_thread.ThreadState.V1, Is.EqualTo(_unicornEmu.Q[1]));
|
|
|
|
Assert.That(_thread.ThreadState.V2, Is.EqualTo(_unicornEmu.Q[2]));
|
|
|
|
Assert.That(_thread.ThreadState.V3, Is.EqualTo(_unicornEmu.Q[3]));
|
|
|
|
Assert.That(_thread.ThreadState.V4, Is.EqualTo(_unicornEmu.Q[4]));
|
|
|
|
Assert.That(_thread.ThreadState.V5, Is.EqualTo(_unicornEmu.Q[5]));
|
|
|
|
Assert.That(_thread.ThreadState.V6, Is.EqualTo(_unicornEmu.Q[6]));
|
|
|
|
Assert.That(_thread.ThreadState.V7, Is.EqualTo(_unicornEmu.Q[7]));
|
|
|
|
Assert.That(_thread.ThreadState.V8, Is.EqualTo(_unicornEmu.Q[8]));
|
|
|
|
Assert.That(_thread.ThreadState.V9, Is.EqualTo(_unicornEmu.Q[9]));
|
|
|
|
Assert.That(_thread.ThreadState.V10, Is.EqualTo(_unicornEmu.Q[10]));
|
|
|
|
Assert.That(_thread.ThreadState.V11, Is.EqualTo(_unicornEmu.Q[11]));
|
|
|
|
Assert.That(_thread.ThreadState.V12, Is.EqualTo(_unicornEmu.Q[12]));
|
|
|
|
Assert.That(_thread.ThreadState.V13, Is.EqualTo(_unicornEmu.Q[13]));
|
|
|
|
Assert.That(_thread.ThreadState.V14, Is.EqualTo(_unicornEmu.Q[14]));
|
|
|
|
Assert.That(_thread.ThreadState.V15, Is.EqualTo(_unicornEmu.Q[15]));
|
|
|
|
Assert.That(_thread.ThreadState.V16, Is.EqualTo(_unicornEmu.Q[16]));
|
|
|
|
Assert.That(_thread.ThreadState.V17, Is.EqualTo(_unicornEmu.Q[17]));
|
|
|
|
Assert.That(_thread.ThreadState.V18, Is.EqualTo(_unicornEmu.Q[18]));
|
|
|
|
Assert.That(_thread.ThreadState.V19, Is.EqualTo(_unicornEmu.Q[19]));
|
|
|
|
Assert.That(_thread.ThreadState.V20, Is.EqualTo(_unicornEmu.Q[20]));
|
|
|
|
Assert.That(_thread.ThreadState.V21, Is.EqualTo(_unicornEmu.Q[21]));
|
|
|
|
Assert.That(_thread.ThreadState.V22, Is.EqualTo(_unicornEmu.Q[22]));
|
|
|
|
Assert.That(_thread.ThreadState.V23, Is.EqualTo(_unicornEmu.Q[23]));
|
|
|
|
Assert.That(_thread.ThreadState.V24, Is.EqualTo(_unicornEmu.Q[24]));
|
|
|
|
Assert.That(_thread.ThreadState.V25, Is.EqualTo(_unicornEmu.Q[25]));
|
|
|
|
Assert.That(_thread.ThreadState.V26, Is.EqualTo(_unicornEmu.Q[26]));
|
|
|
|
Assert.That(_thread.ThreadState.V27, Is.EqualTo(_unicornEmu.Q[27]));
|
|
|
|
Assert.That(_thread.ThreadState.V28, Is.EqualTo(_unicornEmu.Q[28]));
|
|
|
|
Assert.That(_thread.ThreadState.V29, Is.EqualTo(_unicornEmu.Q[29]));
|
|
|
|
Assert.That(_thread.ThreadState.V30, Is.EqualTo(_unicornEmu.Q[30]));
|
|
|
|
Assert.That(_thread.ThreadState.V31, Is.EqualTo(_unicornEmu.Q[31]));
|
|
|
|
Assert.That(_thread.ThreadState.V31, Is.EqualTo(_unicornEmu.Q[31]));
|
|
|
|
|
|
|
|
Assert.That(_thread.ThreadState.Fpcr, Is.EqualTo(_unicornEmu.Fpcr));
|
|
|
|
Assert.That(_thread.ThreadState.Fpsr & (int)fpsrMask, Is.EqualTo(_unicornEmu.Fpsr & (int)fpsrMask));
|
|
|
|
|
|
|
|
Assert.That(_thread.ThreadState.Overflow, Is.EqualTo(_unicornEmu.OverflowFlag));
|
|
|
|
Assert.That(_thread.ThreadState.Carry, Is.EqualTo(_unicornEmu.CarryFlag));
|
|
|
|
Assert.That(_thread.ThreadState.Zero, Is.EqualTo(_unicornEmu.ZeroFlag));
|
|
|
|
Assert.That(_thread.ThreadState.Negative, Is.EqualTo(_unicornEmu.NegativeFlag));
|
2018-09-01 16:24:05 +02:00
|
|
|
}
|
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
private void ManageFpSkips(FpSkips fpSkips)
|
2018-10-06 03:45:59 +02:00
|
|
|
{
|
2018-11-01 05:22:09 +01:00
|
|
|
if (fpSkips.HasFlag(FpSkips.IfNaNS))
|
2018-10-06 03:45:59 +02:00
|
|
|
{
|
2018-11-01 05:22:09 +01:00
|
|
|
if (float.IsNaN(VectorExtractSingle(_unicornEmu.Q[0], (byte)0)))
|
2018-10-06 03:45:59 +02:00
|
|
|
{
|
|
|
|
Assert.Ignore("NaN test.");
|
|
|
|
}
|
|
|
|
}
|
2018-11-01 05:22:09 +01:00
|
|
|
else if (fpSkips.HasFlag(FpSkips.IfNaND))
|
2018-10-06 03:45:59 +02:00
|
|
|
{
|
2018-11-01 05:22:09 +01:00
|
|
|
if (double.IsNaN(VectorExtractDouble(_unicornEmu.Q[0], (byte)0)))
|
2018-10-06 03:45:59 +02:00
|
|
|
{
|
|
|
|
Assert.Ignore("NaN test.");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
if (fpSkips.HasFlag(FpSkips.IfUnderflow))
|
2018-10-06 03:45:59 +02:00
|
|
|
{
|
2018-11-01 05:22:09 +01:00
|
|
|
if ((_unicornEmu.Fpsr & (int)Fpsr.Ufc) != 0)
|
2018-10-06 03:45:59 +02:00
|
|
|
{
|
|
|
|
Assert.Ignore("Underflow test.");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
if (fpSkips.HasFlag(FpSkips.IfOverflow))
|
2018-10-06 03:45:59 +02:00
|
|
|
{
|
2018-11-01 05:22:09 +01:00
|
|
|
if ((_unicornEmu.Fpsr & (int)Fpsr.Ofc) != 0)
|
2018-10-06 03:45:59 +02:00
|
|
|
{
|
|
|
|
Assert.Ignore("Overflow test.");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
private void ManageFpTolerances(FpTolerances fpTolerances)
|
2018-10-06 03:45:59 +02:00
|
|
|
{
|
2018-11-01 05:22:09 +01:00
|
|
|
if (!Is.EqualTo(_unicornEmu.Q[0]).ApplyTo(_thread.ThreadState.V0).IsSuccess)
|
2018-10-06 03:45:59 +02:00
|
|
|
{
|
2018-11-01 05:22:09 +01:00
|
|
|
if (fpTolerances == FpTolerances.UpToOneUlpsS)
|
2018-10-06 03:45:59 +02:00
|
|
|
{
|
2018-11-01 05:22:09 +01:00
|
|
|
if (IsNormalOrSubnormalS(VectorExtractSingle(_unicornEmu.Q[0], (byte)0)) &&
|
|
|
|
IsNormalOrSubnormalS(VectorExtractSingle(_thread.ThreadState.V0, (byte)0)))
|
2018-10-06 03:45:59 +02:00
|
|
|
{
|
2018-11-01 05:22:09 +01:00
|
|
|
Assert.That (VectorExtractSingle(_thread.ThreadState.V0, (byte)0),
|
|
|
|
Is.EqualTo(VectorExtractSingle(_unicornEmu.Q[0], (byte)0)).Within(1).Ulps);
|
|
|
|
Assert.That (VectorExtractSingle(_thread.ThreadState.V0, (byte)1),
|
|
|
|
Is.EqualTo(VectorExtractSingle(_unicornEmu.Q[0], (byte)1)).Within(1).Ulps);
|
|
|
|
Assert.That (VectorExtractSingle(_thread.ThreadState.V0, (byte)2),
|
|
|
|
Is.EqualTo(VectorExtractSingle(_unicornEmu.Q[0], (byte)2)).Within(1).Ulps);
|
|
|
|
Assert.That (VectorExtractSingle(_thread.ThreadState.V0, (byte)3),
|
|
|
|
Is.EqualTo(VectorExtractSingle(_unicornEmu.Q[0], (byte)3)).Within(1).Ulps);
|
|
|
|
|
|
|
|
Console.WriteLine(fpTolerances);
|
2018-10-06 03:45:59 +02:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2018-11-01 05:22:09 +01:00
|
|
|
Assert.That(_thread.ThreadState.V0, Is.EqualTo(_unicornEmu.Q[0]));
|
2018-10-06 03:45:59 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
if (fpTolerances == FpTolerances.UpToOneUlpsD)
|
2018-10-06 03:45:59 +02:00
|
|
|
{
|
2018-11-01 05:22:09 +01:00
|
|
|
if (IsNormalOrSubnormalD(VectorExtractDouble(_unicornEmu.Q[0], (byte)0)) &&
|
|
|
|
IsNormalOrSubnormalD(VectorExtractDouble(_thread.ThreadState.V0, (byte)0)))
|
2018-10-06 03:45:59 +02:00
|
|
|
{
|
2018-11-01 05:22:09 +01:00
|
|
|
Assert.That (VectorExtractDouble(_thread.ThreadState.V0, (byte)0),
|
|
|
|
Is.EqualTo(VectorExtractDouble(_unicornEmu.Q[0], (byte)0)).Within(1).Ulps);
|
|
|
|
Assert.That (VectorExtractDouble(_thread.ThreadState.V0, (byte)1),
|
|
|
|
Is.EqualTo(VectorExtractDouble(_unicornEmu.Q[0], (byte)1)).Within(1).Ulps);
|
2018-10-06 03:45:59 +02:00
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
Console.WriteLine(fpTolerances);
|
2018-10-06 03:45:59 +02:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2018-11-01 05:22:09 +01:00
|
|
|
Assert.That(_thread.ThreadState.V0, Is.EqualTo(_unicornEmu.Q[0]));
|
2018-10-06 03:45:59 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
bool IsNormalOrSubnormalS(float f) => float.IsNormal(f) || float.IsSubnormal(f);
|
2018-10-06 03:45:59 +02:00
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
bool IsNormalOrSubnormalD(double d) => double.IsNormal(d) || double.IsSubnormal(d);
|
2018-10-06 03:45:59 +02:00
|
|
|
}
|
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
protected static Vector128<float> MakeVectorE0(double e0)
|
2018-05-12 01:10:27 +02:00
|
|
|
{
|
2018-08-27 08:44:01 +02:00
|
|
|
if (!Sse2.IsSupported)
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
return Sse.StaticCast<long, float>(Sse2.SetVector128(0, BitConverter.DoubleToInt64Bits(e0)));
|
Add Sse Opt. for Cmeq_V_2D, Cmgt_V_2D (Reg). Add Sse Opt. for Crc32cb, Crc32ch, Crc32cw, Crc32cx. Add 10 simple tests for Fcmgt, Fcmge, Fcmeq, Fcmle, Fcmlt (S, V) (Reg, Zero). Add 2 Cnt_V tests. (#183)
* Add files via upload
* Add files via upload
* Add files via upload
* CPE
* Add EmitSse42Crc32()
* Update CpuTestSimdCmp.cs
* Update Pseudocode.cs
* Update Instructions.cs
* Update CpuTestSimd.cs
* Update Instructions.cs
2018-06-26 03:32:29 +02:00
|
|
|
}
|
2018-05-12 01:10:27 +02:00
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
protected static Vector128<float> MakeVectorE0E1(double e0, double e1)
|
Add Sse Opt. for Cmeq_V_2D, Cmgt_V_2D (Reg). Add Sse Opt. for Crc32cb, Crc32ch, Crc32cw, Crc32cx. Add 10 simple tests for Fcmgt, Fcmge, Fcmeq, Fcmle, Fcmlt (S, V) (Reg, Zero). Add 2 Cnt_V tests. (#183)
* Add files via upload
* Add files via upload
* Add files via upload
* CPE
* Add EmitSse42Crc32()
* Update CpuTestSimdCmp.cs
* Update Pseudocode.cs
* Update Instructions.cs
* Update CpuTestSimd.cs
* Update Instructions.cs
2018-06-26 03:32:29 +02:00
|
|
|
{
|
2018-08-27 08:44:01 +02:00
|
|
|
if (!Sse2.IsSupported)
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
|
|
|
|
|
|
|
return Sse.StaticCast<long, float>(
|
2018-11-01 05:22:09 +01:00
|
|
|
Sse2.SetVector128(BitConverter.DoubleToInt64Bits(e1), BitConverter.DoubleToInt64Bits(e0)));
|
Add Sse Opt. for Cmeq_V_2D, Cmgt_V_2D (Reg). Add Sse Opt. for Crc32cb, Crc32ch, Crc32cw, Crc32cx. Add 10 simple tests for Fcmgt, Fcmge, Fcmeq, Fcmle, Fcmlt (S, V) (Reg, Zero). Add 2 Cnt_V tests. (#183)
* Add files via upload
* Add files via upload
* Add files via upload
* CPE
* Add EmitSse42Crc32()
* Update CpuTestSimdCmp.cs
* Update Pseudocode.cs
* Update Instructions.cs
* Update CpuTestSimd.cs
* Update Instructions.cs
2018-06-26 03:32:29 +02:00
|
|
|
}
|
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
protected static Vector128<float> MakeVectorE1(double e1)
|
Add Sse Opt. for Cmeq_V_2D, Cmgt_V_2D (Reg). Add Sse Opt. for Crc32cb, Crc32ch, Crc32cw, Crc32cx. Add 10 simple tests for Fcmgt, Fcmge, Fcmeq, Fcmle, Fcmlt (S, V) (Reg, Zero). Add 2 Cnt_V tests. (#183)
* Add files via upload
* Add files via upload
* Add files via upload
* CPE
* Add EmitSse42Crc32()
* Update CpuTestSimdCmp.cs
* Update Pseudocode.cs
* Update Instructions.cs
* Update CpuTestSimd.cs
* Update Instructions.cs
2018-06-26 03:32:29 +02:00
|
|
|
{
|
2018-08-27 08:44:01 +02:00
|
|
|
if (!Sse2.IsSupported)
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
return Sse.StaticCast<long, float>(Sse2.SetVector128(BitConverter.DoubleToInt64Bits(e1), 0));
|
2018-05-12 01:10:27 +02:00
|
|
|
}
|
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
protected static float VectorExtractSingle(Vector128<float> vector, byte index)
|
2018-09-17 06:54:05 +02:00
|
|
|
{
|
|
|
|
if (!Sse41.IsSupported)
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
int value = Sse41.Extract(Sse.StaticCast<float, int>(vector), index);
|
2018-09-17 06:54:05 +02:00
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
return BitConverter.Int32BitsToSingle(value);
|
2018-09-17 06:54:05 +02:00
|
|
|
}
|
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
protected static double VectorExtractDouble(Vector128<float> vector, byte index)
|
2018-05-12 01:10:27 +02:00
|
|
|
{
|
2018-08-27 08:44:01 +02:00
|
|
|
if (!Sse41.IsSupported)
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
long value = Sse41.Extract(Sse.StaticCast<float, long>(vector), index);
|
Add Sse Opt. for Cmeq_V_2D, Cmgt_V_2D (Reg). Add Sse Opt. for Crc32cb, Crc32ch, Crc32cw, Crc32cx. Add 10 simple tests for Fcmgt, Fcmge, Fcmeq, Fcmle, Fcmlt (S, V) (Reg, Zero). Add 2 Cnt_V tests. (#183)
* Add files via upload
* Add files via upload
* Add files via upload
* CPE
* Add EmitSse42Crc32()
* Update CpuTestSimdCmp.cs
* Update Pseudocode.cs
* Update Instructions.cs
* Update CpuTestSimd.cs
* Update Instructions.cs
2018-06-26 03:32:29 +02:00
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
return BitConverter.Int64BitsToDouble(value);
|
2018-05-12 01:10:27 +02:00
|
|
|
}
|
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
protected static Vector128<float> MakeVectorE0(ulong e0)
|
2018-05-12 01:10:27 +02:00
|
|
|
{
|
2018-08-27 08:44:01 +02:00
|
|
|
if (!Sse2.IsSupported)
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
return Sse.StaticCast<ulong, float>(Sse2.SetVector128(0, e0));
|
2018-05-12 01:10:27 +02:00
|
|
|
}
|
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
protected static Vector128<float> MakeVectorE0E1(ulong e0, ulong e1)
|
2018-05-12 01:10:27 +02:00
|
|
|
{
|
2018-08-27 08:44:01 +02:00
|
|
|
if (!Sse2.IsSupported)
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
return Sse.StaticCast<ulong, float>(Sse2.SetVector128(e1, e0));
|
2018-05-12 01:10:27 +02:00
|
|
|
}
|
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
protected static Vector128<float> MakeVectorE1(ulong e1)
|
2018-05-12 01:10:27 +02:00
|
|
|
{
|
2018-08-27 08:44:01 +02:00
|
|
|
if (!Sse2.IsSupported)
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
return Sse.StaticCast<ulong, float>(Sse2.SetVector128(e1, 0));
|
2018-05-12 01:10:27 +02:00
|
|
|
}
|
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
protected static ulong GetVectorE0(Vector128<float> vector)
|
2018-05-12 01:10:27 +02:00
|
|
|
{
|
2018-08-27 08:44:01 +02:00
|
|
|
if (!Sse41.IsSupported)
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
return Sse41.Extract(Sse.StaticCast<float, ulong>(vector), (byte)0);
|
2018-05-12 01:10:27 +02:00
|
|
|
}
|
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
protected static ulong GetVectorE1(Vector128<float> vector)
|
2018-05-12 01:10:27 +02:00
|
|
|
{
|
2018-08-27 08:44:01 +02:00
|
|
|
if (!Sse41.IsSupported)
|
|
|
|
{
|
|
|
|
throw new PlatformNotSupportedException();
|
|
|
|
}
|
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
return Sse41.Extract(Sse.StaticCast<float, ulong>(vector), (byte)1);
|
2018-05-12 01:10:27 +02:00
|
|
|
}
|
2018-09-17 06:54:05 +02:00
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
protected static ushort GenNormalH()
|
2018-10-23 16:12:45 +02:00
|
|
|
{
|
2018-11-01 05:22:09 +01:00
|
|
|
uint rnd;
|
2018-10-23 16:12:45 +02:00
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
do rnd = TestContext.CurrentContext.Random.NextUShort();
|
|
|
|
while (( rnd & 0x7C00u) == 0u ||
|
|
|
|
(~rnd & 0x7C00u) == 0u);
|
2018-10-23 16:12:45 +02:00
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
return (ushort)rnd;
|
2018-10-23 16:12:45 +02:00
|
|
|
}
|
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
protected static ushort GenSubnormalH()
|
2018-10-23 16:12:45 +02:00
|
|
|
{
|
2018-11-01 05:22:09 +01:00
|
|
|
uint rnd;
|
2018-10-23 16:12:45 +02:00
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
do rnd = TestContext.CurrentContext.Random.NextUShort();
|
|
|
|
while ((rnd & 0x03FFu) == 0u);
|
2018-10-23 16:12:45 +02:00
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
return (ushort)(rnd & 0x83FFu);
|
2018-10-23 16:12:45 +02:00
|
|
|
}
|
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
protected static uint GenNormalS()
|
2018-09-17 06:54:05 +02:00
|
|
|
{
|
2018-11-01 05:22:09 +01:00
|
|
|
uint rnd;
|
2018-09-17 06:54:05 +02:00
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
do rnd = TestContext.CurrentContext.Random.NextUInt();
|
|
|
|
while (( rnd & 0x7F800000u) == 0u ||
|
|
|
|
(~rnd & 0x7F800000u) == 0u);
|
2018-09-17 06:54:05 +02:00
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
return rnd;
|
2018-09-17 06:54:05 +02:00
|
|
|
}
|
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
protected static uint GenSubnormalS()
|
2018-09-17 06:54:05 +02:00
|
|
|
{
|
2018-11-01 05:22:09 +01:00
|
|
|
uint rnd;
|
2018-09-17 06:54:05 +02:00
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
do rnd = TestContext.CurrentContext.Random.NextUInt();
|
|
|
|
while ((rnd & 0x007FFFFFu) == 0u);
|
2018-09-17 06:54:05 +02:00
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
return rnd & 0x807FFFFFu;
|
2018-09-17 06:54:05 +02:00
|
|
|
}
|
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
protected static ulong GenNormalD()
|
2018-09-17 06:54:05 +02:00
|
|
|
{
|
2018-11-01 05:22:09 +01:00
|
|
|
ulong rnd;
|
2018-09-17 06:54:05 +02:00
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
do rnd = TestContext.CurrentContext.Random.NextULong();
|
|
|
|
while (( rnd & 0x7FF0000000000000ul) == 0ul ||
|
|
|
|
(~rnd & 0x7FF0000000000000ul) == 0ul);
|
2018-09-17 06:54:05 +02:00
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
return rnd;
|
2018-09-17 06:54:05 +02:00
|
|
|
}
|
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
protected static ulong GenSubnormalD()
|
2018-09-17 06:54:05 +02:00
|
|
|
{
|
2018-11-01 05:22:09 +01:00
|
|
|
ulong rnd;
|
2018-09-17 06:54:05 +02:00
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
do rnd = TestContext.CurrentContext.Random.NextULong();
|
|
|
|
while ((rnd & 0x000FFFFFFFFFFFFFul) == 0ul);
|
2018-09-17 06:54:05 +02:00
|
|
|
|
2018-11-01 05:22:09 +01:00
|
|
|
return rnd & 0x800FFFFFFFFFFFFFul;
|
2018-09-17 06:54:05 +02:00
|
|
|
}
|
2018-02-16 01:04:38 +01:00
|
|
|
}
|
|
|
|
}
|