SPIR-V: Change BitfieldExtract and BitfieldInsert for SPIRV-Cross (#4336)

* SPIR-V: Change BitfieldExtract and BitfieldInsert types to make Metal MSL compiler happy

* Shader cache version bump
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gdkchan 2023-01-23 19:20:40 -03:00 committed by GitHub
parent ad6ff6ce99
commit 2fd819613f
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2 changed files with 27 additions and 27 deletions

View file

@ -22,7 +22,7 @@ namespace Ryujinx.Graphics.Gpu.Shader.DiskCache
private const ushort FileFormatVersionMajor = 1; private const ushort FileFormatVersionMajor = 1;
private const ushort FileFormatVersionMinor = 2; private const ushort FileFormatVersionMinor = 2;
private const uint FileFormatVersionPacked = ((uint)FileFormatVersionMajor << 16) | FileFormatVersionMinor; private const uint FileFormatVersionPacked = ((uint)FileFormatVersionMajor << 16) | FileFormatVersionMinor;
private const uint CodeGenVersion = 4318; private const uint CodeGenVersion = 4336;
private const string SharedTocFileName = "shared.toc"; private const string SharedTocFileName = "shared.toc";
private const string SharedDataFileName = "shared.data"; private const string SharedDataFileName = "shared.data";

View file

@ -261,17 +261,17 @@ namespace Ryujinx.Graphics.Shader.CodeGen.Spirv
private static OperationResult GenerateBitfieldExtractS32(CodeGenContext context, AstOperation operation) private static OperationResult GenerateBitfieldExtractS32(CodeGenContext context, AstOperation operation)
{ {
return GenerateTernaryS32(context, operation, context.Delegates.BitFieldSExtract); return GenerateBitfieldExtractS32(context, operation, context.Delegates.BitFieldSExtract);
} }
private static OperationResult GenerateBitfieldExtractU32(CodeGenContext context, AstOperation operation) private static OperationResult GenerateBitfieldExtractU32(CodeGenContext context, AstOperation operation)
{ {
return GenerateTernaryS32(context, operation, context.Delegates.BitFieldUExtract); return GenerateTernaryU32(context, operation, context.Delegates.BitFieldUExtract);
} }
private static OperationResult GenerateBitfieldInsert(CodeGenContext context, AstOperation operation) private static OperationResult GenerateBitfieldInsert(CodeGenContext context, AstOperation operation)
{ {
return GenerateQuaternaryS32(context, operation, context.Delegates.BitFieldInsert); return GenerateBitfieldInsert(context, operation, context.Delegates.BitFieldInsert);
} }
private static OperationResult GenerateBitfieldReverse(CodeGenContext context, AstOperation operation) private static OperationResult GenerateBitfieldReverse(CodeGenContext context, AstOperation operation)
@ -2290,22 +2290,6 @@ namespace Ryujinx.Graphics.Shader.CodeGen.Spirv
} }
} }
private static OperationResult GenerateTernaryS32(
CodeGenContext context,
AstOperation operation,
Func<SpvInstruction, SpvInstruction, SpvInstruction, SpvInstruction, SpvInstruction> emitS)
{
var src1 = operation.GetSource(0);
var src2 = operation.GetSource(1);
var src3 = operation.GetSource(2);
return new OperationResult(AggregateType.S32, emitS(
context.TypeS32(),
context.GetS32(src1),
context.GetS32(src2),
context.GetS32(src3)));
}
private static OperationResult GenerateTernaryU32( private static OperationResult GenerateTernaryU32(
CodeGenContext context, CodeGenContext context,
AstOperation operation, AstOperation operation,
@ -2322,7 +2306,23 @@ namespace Ryujinx.Graphics.Shader.CodeGen.Spirv
context.GetU32(src3))); context.GetU32(src3)));
} }
private static OperationResult GenerateQuaternaryS32( private static OperationResult GenerateBitfieldExtractS32(
CodeGenContext context,
AstOperation operation,
Func<SpvInstruction, SpvInstruction, SpvInstruction, SpvInstruction, SpvInstruction> emitS)
{
var src1 = operation.GetSource(0);
var src2 = operation.GetSource(1);
var src3 = operation.GetSource(2);
return new OperationResult(AggregateType.S32, emitS(
context.TypeS32(),
context.GetS32(src1),
context.GetU32(src2),
context.GetU32(src3)));
}
private static OperationResult GenerateBitfieldInsert(
CodeGenContext context, CodeGenContext context,
AstOperation operation, AstOperation operation,
Func<SpvInstruction, SpvInstruction, SpvInstruction, SpvInstruction, SpvInstruction, SpvInstruction> emitS) Func<SpvInstruction, SpvInstruction, SpvInstruction, SpvInstruction, SpvInstruction, SpvInstruction> emitS)
@ -2332,12 +2332,12 @@ namespace Ryujinx.Graphics.Shader.CodeGen.Spirv
var src3 = operation.GetSource(2); var src3 = operation.GetSource(2);
var src4 = operation.GetSource(3); var src4 = operation.GetSource(3);
return new OperationResult(AggregateType.S32, emitS( return new OperationResult(AggregateType.U32, emitS(
context.TypeS32(), context.TypeU32(),
context.GetS32(src1), context.GetU32(src1),
context.GetS32(src2), context.GetU32(src2),
context.GetS32(src3), context.GetU32(src3),
context.GetS32(src4))); context.GetU32(src4)));
} }
} }
} }