diff --git a/ARMeilleure/Decoders/OpCodeTable.cs b/ARMeilleure/Decoders/OpCodeTable.cs
index 3b3174bb4..be7c8c960 100644
--- a/ARMeilleure/Decoders/OpCodeTable.cs
+++ b/ARMeilleure/Decoders/OpCodeTable.cs
@@ -288,6 +288,7 @@ namespace ARMeilleure.Decoders
             SetA64("0>0011100<100001101110xxxxxxxxxx", InstName.Fcvtms_V,        InstEmit.Fcvtms_V,        OpCodeSimd.Create);
             SetA64("x00111100x110001000000xxxxxxxxxx", InstName.Fcvtmu_Gp,       InstEmit.Fcvtmu_Gp,       OpCodeSimdCvt.Create);
             SetA64("0x0011100x100001011010xxxxxxxxxx", InstName.Fcvtn_V,         InstEmit.Fcvtn_V,         OpCodeSimd.Create);
+            SetA64("x00111100x100000000000xxxxxxxxxx", InstName.Fcvtns_Gp,       InstEmit.Fcvtns_Gp,       OpCodeSimdCvt.Create);
             SetA64("010111100x100001101010xxxxxxxxxx", InstName.Fcvtns_S,        InstEmit.Fcvtns_S,        OpCodeSimd.Create);
             SetA64("0>0011100<100001101010xxxxxxxxxx", InstName.Fcvtns_V,        InstEmit.Fcvtns_V,        OpCodeSimd.Create);
             SetA64("011111100x100001101010xxxxxxxxxx", InstName.Fcvtnu_S,        InstEmit.Fcvtnu_S,        OpCodeSimd.Create);
diff --git a/ARMeilleure/Instructions/InstEmitSimdCvt.cs b/ARMeilleure/Instructions/InstEmitSimdCvt.cs
index e6400e068..84d81fac1 100644
--- a/ARMeilleure/Instructions/InstEmitSimdCvt.cs
+++ b/ARMeilleure/Instructions/InstEmitSimdCvt.cs
@@ -314,6 +314,18 @@ namespace ARMeilleure.Instructions
             }
         }
 
+        public static void Fcvtns_Gp(ArmEmitterContext context)
+        {
+            if (Optimizations.UseSse41)
+            {
+                EmitSse41Fcvts_Gp(context, FPRoundingMode.ToNearest, isFixed: false);
+            }
+            else
+            {
+                EmitFcvt_s_Gp(context, (op1) => EmitRoundMathCall(context, MidpointRounding.ToEven, op1));
+            }
+        }
+
         public static void Fcvtns_S(ArmEmitterContext context)
         {
             if (Optimizations.UseSse41)
diff --git a/ARMeilleure/Instructions/InstName.cs b/ARMeilleure/Instructions/InstName.cs
index 081a1ef5f..a520c86a3 100644
--- a/ARMeilleure/Instructions/InstName.cs
+++ b/ARMeilleure/Instructions/InstName.cs
@@ -191,6 +191,7 @@ namespace ARMeilleure.Instructions
         Fcvtms_V,
         Fcvtmu_Gp,
         Fcvtn_V,
+        Fcvtns_Gp,
         Fcvtns_S,
         Fcvtns_V,
         Fcvtnu_S,
diff --git a/ARMeilleure/Translation/PTC/Ptc.cs b/ARMeilleure/Translation/PTC/Ptc.cs
index 258ea9233..2142e34f5 100644
--- a/ARMeilleure/Translation/PTC/Ptc.cs
+++ b/ARMeilleure/Translation/PTC/Ptc.cs
@@ -27,7 +27,7 @@ namespace ARMeilleure.Translation.PTC
         private const string OuterHeaderMagicString = "PTCohd\0\0";
         private const string InnerHeaderMagicString = "PTCihd\0\0";
 
-        private const uint InternalVersion = 2937; //! To be incremented manually for each change to the ARMeilleure project.
+        private const uint InternalVersion = 2953; //! To be incremented manually for each change to the ARMeilleure project.
 
         private const string ActualDir = "0";
         private const string BackupDir = "1";
diff --git a/Ryujinx.Tests/Cpu/CpuTestSimdCvt.cs b/Ryujinx.Tests/Cpu/CpuTestSimdCvt.cs
index 2d5c82318..c73fd0235 100644
--- a/Ryujinx.Tests/Cpu/CpuTestSimdCvt.cs
+++ b/Ryujinx.Tests/Cpu/CpuTestSimdCvt.cs
@@ -201,6 +201,7 @@ namespace Ryujinx.Tests.Cpu
                 0x1E250000u, // FCVTAU W0, S0
                 0x1E300000u, // FCVTMS W0, S0
                 0x1E310000u, // FCVTMU W0, S0
+                0x1E200000u, // FCVTNS W0, S0
                 0x1E280000u, // FCVTPS W0, S0
                 0x1E290000u, // FCVTPU W0, S0
                 0x1E380000u, // FCVTZS W0, S0
@@ -216,6 +217,7 @@ namespace Ryujinx.Tests.Cpu
                 0x9E250000u, // FCVTAU X0, S0
                 0x9E300000u, // FCVTMS X0, S0
                 0x9E310000u, // FCVTMU X0, S0
+                0x9E200000u, // FCVTNS X0, S0
                 0x9E280000u, // FCVTPS X0, S0
                 0x9E290000u, // FCVTPU X0, S0
                 0x9E380000u, // FCVTZS X0, S0
@@ -231,6 +233,7 @@ namespace Ryujinx.Tests.Cpu
                 0x1E650000u, // FCVTAU W0, D0
                 0x1E700000u, // FCVTMS W0, D0
                 0x1E710000u, // FCVTMU W0, D0
+                0x1E600000u, // FCVTNS W0, D0
                 0x1E680000u, // FCVTPS W0, D0
                 0x1E690000u, // FCVTPU W0, D0
                 0x1E780000u, // FCVTZS W0, D0
@@ -246,6 +249,7 @@ namespace Ryujinx.Tests.Cpu
                 0x9E650000u, // FCVTAU X0, D0
                 0x9E700000u, // FCVTMS X0, D0
                 0x9E710000u, // FCVTMU X0, D0
+                0x9E600000u, // FCVTNS X0, D0
                 0x9E680000u, // FCVTPS X0, D0
                 0x9E690000u, // FCVTPU X0, D0
                 0x9E780000u, // FCVTZS X0, D0