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ARMeilleure: A32: Implement SHSUB8 and UHSUB8 (#3089)
* ARMeilleure: A32: Implement UHSUB8 * ARMeilleure: A32: Implement SHSUB8
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4 changed files with 87 additions and 0 deletions
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@ -734,6 +734,7 @@ namespace ARMeilleure.Decoders
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SetA32("<<<<0111101xxxxxxxxxxxxxx101xxxx", InstName.Sbfx, InstEmit32.Sbfx, OpCode32AluBf.Create);
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SetA32("<<<<0111101xxxxxxxxxxxxxx101xxxx", InstName.Sbfx, InstEmit32.Sbfx, OpCode32AluBf.Create);
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SetA32("<<<<01110001xxxx1111xxxx0001xxxx", InstName.Sdiv, InstEmit32.Sdiv, OpCode32AluMla.Create);
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SetA32("<<<<01110001xxxx1111xxxx0001xxxx", InstName.Sdiv, InstEmit32.Sdiv, OpCode32AluMla.Create);
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SetA32("<<<<01100011xxxxxxxx11111001xxxx", InstName.Shadd8, InstEmit32.Shadd8, OpCode32AluReg.Create);
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SetA32("<<<<01100011xxxxxxxx11111001xxxx", InstName.Shadd8, InstEmit32.Shadd8, OpCode32AluReg.Create);
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SetA32("<<<<01100011xxxxxxxx11111111xxxx", InstName.Shsub8, InstEmit32.Shsub8, OpCode32AluReg.Create);
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SetA32("<<<<00010000xxxxxxxxxxxx1xx0xxxx", InstName.Smla__, InstEmit32.Smla__, OpCode32AluMla.Create);
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SetA32("<<<<00010000xxxxxxxxxxxx1xx0xxxx", InstName.Smla__, InstEmit32.Smla__, OpCode32AluMla.Create);
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SetA32("<<<<0000111xxxxxxxxxxxxx1001xxxx", InstName.Smlal, InstEmit32.Smlal, OpCode32AluUmull.Create);
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SetA32("<<<<0000111xxxxxxxxxxxxx1001xxxx", InstName.Smlal, InstEmit32.Smlal, OpCode32AluUmull.Create);
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SetA32("<<<<00010100xxxxxxxxxxxx1xx0xxxx", InstName.Smlal__, InstEmit32.Smlal__, OpCode32AluUmull.Create);
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SetA32("<<<<00010100xxxxxxxxxxxx1xx0xxxx", InstName.Smlal__, InstEmit32.Smlal__, OpCode32AluUmull.Create);
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@ -782,6 +783,7 @@ namespace ARMeilleure.Decoders
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SetA32("<<<<0111111xxxxxxxxxxxxxx101xxxx", InstName.Ubfx, InstEmit32.Ubfx, OpCode32AluBf.Create);
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SetA32("<<<<0111111xxxxxxxxxxxxxx101xxxx", InstName.Ubfx, InstEmit32.Ubfx, OpCode32AluBf.Create);
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SetA32("<<<<01110011xxxx1111xxxx0001xxxx", InstName.Udiv, InstEmit32.Udiv, OpCode32AluMla.Create);
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SetA32("<<<<01110011xxxx1111xxxx0001xxxx", InstName.Udiv, InstEmit32.Udiv, OpCode32AluMla.Create);
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SetA32("<<<<01100111xxxxxxxx11111001xxxx", InstName.Uhadd8, InstEmit32.Uhadd8, OpCode32AluReg.Create);
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SetA32("<<<<01100111xxxxxxxx11111001xxxx", InstName.Uhadd8, InstEmit32.Uhadd8, OpCode32AluReg.Create);
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SetA32("<<<<01100111xxxxxxxx11111111xxxx", InstName.Uhsub8, InstEmit32.Uhsub8, OpCode32AluReg.Create);
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SetA32("<<<<00000100xxxxxxxxxxxx1001xxxx", InstName.Umaal, InstEmit32.Umaal, OpCode32AluUmull.Create);
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SetA32("<<<<00000100xxxxxxxxxxxx1001xxxx", InstName.Umaal, InstEmit32.Umaal, OpCode32AluUmull.Create);
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SetA32("<<<<0000101xxxxxxxxxxxxx1001xxxx", InstName.Umlal, InstEmit32.Umlal, OpCode32AluUmull.Create);
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SetA32("<<<<0000101xxxxxxxxxxxxx1001xxxx", InstName.Umlal, InstEmit32.Umlal, OpCode32AluUmull.Create);
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SetA32("<<<<0000100xxxxxxxxxxxxx1001xxxx", InstName.Umull, InstEmit32.Umull, OpCode32AluUmull.Create);
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SetA32("<<<<0000100xxxxxxxxxxxxx1001xxxx", InstName.Umull, InstEmit32.Umull, OpCode32AluUmull.Create);
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@ -392,6 +392,11 @@ namespace ARMeilleure.Instructions
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EmitHadd8(context, false);
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EmitHadd8(context, false);
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}
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}
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public static void Shsub8(ArmEmitterContext context)
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{
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EmitHsub8(context, false);
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}
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public static void Ssat(ArmEmitterContext context)
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public static void Ssat(ArmEmitterContext context)
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{
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{
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OpCode32Sat op = (OpCode32Sat)context.CurrOp;
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OpCode32Sat op = (OpCode32Sat)context.CurrOp;
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@ -482,6 +487,11 @@ namespace ARMeilleure.Instructions
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EmitHadd8(context, true);
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EmitHadd8(context, true);
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}
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}
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public static void Uhsub8(ArmEmitterContext context)
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{
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EmitHsub8(context, true);
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}
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public static void Usat(ArmEmitterContext context)
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public static void Usat(ArmEmitterContext context)
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{
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{
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OpCode32Sat op = (OpCode32Sat)context.CurrOp;
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OpCode32Sat op = (OpCode32Sat)context.CurrOp;
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@ -681,6 +691,41 @@ namespace ARMeilleure.Instructions
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SetIntA32(context, op.Rd, res);
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SetIntA32(context, op.Rd, res);
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}
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}
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private static void EmitHsub8(ArmEmitterContext context, bool unsigned)
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{
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OpCode32AluReg op = (OpCode32AluReg)context.CurrOp;
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Operand m = GetIntA32(context, op.Rm);
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Operand n = GetIntA32(context, op.Rn);
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Operand left, right, carry, res;
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// This relies on the equality x-y == (x^y) - (((x^y)&y) << 1).
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// Note that x^y always contains the LSB of the result.
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// Since we want to calculate (x+y)/2, we can instead calculate ((x^y)>>1) - ((x^y)&y).
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carry = context.BitwiseExclusiveOr(m, n);
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left = context.ShiftRightUI(carry, Const(1));
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right = context.BitwiseAnd(carry, m);
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// We must now perform a partitioned subtraction.
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// We can do this because minuend contains 7 bit fields.
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// We use the extra bit in minuend as a bit to borrow from; we set this bit.
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// We invert this bit at the end as this tells us if that bit was borrowed from.
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res = context.BitwiseOr(left, Const(0x80808080));
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res = context.Subtract(res, right);
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res = context.BitwiseExclusiveOr(res, Const(0x80808080));
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if (!unsigned)
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{
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// We then sign extend the result into this bit.
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carry = context.BitwiseAnd(carry, Const(0x80808080));
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res = context.BitwiseExclusiveOr(res, carry);
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}
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SetIntA32(context, op.Rd, res);
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}
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private static void EmitSat(ArmEmitterContext context, int intMin, int intMax)
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private static void EmitSat(ArmEmitterContext context, int intMin, int intMax)
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{
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{
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OpCode32Sat op = (OpCode32Sat)context.CurrOp;
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OpCode32Sat op = (OpCode32Sat)context.CurrOp;
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@ -80,6 +80,7 @@ namespace ARMeilleure.Instructions
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Sbcs,
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Sbcs,
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Sbfm,
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Sbfm,
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Sdiv,
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Sdiv,
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Shsub8,
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Smaddl,
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Smaddl,
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Smsubl,
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Smsubl,
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Smulh,
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Smulh,
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@ -546,6 +547,7 @@ namespace ARMeilleure.Instructions
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Tst,
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Tst,
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Ubfx,
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Ubfx,
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Uhadd8,
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Uhadd8,
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Uhsub8,
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Umaal,
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Umaal,
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Umlal,
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Umlal,
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Umull,
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Umull,
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@ -96,6 +96,25 @@ namespace Ryujinx.Tests.Cpu
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CompareAgainstUnicorn();
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CompareAgainstUnicorn();
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}
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}
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[Test, Pairwise]
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public void Shsub8([Values(0u, 0xdu)] uint rd,
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[Values(1u)] uint rm,
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[Values(2u)] uint rn,
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[Random(RndCnt)] uint w0,
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[Random(RndCnt)] uint w1,
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[Random(RndCnt)] uint w2)
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{
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uint opcode = 0xE6300FF0u; // SHSUB8 R0, R0, R0
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opcode |= ((rm & 15) << 0) | ((rd & 15) << 12) | ((rn & 15) << 16);
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uint sp = TestContext.CurrentContext.Random.NextUInt();
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SingleOpcode(opcode, r0: w0, r1: w1, r2: w2, sp: sp);
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CompareAgainstUnicorn();
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}
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[Test, Pairwise]
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[Test, Pairwise]
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public void Ssat_Usat([ValueSource("_Ssat_Usat_")] uint opcode,
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public void Ssat_Usat([ValueSource("_Ssat_Usat_")] uint opcode,
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[Values(0u, 0xdu)] uint rd,
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[Values(0u, 0xdu)] uint rd,
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@ -149,6 +168,25 @@ namespace Ryujinx.Tests.Cpu
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CompareAgainstUnicorn();
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CompareAgainstUnicorn();
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}
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}
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[Test, Pairwise]
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public void Uhsub8([Values(0u, 0xdu)] uint rd,
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[Values(1u)] uint rm,
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[Values(2u)] uint rn,
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[Random(RndCnt)] uint w0,
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[Random(RndCnt)] uint w1,
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[Random(RndCnt)] uint w2)
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{
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uint opcode = 0xE6700FF0u; // UHSUB8 R0, R0, R0
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opcode |= ((rm & 15) << 0) | ((rd & 15) << 12) | ((rn & 15) << 16);
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uint sp = TestContext.CurrentContext.Random.NextUInt();
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SingleOpcode(opcode, r0: w0, r1: w1, r2: w2, sp: sp);
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CompareAgainstUnicorn();
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}
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#endif
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#endif
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}
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}
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}
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}
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