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AInstEmitSimdCvt: Half-precision to single-precision conversion (#235)
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3 changed files with 80 additions and 4 deletions
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@ -45,10 +45,10 @@ namespace ChocolArm64.Instruction
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{
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{
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if (SizeF == 0)
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if (SizeF == 0)
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{
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{
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//TODO: This need the half precision floating point type,
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EmitVectorExtractZx(Context, Op.Rn, Part + Index, 1);
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//that is not yet supported on .NET. We should probably
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Context.Emit(OpCodes.Conv_U2);
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//do our own implementation on the meantime.
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throw new NotImplementedException();
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Context.EmitCall(typeof(ASoftFloat), nameof(ASoftFloat.ConvertHalfToSingle));
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}
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}
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else /* if (SizeF == 1) */
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else /* if (SizeF == 1) */
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{
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{
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@ -225,5 +225,41 @@ namespace ChocolArm64.Instruction
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return 2.0 + op1 * op2;
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return 2.0 + op1 * op2;
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}
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}
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public static float ConvertHalfToSingle(ushort x)
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{
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uint x_sign = (uint)(x >> 15) & 0x0001;
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uint x_exp = (uint)(x >> 10) & 0x001F;
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uint x_mantissa = (uint)x & 0x03FF;
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if (x_exp == 0 && x_mantissa == 0)
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{
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// Zero
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return BitConverter.Int32BitsToSingle((int)(x_sign << 31));
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}
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if (x_exp == 0x1F)
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{
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// NaN or Infinity
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return BitConverter.Int32BitsToSingle((int)((x_sign << 31) | 0x7F800000 | (x_mantissa << 13)));
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}
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int exponent = (int)x_exp - 15;
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if (x_exp == 0)
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{
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// Denormal
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x_mantissa <<= 1;
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while ((x_mantissa & 0x0400) == 0)
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{
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x_mantissa <<= 1;
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exponent--;
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}
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x_mantissa &= 0x03FF;
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}
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uint new_exp = (uint)((exponent + 127) & 0xFF) << 23;
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return BitConverter.Int32BitsToSingle((int)((x_sign << 31) | new_exp | (x_mantissa << 13)));
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}
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}
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}
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}
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}
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40
Ryujinx.Tests/Cpu/CpuTestSimdCvt.cs
Normal file
40
Ryujinx.Tests/Cpu/CpuTestSimdCvt.cs
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@ -0,0 +1,40 @@
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using ChocolArm64.State;
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using NUnit.Framework;
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using System.Runtime.Intrinsics;
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using System.Runtime.Intrinsics.X86;
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namespace Ryujinx.Tests.Cpu
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{
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public class CpuTestSimdCvt : CpuTest
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{
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[TestCase((ushort)0x0000, 0x00000000u)] // Positive Zero
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[TestCase((ushort)0x8000, 0x80000000u)] // Negative Zero
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[TestCase((ushort)0x3E00, 0x3FC00000u)] // +1.5
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[TestCase((ushort)0xBE00, 0xBFC00000u)] // -1.5
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[TestCase((ushort)0xFFFF, 0xFFFFE000u)] // -QNaN
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[TestCase((ushort)0x7C00, 0x7F800000u)] // +Inf
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[TestCase((ushort)0x3C00, 0x3F800000u)] // 1.0
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[TestCase((ushort)0x3C01, 0x3F802000u)] // 1.0009765625
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[TestCase((ushort)0xC000, 0xC0000000u)] // -2.0
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[TestCase((ushort)0x7BFF, 0x477FE000u)] // 65504.0 (Largest Normal)
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[TestCase((ushort)0x03FF, 0x387FC000u)] // 0.00006097555 (Largest Subnormal)
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[TestCase((ushort)0x0001, 0x33800000u)] // 5.96046448e-8 (Smallest Subnormal)
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public void Fcvtl_V_f16(ushort Value, uint Result)
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{
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uint Opcode = 0x0E217801;
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Vector128<float> V0 = Sse.StaticCast<ushort, float>(Sse2.SetAllVector128(Value));
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AThreadState ThreadState = SingleOpcode(Opcode, V0: V0);
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Assert.Multiple(() =>
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{
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Assert.That(Sse41.Extract(Sse.StaticCast<float, uint>(ThreadState.V1), (byte)0), Is.EqualTo(Result));
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Assert.That(Sse41.Extract(Sse.StaticCast<float, uint>(ThreadState.V1), (byte)1), Is.EqualTo(Result));
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Assert.That(Sse41.Extract(Sse.StaticCast<float, uint>(ThreadState.V1), (byte)2), Is.EqualTo(Result));
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Assert.That(Sse41.Extract(Sse.StaticCast<float, uint>(ThreadState.V1), (byte)3), Is.EqualTo(Result));
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});
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}
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}
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}
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