[Ryujinx.Tests.Unicorn] Address dotnet-format issues (#5391)

* dotnet format style --severity info

Some changes were manually reverted.

* Restore a few unused methods and variables

* Address most dotnet format whitespace warnings

* Apply dotnet format whitespace formatting

A few of them have been manually reverted and the corresponding warning was silenced

* Add comments to disabled warnings

* Simplify properties and array initialization, Use const when possible, Remove trailing commas

* Revert "Simplify properties and array initialization, Use const when possible, Remove trailing commas"

This reverts commit 9462e4136c0a2100dc28b20cf9542e06790aa67e.

* dotnet format whitespace after rebase

* Final dotnet format pass and fix naming rule violations
This commit is contained in:
TSRBerry 2023-06-25 18:03:08 +02:00 committed by GitHub
parent e3bacfa774
commit bddb2a1483
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5 changed files with 75 additions and 75 deletions

View file

@ -4,12 +4,12 @@ namespace Ryujinx.Tests.Unicorn
{
public class IndexedProperty<TIndex, TValue>
{
private Func<TIndex, TValue> _getFunc;
private Action<TIndex, TValue> _setAction;
private readonly Func<TIndex, TValue> _getFunc;
private readonly Action<TIndex, TValue> _setAction;
public IndexedProperty(Func<TIndex, TValue> getFunc, Action<TIndex, TValue> setAction)
{
_getFunc = getFunc;
_getFunc = getFunc;
_setAction = setAction;
}

View file

@ -11,4 +11,4 @@ namespace Ryujinx.Tests.Unicorn
Exec = 4,
All = 7,
}
}
}

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@ -2,7 +2,7 @@ using System;
namespace Ryujinx.Tests.Unicorn
{
public struct SimdValue : IEquatable<SimdValue>
public readonly struct SimdValue : IEquatable<SimdValue>
{
private readonly ulong _e0;
private readonly ulong _e1;
@ -39,31 +39,29 @@ namespace Ryujinx.Tests.Unicorn
return BitConverter.Int64BitsToDouble(GetInt64(index));
}
public int GetInt32(int index) => (int)GetUInt32(index);
public int GetInt32(int index) => (int)GetUInt32(index);
public long GetInt64(int index) => (long)GetUInt64(index);
public uint GetUInt32(int index)
{
switch (index)
return index switch
{
case 0: return (uint)(_e0 >> 0);
case 1: return (uint)(_e0 >> 32);
case 2: return (uint)(_e1 >> 0);
case 3: return (uint)(_e1 >> 32);
}
throw new ArgumentOutOfRangeException(nameof(index));
0 => (uint)(_e0 >> 0),
1 => (uint)(_e0 >> 32),
2 => (uint)(_e1 >> 0),
3 => (uint)(_e1 >> 32),
_ => throw new ArgumentOutOfRangeException(nameof(index)),
};
}
public ulong GetUInt64(int index)
{
switch (index)
return index switch
{
case 0: return _e0;
case 1: return _e1;
}
throw new ArgumentOutOfRangeException(nameof(index));
0 => _e0,
1 => _e1,
_ => throw new ArgumentOutOfRangeException(nameof(index)),
};
}
public byte[] ToArray()
@ -109,4 +107,4 @@ namespace Ryujinx.Tests.Unicorn
return $"0x{_e1:X16}{_e0:X16}";
}
}
}
}

View file

@ -5,7 +5,7 @@ namespace Ryujinx.Tests.Unicorn
{
public class UnicornAArch32 : IDisposable
{
internal readonly UnicornEngine.Unicorn uc;
internal readonly UnicornEngine.Unicorn Uc;
private bool _isDisposed;
public IndexedProperty<int, uint> R => new(GetX, SetX);
@ -84,7 +84,7 @@ namespace Ryujinx.Tests.Unicorn
public UnicornAArch32()
{
uc = new UnicornEngine.Unicorn(Common.UC_ARCH_ARM, Common.UC_MODE_LITTLE_ENDIAN);
Uc = new UnicornEngine.Unicorn(Common.UC_ARCH_ARM, Common.UC_MODE_LITTLE_ENDIAN);
SetRegister(Arm.UC_ARM_REG_C1_C0_2, GetRegister(Arm.UC_ARM_REG_C1_C0_2) | 0xf00000);
SetRegister(Arm.UC_ARM_REG_FPEXC, 0x40000000);
@ -105,7 +105,7 @@ namespace Ryujinx.Tests.Unicorn
{
if (!_isDisposed)
{
uc.Close();
Uc.Close();
_isDisposed = true;
}
}
@ -113,7 +113,7 @@ namespace Ryujinx.Tests.Unicorn
public void RunForCount(ulong count)
{
// FIXME: untilAddr should be 0xFFFFFFFFFFFFFFFFu
uc.EmuStart(this.PC, -1, 0, (long)count);
Uc.EmuStart(this.PC, -1, 0, (long)count);
}
public void Step()
@ -121,7 +121,7 @@ namespace Ryujinx.Tests.Unicorn
RunForCount(1);
}
private static int[] XRegisters =
private static readonly int[] _xRegisters =
{
Arm.UC_ARM_REG_R0,
Arm.UC_ARM_REG_R1,
@ -141,7 +141,8 @@ namespace Ryujinx.Tests.Unicorn
Arm.UC_ARM_REG_R15,
};
private static int[] QRegisters =
#pragma warning disable IDE0051, IDE0052 // Remove unused private member
private static readonly int[] _qRegisters =
{
Arm.UC_ARM_REG_Q0,
Arm.UC_ARM_REG_Q1,
@ -160,6 +161,7 @@ namespace Ryujinx.Tests.Unicorn
Arm.UC_ARM_REG_Q14,
Arm.UC_ARM_REG_Q15
};
#pragma warning restore IDE0051, IDE0052
public uint GetX(int index)
{
@ -168,7 +170,7 @@ namespace Ryujinx.Tests.Unicorn
throw new ArgumentOutOfRangeException(nameof(index));
}
return GetRegister(XRegisters[index]);
return GetRegister(_xRegisters[index]);
}
public void SetX(int index, uint value)
@ -178,7 +180,7 @@ namespace Ryujinx.Tests.Unicorn
throw new ArgumentOutOfRangeException(nameof(index));
}
SetRegister(XRegisters[index], value);
SetRegister(_xRegisters[index], value);
}
public SimdValue GetQ(int index)
@ -206,7 +208,7 @@ namespace Ryujinx.Tests.Unicorn
{
byte[] data = new byte[4];
uc.RegRead(register, data);
Uc.RegRead(register, data);
return BitConverter.ToUInt32(data, 0);
}
@ -215,16 +217,16 @@ namespace Ryujinx.Tests.Unicorn
{
byte[] data = BitConverter.GetBytes(value);
uc.RegWrite(register, data);
Uc.RegWrite(register, data);
}
public SimdValue GetVector(int register)
{
byte[] data = new byte[8];
uc.RegRead(register, data);
Uc.RegRead(register, data);
ulong lo = BitConverter.ToUInt64(data, 0);
uc.RegRead(register + 1, data);
Uc.RegRead(register + 1, data);
ulong hi = BitConverter.ToUInt64(data, 0);
return new SimdValue(lo, hi);
@ -233,16 +235,16 @@ namespace Ryujinx.Tests.Unicorn
private void SetVector(int register, SimdValue value)
{
byte[] data = BitConverter.GetBytes(value.GetUInt64(0));
uc.RegWrite(register, data);
Uc.RegWrite(register, data);
data = BitConverter.GetBytes(value.GetUInt64(1));
uc.RegWrite(register + 1, data);
Uc.RegWrite(register + 1, data);
}
public byte[] MemoryRead(ulong address, ulong size)
{
byte[] value = new byte[size];
uc.MemRead((long)address, value);
Uc.MemRead((long)address, value);
return value;
}
@ -254,7 +256,7 @@ namespace Ryujinx.Tests.Unicorn
public void MemoryWrite(ulong address, byte[] value)
{
uc.MemWrite((long)address, value);
Uc.MemWrite((long)address, value);
}
public void MemoryWrite8(ulong address, byte value) => MemoryWrite(address, new[] { value });
@ -267,17 +269,17 @@ namespace Ryujinx.Tests.Unicorn
public void MemoryMap(ulong address, ulong size, MemoryPermission permissions)
{
uc.MemMap((long)address, (long)size, (int)permissions);
Uc.MemMap((long)address, (long)size, (int)permissions);
}
public void MemoryUnmap(ulong address, ulong size)
{
uc.MemUnmap((long)address, (long)size);
Uc.MemUnmap((long)address, (long)size);
}
public void MemoryProtect(ulong address, ulong size, MemoryPermission permissions)
{
uc.MemProtect((long)address, (long)size, (int)permissions);
Uc.MemProtect((long)address, (long)size, (int)permissions);
}
}
}
}

View file

@ -5,7 +5,7 @@ namespace Ryujinx.Tests.Unicorn
{
public class UnicornAArch64 : IDisposable
{
internal readonly UnicornEngine.Unicorn uc;
internal readonly UnicornEngine.Unicorn Uc;
private bool _isDisposed;
public IndexedProperty<int, ulong> X => new(GetX, SetX);
@ -33,48 +33,48 @@ namespace Ryujinx.Tests.Unicorn
public uint Pstate
{
get => (uint)GetRegister(Arm64.UC_ARM64_REG_PSTATE);
set => SetRegister(Arm64.UC_ARM64_REG_PSTATE, value);
set => SetRegister(Arm64.UC_ARM64_REG_PSTATE, value);
}
public int Fpcr
{
get => (int)GetRegister(Arm64.UC_ARM64_REG_FPCR);
set => SetRegister(Arm64.UC_ARM64_REG_FPCR, (uint)value);
set => SetRegister(Arm64.UC_ARM64_REG_FPCR, (uint)value);
}
public int Fpsr
{
get => (int)GetRegister(Arm64.UC_ARM64_REG_FPSR);
set => SetRegister(Arm64.UC_ARM64_REG_FPSR, (uint)value);
set => SetRegister(Arm64.UC_ARM64_REG_FPSR, (uint)value);
}
public bool OverflowFlag
{
get => (Pstate & 0x10000000u) != 0;
get => (Pstate & 0x10000000u) != 0;
set => Pstate = (Pstate & ~0x10000000u) | (value ? 0x10000000u : 0u);
}
public bool CarryFlag
{
get => (Pstate & 0x20000000u) != 0;
get => (Pstate & 0x20000000u) != 0;
set => Pstate = (Pstate & ~0x20000000u) | (value ? 0x20000000u : 0u);
}
public bool ZeroFlag
{
get => (Pstate & 0x40000000u) != 0;
get => (Pstate & 0x40000000u) != 0;
set => Pstate = (Pstate & ~0x40000000u) | (value ? 0x40000000u : 0u);
}
public bool NegativeFlag
{
get => (Pstate & 0x80000000u) != 0;
get => (Pstate & 0x80000000u) != 0;
set => Pstate = (Pstate & ~0x80000000u) | (value ? 0x80000000u : 0u);
}
public UnicornAArch64()
{
uc = new UnicornEngine.Unicorn(Common.UC_ARCH_ARM64, Common.UC_MODE_LITTLE_ENDIAN);
Uc = new UnicornEngine.Unicorn(Common.UC_ARCH_ARM64, Common.UC_MODE_LITTLE_ENDIAN);
SetRegister(Arm64.UC_ARM64_REG_CPACR_EL1, 0x00300000);
}
@ -94,7 +94,7 @@ namespace Ryujinx.Tests.Unicorn
{
if (!_isDisposed)
{
uc.Close();
Uc.Close();
_isDisposed = true;
}
}
@ -102,7 +102,7 @@ namespace Ryujinx.Tests.Unicorn
public void RunForCount(ulong count)
{
// FIXME: untilAddr should be 0xFFFFFFFFFFFFFFFFul
uc.EmuStart((long)this.PC, -1, 0, (long)count);
Uc.EmuStart((long)this.PC, -1, 0, (long)count);
}
public void Step()
@ -110,7 +110,7 @@ namespace Ryujinx.Tests.Unicorn
RunForCount(1);
}
private static int[] XRegisters =
private static readonly int[] _xRegisters =
{
Arm64.UC_ARM64_REG_X0,
Arm64.UC_ARM64_REG_X1,
@ -145,7 +145,7 @@ namespace Ryujinx.Tests.Unicorn
Arm64.UC_ARM64_REG_X30,
};
private static int[] QRegisters =
private static readonly int[] _qRegisters =
{
Arm64.UC_ARM64_REG_Q0,
Arm64.UC_ARM64_REG_Q1,
@ -188,7 +188,7 @@ namespace Ryujinx.Tests.Unicorn
throw new ArgumentOutOfRangeException(nameof(index));
}
return GetRegister(XRegisters[index]);
return GetRegister(_xRegisters[index]);
}
public void SetX(int index, ulong value)
@ -198,7 +198,7 @@ namespace Ryujinx.Tests.Unicorn
throw new ArgumentOutOfRangeException(nameof(index));
}
SetRegister(XRegisters[index], value);
SetRegister(_xRegisters[index], value);
}
public SimdValue GetQ(int index)
@ -208,7 +208,7 @@ namespace Ryujinx.Tests.Unicorn
throw new ArgumentOutOfRangeException(nameof(index));
}
return GetVector(QRegisters[index]);
return GetVector(_qRegisters[index]);
}
public void SetQ(int index, SimdValue value)
@ -218,14 +218,14 @@ namespace Ryujinx.Tests.Unicorn
throw new ArgumentOutOfRangeException(nameof(index));
}
SetVector(QRegisters[index], value);
SetVector(_qRegisters[index], value);
}
private ulong GetRegister(int register)
{
byte[] data = new byte[8];
uc.RegRead(register, data);
Uc.RegRead(register, data);
return BitConverter.ToUInt64(data, 0);
}
@ -234,14 +234,14 @@ namespace Ryujinx.Tests.Unicorn
{
byte[] data = BitConverter.GetBytes(value);
uc.RegWrite(register, data);
Uc.RegWrite(register, data);
}
private SimdValue GetVector(int register)
{
byte[] data = new byte[16];
uc.RegRead(register, data);
Uc.RegRead(register, data);
return new SimdValue(data);
}
@ -250,49 +250,49 @@ namespace Ryujinx.Tests.Unicorn
{
byte[] data = value.ToArray();
uc.RegWrite(register, data);
Uc.RegWrite(register, data);
}
public byte[] MemoryRead(ulong address, ulong size)
{
byte[] value = new byte[size];
uc.MemRead((long)address, value);
Uc.MemRead((long)address, value);
return value;
}
public byte MemoryRead8 (ulong address) => MemoryRead(address, 1)[0];
public byte MemoryRead8(ulong address) => MemoryRead(address, 1)[0];
public ushort MemoryRead16(ulong address) => BitConverter.ToUInt16(MemoryRead(address, 2), 0);
public uint MemoryRead32(ulong address) => BitConverter.ToUInt32(MemoryRead(address, 4), 0);
public ulong MemoryRead64(ulong address) => BitConverter.ToUInt64(MemoryRead(address, 8), 0);
public uint MemoryRead32(ulong address) => BitConverter.ToUInt32(MemoryRead(address, 4), 0);
public ulong MemoryRead64(ulong address) => BitConverter.ToUInt64(MemoryRead(address, 8), 0);
public void MemoryWrite(ulong address, byte[] value)
{
uc.MemWrite((long)address, value);
Uc.MemWrite((long)address, value);
}
public void MemoryWrite8 (ulong address, byte value) => MemoryWrite(address, new[]{ value });
public void MemoryWrite16(ulong address, short value) => MemoryWrite(address, BitConverter.GetBytes(value));
public void MemoryWrite8(ulong address, byte value) => MemoryWrite(address, new[] { value });
public void MemoryWrite16(ulong address, short value) => MemoryWrite(address, BitConverter.GetBytes(value));
public void MemoryWrite16(ulong address, ushort value) => MemoryWrite(address, BitConverter.GetBytes(value));
public void MemoryWrite32(ulong address, int value) => MemoryWrite(address, BitConverter.GetBytes(value));
public void MemoryWrite32(ulong address, int value) => MemoryWrite(address, BitConverter.GetBytes(value));
public void MemoryWrite32(ulong address, uint value) => MemoryWrite(address, BitConverter.GetBytes(value));
public void MemoryWrite64(ulong address, long value) => MemoryWrite(address, BitConverter.GetBytes(value));
public void MemoryWrite64(ulong address, long value) => MemoryWrite(address, BitConverter.GetBytes(value));
public void MemoryWrite64(ulong address, ulong value) => MemoryWrite(address, BitConverter.GetBytes(value));
public void MemoryMap(ulong address, ulong size, MemoryPermission permissions)
{
uc.MemMap((long)address, (long)size, (int)permissions);
Uc.MemMap((long)address, (long)size, (int)permissions);
}
public void MemoryUnmap(ulong address, ulong size)
{
uc.MemUnmap((long)address, (long)size);
Uc.MemUnmap((long)address, (long)size);
}
public void MemoryProtect(ulong address, ulong size, MemoryPermission permissions)
{
uc.MemProtect((long)address, (long)size, (int)permissions);
Uc.MemProtect((long)address, (long)size, (int)permissions);
}
}
}
}