Migrate Collection Expressions
This commit is contained in:
parent
23fa5f4c9c
commit
eb88fc1d06
454 changed files with 5755 additions and 5816 deletions
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@ -240,11 +240,11 @@ dotnet_naming_style.IPascalCase.capitalization = pascal_case
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# .NET 8 migration (new warnings are caused by the NET 8 C# compiler and analyzer)
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# The following info messages might need to be fixed in the source code instead of hiding the actual message
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# Without the following lines, dotnet format would fail
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# Disable "Collection initialization can be simplified"
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# Disable "Use collection initializers or expressions"
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dotnet_diagnostic.IDE0028.severity = none
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dotnet_diagnostic.IDE0300.severity = none
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dotnet_diagnostic.IDE0301.severity = none
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# Disable "Use collection expression for stackalloc"
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dotnet_diagnostic.IDE0302.severity = none
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# Disable "Use collection expression for fluent"
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dotnet_diagnostic.IDE0305.severity = none
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# Disable "'new' expression can be simplified"
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dotnet_diagnostic.IDE0090.severity = none
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@ -42,7 +42,7 @@ namespace ARMeilleure.CodeGen.Arm64
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{
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Offset = offset;
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Symbol = symbol;
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LdrOffsets = new List<(Operand, int)>();
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LdrOffsets = [];
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}
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}
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@ -78,9 +78,9 @@ namespace ARMeilleure.CodeGen.Arm64
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CallArgsRegionSize = maxCallArgs * 16;
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FpLrSaveRegionSize = hasCall ? 16 : 0;
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_visitedBlocks = new Dictionary<BasicBlock, long>();
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_visitedBlocks = [];
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_pendingBranches = new Dictionary<BasicBlock, List<(ArmCondition, long)>>();
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_constantPool = new Dictionary<ulong, ConstantPoolEntry>();
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_constantPool = [];
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_relocatable = relocatable;
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}
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@ -266,7 +266,7 @@ namespace ARMeilleure.CodeGen.Arm64
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}
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else
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{
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relocInfo = new RelocInfo(Array.Empty<RelocEntry>());
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relocInfo = new RelocInfo([]);
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}
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return (code, relocInfo);
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@ -1079,7 +1079,7 @@ namespace ARMeilleure.CodeGen.Arm64
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private static UnwindInfo WritePrologue(CodeGenContext context)
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{
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List<UnwindPushEntry> pushEntries = new();
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List<UnwindPushEntry> pushEntries = [];
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Operand rsp = Register(SpRegister);
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@ -140,8 +140,8 @@ namespace ARMeilleure.CodeGen.Arm64
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return false;
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}
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private static readonly string[] _sysctlNames = new string[]
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{
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private static readonly string[] _sysctlNames =
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[
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"hw.optional.floatingpoint",
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"hw.optional.AdvSIMD",
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"hw.optional.arm.FEAT_FP16",
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@ -150,8 +150,8 @@ namespace ARMeilleure.CodeGen.Arm64
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"hw.optional.arm.FEAT_LSE",
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"hw.optional.armv8_crc32",
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"hw.optional.arm.FEAT_SHA1",
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"hw.optional.arm.FEAT_SHA256",
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};
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"hw.optional.arm.FEAT_SHA256"
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];
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[Flags]
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public enum MacOsFeatureFlags
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@ -16,7 +16,7 @@ namespace ARMeilleure.CodeGen.Arm64
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public ConstantDict()
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{
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_constants = new Dictionary<(ulong, OperandType), Operand>();
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_constants = [];
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}
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public void Add(ulong value, OperandType type, Operand local)
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@ -261,10 +261,10 @@ namespace ARMeilleure.CodeGen.Arm64
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Operand dest = operation.Destination;
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List<Operand> sources = new()
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{
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operation.GetSource(0),
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};
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List<Operand> sources =
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[
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operation.GetSource(0)
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];
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int argsCount = operation.SourcesCount - 1;
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@ -365,10 +365,10 @@ namespace ARMeilleure.CodeGen.Arm64
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Operation node,
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Operation operation)
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{
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List<Operand> sources = new()
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{
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operation.GetSource(0),
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};
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List<Operand> sources =
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[
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operation.GetSource(0)
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];
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int argsCount = operation.SourcesCount - 1;
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@ -468,8 +468,8 @@ namespace ARMeilleure.CodeGen.Arm64
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// Update the sources and destinations with split 64-bit halfs of the whole 128-bit values.
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// We also need a additional registers that will be used to store temporary information.
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operation.SetDestinations(new[] { actualLow, actualHigh, Local(OperandType.I64), Local(OperandType.I64) });
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operation.SetSources(new[] { address, expectedLow, expectedHigh, desiredLow, desiredHigh });
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operation.SetDestinations([actualLow, actualHigh, Local(OperandType.I64), Local(OperandType.I64)]);
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operation.SetSources([address, expectedLow, expectedHigh, desiredLow, desiredHigh]);
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// Add some dummy uses of the input operands, as the CAS operation will be a loop,
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// so they can't be used as destination operand.
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@ -486,7 +486,7 @@ namespace ARMeilleure.CodeGen.Arm64
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else
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{
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// We need a additional register where the store result will be written to.
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node.SetDestinations(new[] { node.Destination, Local(OperandType.I32) });
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node.SetDestinations([node.Destination, Local(OperandType.I32)]);
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// Add some dummy uses of the input operands, as the CAS operation will be a loop,
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// so they can't be used as destination operand.
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@ -31,7 +31,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
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public ParallelCopy()
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{
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_copies = new List<Copy>();
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_copies = [];
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}
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public void AddCopy(Register dest, Register source, OperandType type)
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@ -41,10 +41,10 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
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public void Sequence(List<Operation> sequence)
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{
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Dictionary<Register, Register> locations = new();
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Dictionary<Register, Register> sources = new();
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Dictionary<Register, Register> locations = [];
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Dictionary<Register, Register> sources = [];
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Dictionary<Register, OperandType> types = new();
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Dictionary<Register, OperandType> types = [];
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Queue<Register> pendingQueue = new();
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Queue<Register> readyQueue = new();
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@ -218,7 +218,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
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public Operation[] Sequence()
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{
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List<Operation> sequence = new();
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List<Operation> sequence = [];
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if (_spillQueue != null)
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{
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@ -574,7 +574,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
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private void InsertSplitCopies()
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{
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Dictionary<int, CopyResolver> copyResolvers = new();
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Dictionary<int, CopyResolver> copyResolvers = [];
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CopyResolver GetCopyResolver(int position)
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{
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@ -799,8 +799,8 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
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private void NumberLocals(ControlFlowGraph cfg, int registersCount)
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{
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_operationNodes = new List<(IntrusiveList<Operation>, Operation)>();
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_intervals = new List<LiveInterval>();
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_operationNodes = [];
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_intervals = [];
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for (int index = 0; index < registersCount; index++)
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{
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@ -980,7 +980,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
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_blockLiveIn = blkLiveIn;
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_blockEdges = new HashSet<int>();
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_blockEdges = [];
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// Compute lifetime intervals.
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int operationPos = _operationsCount;
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@ -73,10 +73,10 @@ namespace ARMeilleure.CodeGen.X86
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public Assembler(Stream stream, bool relocatable)
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{
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_stream = stream;
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_labels = new Dictionary<Operand, long>();
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_jumps = new List<Jump>();
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_labels = [];
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_jumps = [];
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_relocs = relocatable ? new List<Reloc>() : null;
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_relocs = relocatable ? [] : null;
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}
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public void MarkLabel(Operand label)
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@ -1418,7 +1418,7 @@ namespace ARMeilleure.CodeGen.X86
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int relocOffset = 0;
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var relocEntries = hasRelocs
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? new RelocEntry[relocs.Length]
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: Array.Empty<RelocEntry>();
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: [];
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for (int i = 0; i < jumps.Length; i++)
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{
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@ -1748,7 +1748,7 @@ namespace ARMeilleure.CodeGen.X86
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private static UnwindInfo WritePrologue(CodeGenContext context)
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{
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List<UnwindPushEntry> pushEntries = new();
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List<UnwindPushEntry> pushEntries = [];
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Operand rsp = Register(X86Register.Rsp);
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@ -124,13 +124,13 @@ namespace ARMeilleure.CodeGen.X86
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{
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int stackOffset = stackAlloc.Allocate(OperandType.I32);
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node.SetSources(new Operand[] { Const(stackOffset), node.GetSource(0) });
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node.SetSources([Const(stackOffset), node.GetSource(0)]);
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}
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else if (node.Intrinsic == Intrinsic.X86Stmxcsr)
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{
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int stackOffset = stackAlloc.Allocate(OperandType.I32);
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node.SetSources(new Operand[] { Const(stackOffset) });
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node.SetSources([Const(stackOffset)]);
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}
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break;
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}
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@ -253,8 +253,8 @@ namespace ARMeilleure.CodeGen.X86
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node = nodes.AddAfter(node, Operation(Instruction.VectorCreateScalar, dest, rax));
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nodes.AddAfter(node, Operation(Instruction.VectorInsert, dest, dest, rdx, Const(1)));
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operation.SetDestinations(new Operand[] { rdx, rax });
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operation.SetSources(new Operand[] { operation.GetSource(0), rdx, rax, rcx, rbx });
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operation.SetDestinations([rdx, rax]);
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operation.SetSources([operation.GetSource(0), rdx, rax, rcx, rbx]);
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}
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else
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{
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@ -274,7 +274,7 @@ namespace ARMeilleure.CodeGen.X86
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nodes.AddBefore(node, Operation(Instruction.Copy, temp, newValue));
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node.SetSources(new Operand[] { node.GetSource(0), rax, temp });
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node.SetSources([node.GetSource(0), rax, temp]);
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nodes.AddAfter(node, Operation(Instruction.Copy, dest, rax));
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@ -303,7 +303,7 @@ namespace ARMeilleure.CodeGen.X86
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nodes.AddAfter(node, Operation(Instruction.Copy, dest, rax));
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node.SetSources(new Operand[] { rdx, rax, node.GetSource(1) });
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node.SetSources([rdx, rax, node.GetSource(1)]);
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node.Destination = rax;
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}
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@ -348,7 +348,7 @@ namespace ARMeilleure.CodeGen.X86
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nodes.AddAfter(node, Operation(Instruction.Copy, dest, rdx));
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node.SetDestinations(new Operand[] { rdx, rax });
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node.SetDestinations([rdx, rax]);
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break;
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}
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@ -14,10 +14,10 @@ namespace ARMeilleure.CodeGen.X86
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{
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Operand dest = node.Destination;
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List<Operand> sources = new()
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{
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node.GetSource(0),
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};
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List<Operand> sources =
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[
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node.GetSource(0)
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];
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int argsCount = node.SourcesCount - 1;
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@ -117,10 +117,10 @@ namespace ARMeilleure.CodeGen.X86
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public static void InsertTailcallCopies(IntrusiveList<Operation> nodes, Operation node)
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{
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List<Operand> sources = new()
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{
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node.GetSource(0),
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};
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List<Operand> sources =
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[
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node.GetSource(0)
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];
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int argsCount = node.SourcesCount - 1;
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@ -321,7 +321,7 @@ namespace ARMeilleure.CodeGen.X86
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nodes.AddBefore(node, retCopyOp);
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}
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node.SetSources(Array.Empty<Operand>());
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node.SetSources([]);
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}
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}
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}
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@ -31,11 +31,11 @@ namespace ARMeilleure.Common
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_pageIndex = -1;
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_page = null;
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_pages = new List<PageInfo>();
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_pages = [];
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_pageSize = pageSize;
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_pageCount = pageCount;
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_extras = new List<IntPtr>();
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_extras = [];
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}
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public Span<T> AllocateSpan<T>(ulong count) where T : unmanaged
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@ -41,7 +41,7 @@ namespace ARMeilleure.Common
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}
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_allocated = new BitMap(NativeAllocator.Instance);
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_pages = new Dictionary<int, IntPtr>();
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_pages = [];
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_pageLogCapacity = BitOperations.Log2((uint)(pageSize / sizeof(TEntry)));
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_pageCapacity = 1 << _pageLogCapacity;
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}
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@ -17,7 +17,7 @@ namespace ARMeilleure.Decoders
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public Block()
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{
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OpCodes = new List<OpCode>();
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OpCodes = [];
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}
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public Block(ulong address) : this()
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@ -20,11 +20,11 @@ namespace ARMeilleure.Decoders
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public static Block[] Decode(IMemoryManager memory, ulong address, ExecutionMode mode, bool highCq, DecoderMode dMode)
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{
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List<Block> blocks = new();
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List<Block> blocks = [];
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Queue<Block> workQueue = new();
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Dictionary<ulong, Block> visited = new();
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Dictionary<ulong, Block> visited = [];
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Debug.Assert(MaxInstsPerFunctionLowCq <= MaxInstsPerFunction);
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@ -4,13 +4,15 @@ namespace ARMeilleure.Decoders
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{
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class OpCode32SimdMemPair : OpCode32, IOpCode32Simd
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{
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#pragma warning disable IDE0055 // Disable formatting
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private static readonly int[] _regsMap =
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{
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[
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1, 1, 4, 2,
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1, 1, 3, 1,
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1, 1, 2, 1,
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1, 1, 1, 1,
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};
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];
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#pragma warning restore IDE0055
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public int Vd { get; }
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public int Rn { get; }
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@ -12,7 +12,7 @@ namespace ARMeilleure.Decoders
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public OpCodeT16IfThen(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
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{
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List<Condition> conds = new();
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List<Condition> conds = [];
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int cond = (opCode >> 4) & 0xf;
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int mask = opCode & 0xf;
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@ -29,9 +29,9 @@ namespace ARMeilleure.Decoders
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}
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}
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private static readonly List<InstInfo> _allInstA32 = new();
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private static readonly List<InstInfo> _allInstT32 = new();
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private static readonly List<InstInfo> _allInstA64 = new();
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private static readonly List<InstInfo> _allInstA32 = [];
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private static readonly List<InstInfo> _allInstT32 = [];
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private static readonly List<InstInfo> _allInstA64 = [];
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private static readonly InstInfo[][] _instA32FastLookup = new InstInfo[FastLookupSize][];
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private static readonly InstInfo[][] _instT32FastLookup = new InstInfo[FastLookupSize][];
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@ -1328,7 +1328,7 @@ namespace ARMeilleure.Decoders
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for (int index = 0; index < temp.Length; index++)
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{
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temp[index] = new List<InstInfo>();
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temp[index] = [];
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}
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foreach (InstInfo inst in allInsts)
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@ -24,8 +24,8 @@ namespace ARMeilleure.Diagnostics
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_builder = new StringBuilder();
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_localNames = new Dictionary<Operand, string>();
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_symbolNames = new Dictionary<ulong, string>();
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_localNames = [];
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_symbolNames = [];
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}
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private void Indent()
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@ -29,7 +29,7 @@ namespace ARMeilleure.Diagnostics
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static Symbols()
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{
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_symbols = new ConcurrentDictionary<ulong, string>();
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_rangedSymbols = new List<RangedSymbol>();
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_rangedSymbols = [];
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}
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public static string Get(ulong address)
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@ -245,8 +245,8 @@ namespace ARMeilleure.Instructions
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string name = nameof(Math.Round);
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MethodInfo info = (op.Size & 1) == 0
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? typeof(MathF).GetMethod(name, new Type[] { typeof(float), typeof(MidpointRounding) })
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: typeof(Math).GetMethod(name, new Type[] { typeof(double), typeof(MidpointRounding) });
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? typeof(MathF).GetMethod(name, [typeof(float), typeof(MidpointRounding)])
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: typeof(Math).GetMethod(name, [typeof(double), typeof(MidpointRounding)]);
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return context.Call(info, n, Const((int)roundMode));
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}
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@ -18,19 +18,19 @@ namespace ARMeilleure.Instructions
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static class InstEmitSimdHelper
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{
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#region "Masks"
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public static readonly long[] EvenMasks = new long[]
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{
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public static readonly long[] EvenMasks =
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[
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14L << 56 | 12L << 48 | 10L << 40 | 08L << 32 | 06L << 24 | 04L << 16 | 02L << 8 | 00L << 0, // B
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13L << 56 | 12L << 48 | 09L << 40 | 08L << 32 | 05L << 24 | 04L << 16 | 01L << 8 | 00L << 0, // H
|
||||
11L << 56 | 10L << 48 | 09L << 40 | 08L << 32 | 03L << 24 | 02L << 16 | 01L << 8 | 00L << 0, // S
|
||||
};
|
||||
];
|
||||
|
||||
public static readonly long[] OddMasks = new long[]
|
||||
{
|
||||
public static readonly long[] OddMasks =
|
||||
[
|
||||
15L << 56 | 13L << 48 | 11L << 40 | 09L << 32 | 07L << 24 | 05L << 16 | 03L << 8 | 01L << 0, // B
|
||||
15L << 56 | 14L << 48 | 11L << 40 | 10L << 32 | 07L << 24 | 06L << 16 | 03L << 8 | 02L << 0, // H
|
||||
15L << 56 | 14L << 48 | 13L << 40 | 12L << 32 | 07L << 24 | 06L << 16 | 05L << 8 | 04L << 0, // S
|
||||
};
|
||||
];
|
||||
|
||||
public const long ZeroMask = 128L << 56 | 128L << 48 | 128L << 40 | 128L << 32 | 128L << 24 | 128L << 16 | 128L << 8 | 128L << 0;
|
||||
|
||||
|
@ -44,118 +44,118 @@ namespace ARMeilleure.Instructions
|
|||
#endregion
|
||||
|
||||
#region "X86 SSE Intrinsics"
|
||||
public static readonly Intrinsic[] X86PaddInstruction = new Intrinsic[]
|
||||
{
|
||||
public static readonly Intrinsic[] X86PaddInstruction =
|
||||
[
|
||||
Intrinsic.X86Paddb,
|
||||
Intrinsic.X86Paddw,
|
||||
Intrinsic.X86Paddd,
|
||||
Intrinsic.X86Paddq,
|
||||
};
|
||||
Intrinsic.X86Paddq
|
||||
];
|
||||
|
||||
public static readonly Intrinsic[] X86PcmpeqInstruction = new Intrinsic[]
|
||||
{
|
||||
public static readonly Intrinsic[] X86PcmpeqInstruction =
|
||||
[
|
||||
Intrinsic.X86Pcmpeqb,
|
||||
Intrinsic.X86Pcmpeqw,
|
||||
Intrinsic.X86Pcmpeqd,
|
||||
Intrinsic.X86Pcmpeqq,
|
||||
};
|
||||
Intrinsic.X86Pcmpeqq
|
||||
];
|
||||
|
||||
public static readonly Intrinsic[] X86PcmpgtInstruction = new Intrinsic[]
|
||||
{
|
||||
public static readonly Intrinsic[] X86PcmpgtInstruction =
|
||||
[
|
||||
Intrinsic.X86Pcmpgtb,
|
||||
Intrinsic.X86Pcmpgtw,
|
||||
Intrinsic.X86Pcmpgtd,
|
||||
Intrinsic.X86Pcmpgtq,
|
||||
};
|
||||
Intrinsic.X86Pcmpgtq
|
||||
];
|
||||
|
||||
public static readonly Intrinsic[] X86PmaxsInstruction = new Intrinsic[]
|
||||
{
|
||||
public static readonly Intrinsic[] X86PmaxsInstruction =
|
||||
[
|
||||
Intrinsic.X86Pmaxsb,
|
||||
Intrinsic.X86Pmaxsw,
|
||||
Intrinsic.X86Pmaxsd,
|
||||
};
|
||||
Intrinsic.X86Pmaxsd
|
||||
];
|
||||
|
||||
public static readonly Intrinsic[] X86PmaxuInstruction = new Intrinsic[]
|
||||
{
|
||||
public static readonly Intrinsic[] X86PmaxuInstruction =
|
||||
[
|
||||
Intrinsic.X86Pmaxub,
|
||||
Intrinsic.X86Pmaxuw,
|
||||
Intrinsic.X86Pmaxud,
|
||||
};
|
||||
Intrinsic.X86Pmaxud
|
||||
];
|
||||
|
||||
public static readonly Intrinsic[] X86PminsInstruction = new Intrinsic[]
|
||||
{
|
||||
public static readonly Intrinsic[] X86PminsInstruction =
|
||||
[
|
||||
Intrinsic.X86Pminsb,
|
||||
Intrinsic.X86Pminsw,
|
||||
Intrinsic.X86Pminsd,
|
||||
};
|
||||
Intrinsic.X86Pminsd
|
||||
];
|
||||
|
||||
public static readonly Intrinsic[] X86PminuInstruction = new Intrinsic[]
|
||||
{
|
||||
public static readonly Intrinsic[] X86PminuInstruction =
|
||||
[
|
||||
Intrinsic.X86Pminub,
|
||||
Intrinsic.X86Pminuw,
|
||||
Intrinsic.X86Pminud,
|
||||
};
|
||||
Intrinsic.X86Pminud
|
||||
];
|
||||
|
||||
public static readonly Intrinsic[] X86PmovsxInstruction = new Intrinsic[]
|
||||
{
|
||||
public static readonly Intrinsic[] X86PmovsxInstruction =
|
||||
[
|
||||
Intrinsic.X86Pmovsxbw,
|
||||
Intrinsic.X86Pmovsxwd,
|
||||
Intrinsic.X86Pmovsxdq,
|
||||
};
|
||||
Intrinsic.X86Pmovsxdq
|
||||
];
|
||||
|
||||
public static readonly Intrinsic[] X86PmovzxInstruction = new Intrinsic[]
|
||||
{
|
||||
public static readonly Intrinsic[] X86PmovzxInstruction =
|
||||
[
|
||||
Intrinsic.X86Pmovzxbw,
|
||||
Intrinsic.X86Pmovzxwd,
|
||||
Intrinsic.X86Pmovzxdq,
|
||||
};
|
||||
Intrinsic.X86Pmovzxdq
|
||||
];
|
||||
|
||||
public static readonly Intrinsic[] X86PsllInstruction = new Intrinsic[]
|
||||
{
|
||||
public static readonly Intrinsic[] X86PsllInstruction =
|
||||
[
|
||||
0,
|
||||
Intrinsic.X86Psllw,
|
||||
Intrinsic.X86Pslld,
|
||||
Intrinsic.X86Psllq,
|
||||
};
|
||||
Intrinsic.X86Psllq
|
||||
];
|
||||
|
||||
public static readonly Intrinsic[] X86PsraInstruction = new Intrinsic[]
|
||||
{
|
||||
public static readonly Intrinsic[] X86PsraInstruction =
|
||||
[
|
||||
0,
|
||||
Intrinsic.X86Psraw,
|
||||
Intrinsic.X86Psrad,
|
||||
};
|
||||
Intrinsic.X86Psrad
|
||||
];
|
||||
|
||||
public static readonly Intrinsic[] X86PsrlInstruction = new Intrinsic[]
|
||||
{
|
||||
public static readonly Intrinsic[] X86PsrlInstruction =
|
||||
[
|
||||
0,
|
||||
Intrinsic.X86Psrlw,
|
||||
Intrinsic.X86Psrld,
|
||||
Intrinsic.X86Psrlq,
|
||||
};
|
||||
Intrinsic.X86Psrlq
|
||||
];
|
||||
|
||||
public static readonly Intrinsic[] X86PsubInstruction = new Intrinsic[]
|
||||
{
|
||||
public static readonly Intrinsic[] X86PsubInstruction =
|
||||
[
|
||||
Intrinsic.X86Psubb,
|
||||
Intrinsic.X86Psubw,
|
||||
Intrinsic.X86Psubd,
|
||||
Intrinsic.X86Psubq,
|
||||
};
|
||||
Intrinsic.X86Psubq
|
||||
];
|
||||
|
||||
public static readonly Intrinsic[] X86PunpckhInstruction = new Intrinsic[]
|
||||
{
|
||||
public static readonly Intrinsic[] X86PunpckhInstruction =
|
||||
[
|
||||
Intrinsic.X86Punpckhbw,
|
||||
Intrinsic.X86Punpckhwd,
|
||||
Intrinsic.X86Punpckhdq,
|
||||
Intrinsic.X86Punpckhqdq,
|
||||
};
|
||||
Intrinsic.X86Punpckhqdq
|
||||
];
|
||||
|
||||
public static readonly Intrinsic[] X86PunpcklInstruction = new Intrinsic[]
|
||||
{
|
||||
public static readonly Intrinsic[] X86PunpcklInstruction =
|
||||
[
|
||||
Intrinsic.X86Punpcklbw,
|
||||
Intrinsic.X86Punpcklwd,
|
||||
Intrinsic.X86Punpckldq,
|
||||
Intrinsic.X86Punpcklqdq,
|
||||
};
|
||||
Intrinsic.X86Punpcklqdq
|
||||
];
|
||||
#endregion
|
||||
|
||||
public static void EnterArmFpMode(EmitterContext context, Func<FPState, Operand> getFpFlag)
|
||||
|
@ -460,8 +460,8 @@ namespace ARMeilleure.Instructions
|
|||
IOpCodeSimd op = (IOpCodeSimd)context.CurrOp;
|
||||
|
||||
MethodInfo info = (op.Size & 1) == 0
|
||||
? typeof(MathF).GetMethod(name, new Type[] { typeof(float) })
|
||||
: typeof(Math).GetMethod(name, new Type[] { typeof(double) });
|
||||
? typeof(MathF).GetMethod(name, [typeof(float)])
|
||||
: typeof(Math).GetMethod(name, [typeof(double)]);
|
||||
|
||||
return context.Call(info, n);
|
||||
}
|
||||
|
@ -473,8 +473,8 @@ namespace ARMeilleure.Instructions
|
|||
string name = nameof(Math.Round);
|
||||
|
||||
MethodInfo info = (op.Size & 1) == 0
|
||||
? typeof(MathF).GetMethod(name, new Type[] { typeof(float), typeof(MidpointRounding) })
|
||||
: typeof(Math).GetMethod(name, new Type[] { typeof(double), typeof(MidpointRounding) });
|
||||
? typeof(MathF).GetMethod(name, [typeof(float), typeof(MidpointRounding)])
|
||||
: typeof(Math).GetMethod(name, [typeof(double), typeof(MidpointRounding)]);
|
||||
|
||||
return context.Call(info, n, Const((int)roundMode));
|
||||
}
|
||||
|
|
|
@ -12,17 +12,17 @@ namespace ARMeilleure.Instructions
|
|||
static partial class InstEmit
|
||||
{
|
||||
#region "Masks"
|
||||
private static readonly long[] _masksE0_Uzp = new long[]
|
||||
{
|
||||
private static readonly long[] _masksE0_Uzp =
|
||||
[
|
||||
13L << 56 | 09L << 48 | 05L << 40 | 01L << 32 | 12L << 24 | 08L << 16 | 04L << 8 | 00L << 0,
|
||||
11L << 56 | 10L << 48 | 03L << 40 | 02L << 32 | 09L << 24 | 08L << 16 | 01L << 8 | 00L << 0,
|
||||
};
|
||||
11L << 56 | 10L << 48 | 03L << 40 | 02L << 32 | 09L << 24 | 08L << 16 | 01L << 8 | 00L << 0
|
||||
];
|
||||
|
||||
private static readonly long[] _masksE1_Uzp = new long[]
|
||||
{
|
||||
private static readonly long[] _masksE1_Uzp =
|
||||
[
|
||||
15L << 56 | 11L << 48 | 07L << 40 | 03L << 32 | 14L << 24 | 10L << 16 | 06L << 8 | 02L << 0,
|
||||
15L << 56 | 14L << 48 | 07L << 40 | 06L << 32 | 13L << 24 | 12L << 16 | 05L << 8 | 04L << 0,
|
||||
};
|
||||
15L << 56 | 14L << 48 | 07L << 40 | 06L << 32 | 13L << 24 | 12L << 16 | 05L << 8 | 04L << 0
|
||||
];
|
||||
#endregion
|
||||
|
||||
public static void Dup_Gp(ArmEmitterContext context)
|
||||
|
@ -601,7 +601,7 @@ namespace ARMeilleure.Instructions
|
|||
{
|
||||
Operand d = GetVec(op.Rd);
|
||||
|
||||
List<Operand> args = new();
|
||||
List<Operand> args = [];
|
||||
|
||||
if (!isTbl)
|
||||
{
|
||||
|
|
|
@ -13,17 +13,17 @@ namespace ARMeilleure.Instructions
|
|||
{
|
||||
#region "Masks"
|
||||
// Same as InstEmitSimdMove, as the instructions do the same thing.
|
||||
private static readonly long[] _masksE0_Uzp = new long[]
|
||||
{
|
||||
private static readonly long[] _masksE0_Uzp =
|
||||
[
|
||||
13L << 56 | 09L << 48 | 05L << 40 | 01L << 32 | 12L << 24 | 08L << 16 | 04L << 8 | 00L << 0,
|
||||
11L << 56 | 10L << 48 | 03L << 40 | 02L << 32 | 09L << 24 | 08L << 16 | 01L << 8 | 00L << 0,
|
||||
};
|
||||
11L << 56 | 10L << 48 | 03L << 40 | 02L << 32 | 09L << 24 | 08L << 16 | 01L << 8 | 00L << 0
|
||||
];
|
||||
|
||||
private static readonly long[] _masksE1_Uzp = new long[]
|
||||
{
|
||||
private static readonly long[] _masksE1_Uzp =
|
||||
[
|
||||
15L << 56 | 11L << 48 | 07L << 40 | 03L << 32 | 14L << 24 | 10L << 16 | 06L << 8 | 02L << 0,
|
||||
15L << 56 | 14L << 48 | 07L << 40 | 06L << 32 | 13L << 24 | 12L << 16 | 05L << 8 | 04L << 0,
|
||||
};
|
||||
15L << 56 | 14L << 48 | 07L << 40 | 06L << 32 | 13L << 24 | 12L << 16 | 05L << 8 | 04L << 0
|
||||
];
|
||||
#endregion
|
||||
|
||||
public static void Vmov_I(ArmEmitterContext context)
|
||||
|
|
|
@ -16,12 +16,14 @@ namespace ARMeilleure.Instructions
|
|||
|
||||
static partial class InstEmit
|
||||
{
|
||||
#pragma warning disable IDE0055 // Disable formatting
|
||||
#region "Masks"
|
||||
private static readonly long[] _masks_SliSri = new long[] // Replication masks.
|
||||
{
|
||||
private static readonly long[] _masks_SliSri = // Replication masks.
|
||||
[
|
||||
0x0101010101010101L, 0x0001000100010001L, 0x0000000100000001L, 0x0000000000000001L,
|
||||
};
|
||||
];
|
||||
#endregion
|
||||
#pragma warning restore IDE0055
|
||||
|
||||
public static void Rshrn_V(ArmEmitterContext context)
|
||||
{
|
||||
|
|
|
@ -27,7 +27,7 @@ namespace ARMeilleure.IntermediateRepresentation
|
|||
{
|
||||
get
|
||||
{
|
||||
_domFrontiers ??= new HashSet<BasicBlock>();
|
||||
_domFrontiers ??= [];
|
||||
|
||||
return _domFrontiers;
|
||||
}
|
||||
|
@ -38,7 +38,7 @@ namespace ARMeilleure.IntermediateRepresentation
|
|||
public BasicBlock(int index)
|
||||
{
|
||||
Operations = new IntrusiveList<Operation>();
|
||||
Predecessors = new List<BasicBlock>();
|
||||
Predecessors = [];
|
||||
|
||||
Index = index;
|
||||
}
|
||||
|
|
|
@ -198,7 +198,7 @@ namespace ARMeilleure.Signal
|
|||
|
||||
ControlFlowGraph cfg = context.GetControlFlowGraph();
|
||||
|
||||
OperandType[] argTypes = new OperandType[] { OperandType.I32, OperandType.I64, OperandType.I64 };
|
||||
OperandType[] argTypes = [OperandType.I32, OperandType.I64, OperandType.I64];
|
||||
|
||||
return Compiler.Compile(cfg, argTypes, OperandType.None, CompilerOptions.HighCq, RuntimeInformation.ProcessArchitecture).Code;
|
||||
}
|
||||
|
@ -252,7 +252,7 @@ namespace ARMeilleure.Signal
|
|||
|
||||
ControlFlowGraph cfg = context.GetControlFlowGraph();
|
||||
|
||||
OperandType[] argTypes = new OperandType[] { OperandType.I64 };
|
||||
OperandType[] argTypes = [OperandType.I64];
|
||||
|
||||
return Compiler.Compile(cfg, argTypes, OperandType.I32, CompilerOptions.HighCq, RuntimeInformation.ProcessArchitecture).Code;
|
||||
}
|
||||
|
|
|
@ -30,7 +30,7 @@ namespace ARMeilleure.Signal
|
|||
|
||||
ControlFlowGraph cfg = context.GetControlFlowGraph();
|
||||
|
||||
OperandType[] argTypes = new OperandType[] { OperandType.I64 };
|
||||
OperandType[] argTypes = [OperandType.I64];
|
||||
|
||||
return Compiler.Compile(cfg, argTypes, OperandType.I32, CompilerOptions.HighCq, RuntimeInformation.ProcessArchitecture).Map<DebugPartialUnmap>();
|
||||
}
|
||||
|
@ -47,7 +47,7 @@ namespace ARMeilleure.Signal
|
|||
|
||||
ControlFlowGraph cfg = context.GetControlFlowGraph();
|
||||
|
||||
OperandType[] argTypes = new OperandType[] { OperandType.I64 };
|
||||
OperandType[] argTypes = [OperandType.I64];
|
||||
|
||||
return Compiler.Compile(cfg, argTypes, OperandType.I32, CompilerOptions.HighCq, RuntimeInformation.ProcessArchitecture).Map<DebugThreadLocalMapGetOrReserve>();
|
||||
}
|
||||
|
@ -76,7 +76,7 @@ namespace ARMeilleure.Signal
|
|||
|
||||
ControlFlowGraph cfg = context.GetControlFlowGraph();
|
||||
|
||||
OperandType[] argTypes = new OperandType[] { OperandType.I64 };
|
||||
OperandType[] argTypes = [OperandType.I64];
|
||||
|
||||
return Compiler.Compile(cfg, argTypes, OperandType.None, CompilerOptions.HighCq, RuntimeInformation.ProcessArchitecture).Map<DebugNativeWriteLoop>();
|
||||
}
|
||||
|
|
|
@ -55,7 +55,7 @@ namespace ARMeilleure.Translation
|
|||
public Aarch32Mode Mode { get; }
|
||||
|
||||
private int _ifThenBlockStateIndex = 0;
|
||||
private Condition[] _ifThenBlockState = Array.Empty<Condition>();
|
||||
private Condition[] _ifThenBlockState = [];
|
||||
public bool IsInIfThenBlock => _ifThenBlockStateIndex < _ifThenBlockState.Length;
|
||||
public Condition CurrentIfThenBlockCond => _ifThenBlockState[_ifThenBlockStateIndex];
|
||||
|
||||
|
@ -78,7 +78,7 @@ namespace ARMeilleure.Translation
|
|||
HasPtc = hasPtc;
|
||||
Mode = mode;
|
||||
|
||||
_labels = new Dictionary<ulong, Operand>();
|
||||
_labels = [];
|
||||
}
|
||||
|
||||
public override Operand Call(MethodInfo info, params Operand[] callArgs)
|
||||
|
|
|
@ -23,7 +23,7 @@ namespace ARMeilleure.Translation.Cache
|
|||
}
|
||||
}
|
||||
|
||||
private readonly List<MemoryBlock> _blocks = new();
|
||||
private readonly List<MemoryBlock> _blocks = [];
|
||||
|
||||
public CacheMemoryAllocator(int capacity)
|
||||
{
|
||||
|
|
|
@ -24,7 +24,7 @@ namespace ARMeilleure.Translation.Cache
|
|||
|
||||
private static CacheMemoryAllocator _cacheAllocator;
|
||||
|
||||
private static readonly List<CacheEntry> _cacheEntries = new();
|
||||
private static readonly List<CacheEntry> _cacheEntries = [];
|
||||
|
||||
private static readonly object _lock = new();
|
||||
private static bool _initialized;
|
||||
|
|
|
@ -6,8 +6,8 @@ namespace ARMeilleure.Translation.Cache
|
|||
{
|
||||
class JitCacheInvalidation
|
||||
{
|
||||
private static readonly int[] _invalidationCode = new int[]
|
||||
{
|
||||
private static readonly int[] _invalidationCode =
|
||||
[
|
||||
unchecked((int)0xd53b0022), // mrs x2, ctr_el0
|
||||
unchecked((int)0xd3504c44), // ubfx x4, x2, #16, #4
|
||||
unchecked((int)0x52800083), // mov w3, #0x4
|
||||
|
@ -36,7 +36,7 @@ namespace ARMeilleure.Translation.Cache
|
|||
unchecked((int)0xd5033b9f), // dsb ish
|
||||
unchecked((int)0xd5033fdf), // isb
|
||||
unchecked((int)0xd65f03c0), // ret
|
||||
};
|
||||
];
|
||||
|
||||
private delegate void InvalidateCache(ulong start, ulong end);
|
||||
|
||||
|
|
|
@ -80,7 +80,7 @@ namespace ARMeilleure.Translation
|
|||
|
||||
static Delegates()
|
||||
{
|
||||
_delegates = new SortedList<string, DelegateInfo>();
|
||||
_delegates = [];
|
||||
|
||||
SetDelegateInfo(new MathAbs(Math.Abs));
|
||||
SetDelegateInfo(new MathCeiling(Math.Ceiling));
|
||||
|
|
|
@ -25,7 +25,7 @@ namespace ARMeilleure.Translation
|
|||
{
|
||||
_localsCount = 0;
|
||||
|
||||
_irLabels = new Dictionary<Operand, BasicBlock>();
|
||||
_irLabels = [];
|
||||
_irBlocks = new IntrusiveList<BasicBlock>();
|
||||
|
||||
_needsNewBlock = true;
|
||||
|
|
|
@ -108,7 +108,7 @@ namespace ARMeilleure.Translation
|
|||
/// <returns>A list of all values sorted by Key Order</returns>
|
||||
public List<TV> AsList()
|
||||
{
|
||||
List<TV> list = new();
|
||||
List<TV> list = [];
|
||||
|
||||
AddToList(_root, list);
|
||||
|
||||
|
|
|
@ -151,7 +151,7 @@ namespace ARMeilleure.Translation.PTC
|
|||
private void InitializeCarriers()
|
||||
{
|
||||
_infosStream = MemoryStreamManager.Shared.GetStream();
|
||||
_codesList = new List<byte[]>();
|
||||
_codesList = [];
|
||||
_relocsStream = MemoryStreamManager.Shared.GetStream();
|
||||
_unwindInfosStream = MemoryStreamManager.Shared.GetStream();
|
||||
}
|
||||
|
@ -318,7 +318,7 @@ namespace ARMeilleure.Translation.PTC
|
|||
return false;
|
||||
}
|
||||
|
||||
ReadOnlySpan<byte> codesBytes = (int)innerHeader.CodesLength > 0 ? new(stream.PositionPointer, (int)innerHeader.CodesLength) : ReadOnlySpan<byte>.Empty;
|
||||
ReadOnlySpan<byte> codesBytes = (int)innerHeader.CodesLength > 0 ? new(stream.PositionPointer, (int)innerHeader.CodesLength) : [];
|
||||
stream.Seek(innerHeader.CodesLength, SeekOrigin.Current);
|
||||
|
||||
Hash128 codesHash = XXHash128.ComputeHash(codesBytes);
|
||||
|
@ -467,7 +467,7 @@ namespace ARMeilleure.Translation.PTC
|
|||
ReadOnlySpan<byte> infosBytes = new(stream.PositionPointer, innerHeader.InfosLength);
|
||||
_infosStream.WriteTo(stream);
|
||||
|
||||
ReadOnlySpan<byte> codesBytes = (int)innerHeader.CodesLength > 0 ? new(stream.PositionPointer, (int)innerHeader.CodesLength) : ReadOnlySpan<byte>.Empty;
|
||||
ReadOnlySpan<byte> codesBytes = (int)innerHeader.CodesLength > 0 ? new(stream.PositionPointer, (int)innerHeader.CodesLength) : [];
|
||||
_codesList.WriteTo(stream);
|
||||
|
||||
ReadOnlySpan<byte> relocsBytes = new(stream.PositionPointer, innerHeader.RelocsLength);
|
||||
|
@ -758,7 +758,7 @@ namespace ARMeilleure.Translation.PTC
|
|||
|
||||
private void StubCode(int index)
|
||||
{
|
||||
_codesList[index] = Array.Empty<byte>();
|
||||
_codesList[index] = [];
|
||||
}
|
||||
|
||||
private void StubReloc(int relocEntriesCount)
|
||||
|
@ -843,7 +843,7 @@ namespace ARMeilleure.Translation.PTC
|
|||
}
|
||||
}
|
||||
|
||||
List<Thread> threads = new();
|
||||
List<Thread> threads = [];
|
||||
|
||||
for (int i = 0; i < degreeOfParallelism; i++)
|
||||
{
|
||||
|
|
|
@ -12,7 +12,7 @@ namespace ARMeilleure.Translation.PTC
|
|||
[MethodImpl(MethodImplOptions.AggressiveInlining)]
|
||||
public static Dictionary<TKey, TValue> DeserializeDictionary<TKey, TValue>(Stream stream, Func<Stream, TValue> valueFunc) where TKey : struct
|
||||
{
|
||||
Dictionary<TKey, TValue> dictionary = new();
|
||||
Dictionary<TKey, TValue> dictionary = [];
|
||||
|
||||
int count = DeserializeStructure<int>(stream);
|
||||
|
||||
|
@ -30,7 +30,7 @@ namespace ARMeilleure.Translation.PTC
|
|||
[MethodImpl(MethodImplOptions.AggressiveInlining)]
|
||||
public static Dictionary<TKey, TValue> DeserializeAndUpdateDictionary<TKey, TValue>(Stream stream, Func<Stream, TValue> valueFunc, Func<TKey, TValue, (TKey, TValue)> updateFunc) where TKey : struct
|
||||
{
|
||||
Dictionary<TKey, TValue> dictionary = new();
|
||||
Dictionary<TKey, TValue> dictionary = [];
|
||||
|
||||
int count = DeserializeStructure<int>(stream);
|
||||
|
||||
|
@ -50,7 +50,7 @@ namespace ARMeilleure.Translation.PTC
|
|||
[MethodImpl(MethodImplOptions.AggressiveInlining)]
|
||||
public static List<T> DeserializeList<T>(Stream stream) where T : struct
|
||||
{
|
||||
List<T> list = new();
|
||||
List<T> list = [];
|
||||
|
||||
int count = DeserializeStructure<int>(stream);
|
||||
|
||||
|
|
|
@ -25,9 +25,10 @@ namespace ARMeilleure.Translation.PTC
|
|||
|
||||
private const uint InternalVersion = 5518; //! Not to be incremented manually for each change to the ARMeilleure project.
|
||||
|
||||
private static readonly uint[] _migrateInternalVersions = {
|
||||
1866,
|
||||
};
|
||||
private static readonly uint[] _migrateInternalVersions =
|
||||
[
|
||||
1866
|
||||
];
|
||||
|
||||
private const int SaveInterval = 30; // Seconds.
|
||||
|
||||
|
@ -69,7 +70,7 @@ namespace ARMeilleure.Translation.PTC
|
|||
|
||||
_disposed = false;
|
||||
|
||||
ProfiledFuncs = new Dictionary<ulong, FuncProfile>();
|
||||
ProfiledFuncs = [];
|
||||
|
||||
Enabled = false;
|
||||
}
|
||||
|
|
|
@ -9,7 +9,7 @@ namespace ARMeilleure.Translation
|
|||
{
|
||||
public static void Rename(ControlFlowGraph cfg)
|
||||
{
|
||||
Dictionary<Register, Operand> registerToLocalMap = new();
|
||||
Dictionary<Register, Operand> registerToLocalMap = [];
|
||||
|
||||
Operand GetLocal(Operand op)
|
||||
{
|
||||
|
|
|
@ -17,7 +17,7 @@ namespace ARMeilleure.Translation
|
|||
|
||||
public DefMap()
|
||||
{
|
||||
_map = new Dictionary<int, Operand>();
|
||||
_map = [];
|
||||
_phiMasks = new BitMap(Allocators.Default, RegisterConsts.TotalCount);
|
||||
}
|
||||
|
||||
|
|
|
@ -23,24 +23,22 @@ namespace ARMeilleure.Translation
|
|||
public class Translator
|
||||
{
|
||||
private static readonly AddressTable<ulong>.Level[] _levels64Bit =
|
||||
new AddressTable<ulong>.Level[]
|
||||
{
|
||||
[
|
||||
new(31, 17),
|
||||
new(23, 8),
|
||||
new(15, 8),
|
||||
new(7, 8),
|
||||
new( 2, 5),
|
||||
};
|
||||
new(2, 5)
|
||||
];
|
||||
|
||||
private static readonly AddressTable<ulong>.Level[] _levels32Bit =
|
||||
new AddressTable<ulong>.Level[]
|
||||
{
|
||||
[
|
||||
new(31, 17),
|
||||
new(23, 8),
|
||||
new(15, 8),
|
||||
new(7, 8),
|
||||
new( 1, 6),
|
||||
};
|
||||
new(1, 6)
|
||||
];
|
||||
|
||||
private readonly IJitMemoryAllocator _allocator;
|
||||
private readonly ConcurrentQueue<KeyValuePair<ulong, TranslatedFunction>> _oldFuncs;
|
||||
|
@ -498,7 +496,7 @@ namespace ARMeilleure.Translation
|
|||
|
||||
public void InvalidateJitCacheRegion(ulong address, ulong size)
|
||||
{
|
||||
ulong[] overlapAddresses = Array.Empty<ulong>();
|
||||
ulong[] overlapAddresses = [];
|
||||
|
||||
int overlapsCount = Functions.GetOverlaps(address, size, ref overlapAddresses);
|
||||
|
||||
|
|
|
@ -36,7 +36,7 @@ namespace ARMeilleure.Translation
|
|||
Sync = new object();
|
||||
|
||||
_requests = new Stack<RejitRequest>();
|
||||
_requestAddresses = new HashSet<ulong>();
|
||||
_requestAddresses = [];
|
||||
}
|
||||
|
||||
/// <summary>
|
||||
|
|
|
@ -139,7 +139,7 @@ namespace ARMeilleure.Translation
|
|||
|
||||
ControlFlowGraph cfg = context.GetControlFlowGraph();
|
||||
|
||||
OperandType[] argTypes = new OperandType[] { OperandType.I64 };
|
||||
OperandType[] argTypes = [OperandType.I64];
|
||||
|
||||
return Compiler.Compile(cfg, argTypes, OperandType.I32, CompilerOptions.HighCq, RuntimeInformation.ProcessArchitecture).Map<FpFlagsPInvokeTest>();
|
||||
}
|
||||
|
|
|
@ -31,19 +31,19 @@ namespace Ryujinx.Audio.Backends.CompatLayer
|
|||
private const int Minus6dBInQ15 = (int)(0.501f * RawQ15One);
|
||||
private const int Minus12dBInQ15 = (int)(0.251f * RawQ15One);
|
||||
|
||||
private static readonly long[] _defaultSurroundToStereoCoefficients = new long[4]
|
||||
{
|
||||
private static readonly long[] _defaultSurroundToStereoCoefficients =
|
||||
[
|
||||
RawQ15One,
|
||||
Minus3dBInQ15,
|
||||
Minus12dBInQ15,
|
||||
Minus3dBInQ15,
|
||||
};
|
||||
Minus3dBInQ15
|
||||
];
|
||||
|
||||
private static readonly long[] _defaultStereoToMonoCoefficients = new long[2]
|
||||
{
|
||||
private static readonly long[] _defaultStereoToMonoCoefficients =
|
||||
[
|
||||
Minus6dBInQ15,
|
||||
Minus6dBInQ15,
|
||||
};
|
||||
Minus6dBInQ15
|
||||
];
|
||||
|
||||
private const int SurroundChannelCount = 6;
|
||||
private const int StereoChannelCount = 2;
|
||||
|
|
|
@ -164,12 +164,12 @@ namespace Ryujinx.Audio
|
|||
/// <summary>
|
||||
/// The default coefficients used for standard 5.1 surround to stereo downmixing.
|
||||
/// </summary>
|
||||
public static readonly float[] DefaultSurroundToStereoCoefficients = new float[4]
|
||||
{
|
||||
public static readonly float[] DefaultSurroundToStereoCoefficients =
|
||||
[
|
||||
1.0f,
|
||||
0.707f,
|
||||
0.251f,
|
||||
0.707f,
|
||||
};
|
||||
0.707f
|
||||
];
|
||||
}
|
||||
}
|
||||
|
|
|
@ -173,7 +173,7 @@ namespace Ryujinx.Audio.Input
|
|||
// TODO: Detect if the driver supports audio input
|
||||
}
|
||||
|
||||
return new[] { Constants.DefaultDeviceInputName };
|
||||
return [Constants.DefaultDeviceInputName];
|
||||
}
|
||||
|
||||
/// <summary>
|
||||
|
|
|
@ -167,7 +167,7 @@ namespace Ryujinx.Audio.Output
|
|||
/// <returns>The list of all audio outputs name</returns>
|
||||
public string[] ListAudioOuts()
|
||||
{
|
||||
return new[] { Constants.DefaultDeviceOutputName };
|
||||
return [Constants.DefaultDeviceOutputName];
|
||||
}
|
||||
|
||||
/// <summary>
|
||||
|
|
|
@ -10,14 +10,14 @@ namespace Ryujinx.Audio.Renderer.Device
|
|||
/// <summary>
|
||||
/// All the defined virtual devices.
|
||||
/// </summary>
|
||||
public static readonly VirtualDevice[] Devices = new VirtualDevice[5]
|
||||
{
|
||||
public static readonly VirtualDevice[] Devices =
|
||||
[
|
||||
new("AudioStereoJackOutput", 2, true),
|
||||
new("AudioBuiltInSpeakerOutput", 2, false),
|
||||
new("AudioTvOutput", 6, false),
|
||||
new("AudioUsbDeviceOutput", 2, true),
|
||||
new("AudioExternalOutput", 6, true),
|
||||
};
|
||||
new("AudioExternalOutput", 6, true)
|
||||
];
|
||||
|
||||
/// <summary>
|
||||
/// The name of the <see cref="VirtualDevice"/>.
|
||||
|
|
|
@ -11,7 +11,7 @@ namespace Ryujinx.Audio.Renderer.Device
|
|||
/// <summary>
|
||||
/// The session registry, used to store the sessions of a given AppletResourceId.
|
||||
/// </summary>
|
||||
private readonly Dictionary<ulong, VirtualDeviceSession[]> _sessionsRegistry = new();
|
||||
private readonly Dictionary<ulong, VirtualDeviceSession[]> _sessionsRegistry = [];
|
||||
|
||||
/// <summary>
|
||||
/// The default <see cref="VirtualDevice"/>.
|
||||
|
|
|
@ -46,7 +46,7 @@ namespace Ryujinx.Audio.Renderer.Dsp.Command
|
|||
SampleRate = sampleRate;
|
||||
BufferCount = mixBufferCount + voiceChannelCountMax;
|
||||
Buffers = mixBuffer;
|
||||
Commands = new List<ICommand>();
|
||||
Commands = [];
|
||||
MemoryManager = memoryManager;
|
||||
|
||||
_buffersEntryCount = Buffers.Length;
|
||||
|
@ -97,7 +97,7 @@ namespace Ryujinx.Audio.Renderer.Dsp.Command
|
|||
{
|
||||
if (index < 0 || index >= _buffersEntryCount)
|
||||
{
|
||||
return Span<float>.Empty;
|
||||
return [];
|
||||
}
|
||||
|
||||
unsafe
|
||||
|
|
|
@ -9,21 +9,21 @@ namespace Ryujinx.Audio.Renderer.Dsp.Command
|
|||
{
|
||||
public class Reverb3dCommand : ICommand
|
||||
{
|
||||
private static readonly int[] _outputEarlyIndicesTableMono = new int[20] { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
|
||||
private static readonly int[] _targetEarlyDelayLineIndicesTableMono = new int[20] { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19 };
|
||||
private static readonly int[] _targetOutputFeedbackIndicesTableMono = new int[1] { 0 };
|
||||
private static readonly int[] _outputEarlyIndicesTableMono = [0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0];
|
||||
private static readonly int[] _targetEarlyDelayLineIndicesTableMono = [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19];
|
||||
private static readonly int[] _targetOutputFeedbackIndicesTableMono = [0];
|
||||
|
||||
private static readonly int[] _outputEarlyIndicesTableStereo = new int[20] { 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1 };
|
||||
private static readonly int[] _targetEarlyDelayLineIndicesTableStereo = new int[20] { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19 };
|
||||
private static readonly int[] _targetOutputFeedbackIndicesTableStereo = new int[2] { 0, 1 };
|
||||
private static readonly int[] _outputEarlyIndicesTableStereo = [0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1];
|
||||
private static readonly int[] _targetEarlyDelayLineIndicesTableStereo = [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19];
|
||||
private static readonly int[] _targetOutputFeedbackIndicesTableStereo = [0, 1];
|
||||
|
||||
private static readonly int[] _outputEarlyIndicesTableQuadraphonic = new int[20] { 0, 0, 0, 1, 1, 1, 1, 2, 2, 2, 1, 1, 1, 0, 0, 0, 0, 3, 3, 3 };
|
||||
private static readonly int[] _targetEarlyDelayLineIndicesTableQuadraphonic = new int[20] { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19 };
|
||||
private static readonly int[] _targetOutputFeedbackIndicesTableQuadraphonic = new int[4] { 0, 1, 2, 3 };
|
||||
private static readonly int[] _outputEarlyIndicesTableQuadraphonic = [0, 0, 0, 1, 1, 1, 1, 2, 2, 2, 1, 1, 1, 0, 0, 0, 0, 3, 3, 3];
|
||||
private static readonly int[] _targetEarlyDelayLineIndicesTableQuadraphonic = [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19];
|
||||
private static readonly int[] _targetOutputFeedbackIndicesTableQuadraphonic = [0, 1, 2, 3];
|
||||
|
||||
private static readonly int[] _outputEarlyIndicesTableSurround = new int[40] { 4, 5, 0, 5, 0, 5, 1, 5, 1, 5, 1, 5, 1, 5, 2, 5, 2, 5, 2, 5, 1, 5, 1, 5, 1, 5, 0, 5, 0, 5, 0, 5, 0, 5, 3, 5, 3, 5, 3, 5 };
|
||||
private static readonly int[] _targetEarlyDelayLineIndicesTableSurround = new int[40] { 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 19, 19 };
|
||||
private static readonly int[] _targetOutputFeedbackIndicesTableSurround = new int[6] { 0, 1, 2, 3, -1, 3 };
|
||||
private static readonly int[] _outputEarlyIndicesTableSurround = [4, 5, 0, 5, 0, 5, 1, 5, 1, 5, 1, 5, 1, 5, 2, 5, 2, 5, 2, 5, 1, 5, 1, 5, 1, 5, 0, 5, 0, 5, 0, 5, 0, 5, 3, 5, 3, 5, 3, 5];
|
||||
private static readonly int[] _targetEarlyDelayLineIndicesTableSurround = [0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 15, 16, 16, 17, 17, 18, 18, 19, 19];
|
||||
private static readonly int[] _targetOutputFeedbackIndicesTableSurround = [0, 1, 2, 3, -1, 3];
|
||||
|
||||
public bool Enabled { get; set; }
|
||||
|
||||
|
|
|
@ -9,25 +9,25 @@ namespace Ryujinx.Audio.Renderer.Dsp.Command
|
|||
{
|
||||
public class ReverbCommand : ICommand
|
||||
{
|
||||
private static readonly int[] _outputEarlyIndicesTableMono = new int[10] { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
|
||||
private static readonly int[] _targetEarlyDelayLineIndicesTableMono = new int[10] { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 };
|
||||
private static readonly int[] _outputIndicesTableMono = new int[4] { 0, 0, 0, 0 };
|
||||
private static readonly int[] _targetOutputFeedbackIndicesTableMono = new int[4] { 0, 1, 2, 3 };
|
||||
private static readonly int[] _outputEarlyIndicesTableMono = [0, 0, 0, 0, 0, 0, 0, 0, 0, 0];
|
||||
private static readonly int[] _targetEarlyDelayLineIndicesTableMono = [0, 1, 2, 3, 4, 5, 6, 7, 8, 9];
|
||||
private static readonly int[] _outputIndicesTableMono = [0, 0, 0, 0];
|
||||
private static readonly int[] _targetOutputFeedbackIndicesTableMono = [0, 1, 2, 3];
|
||||
|
||||
private static readonly int[] _outputEarlyIndicesTableStereo = new int[10] { 0, 0, 1, 1, 0, 1, 0, 0, 1, 1 };
|
||||
private static readonly int[] _targetEarlyDelayLineIndicesTableStereo = new int[10] { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 };
|
||||
private static readonly int[] _outputIndicesTableStereo = new int[4] { 0, 0, 1, 1 };
|
||||
private static readonly int[] _targetOutputFeedbackIndicesTableStereo = new int[4] { 2, 0, 3, 1 };
|
||||
private static readonly int[] _outputEarlyIndicesTableStereo = [0, 0, 1, 1, 0, 1, 0, 0, 1, 1];
|
||||
private static readonly int[] _targetEarlyDelayLineIndicesTableStereo = [0, 1, 2, 3, 4, 5, 6, 7, 8, 9];
|
||||
private static readonly int[] _outputIndicesTableStereo = [0, 0, 1, 1];
|
||||
private static readonly int[] _targetOutputFeedbackIndicesTableStereo = [2, 0, 3, 1];
|
||||
|
||||
private static readonly int[] _outputEarlyIndicesTableQuadraphonic = new int[10] { 0, 0, 1, 1, 0, 1, 2, 2, 3, 3 };
|
||||
private static readonly int[] _targetEarlyDelayLineIndicesTableQuadraphonic = new int[10] { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 };
|
||||
private static readonly int[] _outputIndicesTableQuadraphonic = new int[4] { 0, 1, 2, 3 };
|
||||
private static readonly int[] _targetOutputFeedbackIndicesTableQuadraphonic = new int[4] { 0, 1, 2, 3 };
|
||||
private static readonly int[] _outputEarlyIndicesTableQuadraphonic = [0, 0, 1, 1, 0, 1, 2, 2, 3, 3];
|
||||
private static readonly int[] _targetEarlyDelayLineIndicesTableQuadraphonic = [0, 1, 2, 3, 4, 5, 6, 7, 8, 9];
|
||||
private static readonly int[] _outputIndicesTableQuadraphonic = [0, 1, 2, 3];
|
||||
private static readonly int[] _targetOutputFeedbackIndicesTableQuadraphonic = [0, 1, 2, 3];
|
||||
|
||||
private static readonly int[] _outputEarlyIndicesTableSurround = new int[20] { 0, 5, 0, 5, 1, 5, 1, 5, 4, 5, 4, 5, 2, 5, 2, 5, 3, 5, 3, 5 };
|
||||
private static readonly int[] _targetEarlyDelayLineIndicesTableSurround = new int[20] { 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9 };
|
||||
private static readonly int[] _outputIndicesTableSurround = new int[Constants.ChannelCountMax] { 0, 1, 2, 3, 4, 5 };
|
||||
private static readonly int[] _targetOutputFeedbackIndicesTableSurround = new int[Constants.ChannelCountMax] { 0, 1, 2, 3, -1, 3 };
|
||||
private static readonly int[] _outputEarlyIndicesTableSurround = [0, 5, 0, 5, 1, 5, 1, 5, 4, 5, 4, 5, 2, 5, 2, 5, 3, 5, 3, 5];
|
||||
private static readonly int[] _targetEarlyDelayLineIndicesTableSurround = [0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9];
|
||||
private static readonly int[] _outputIndicesTableSurround = [0, 1, 2, 3, 4, 5];
|
||||
private static readonly int[] _targetOutputFeedbackIndicesTableSurround = [0, 1, 2, 3, -1, 3];
|
||||
|
||||
public bool Enabled { get; set; }
|
||||
|
||||
|
|
|
@ -130,7 +130,7 @@ namespace Ryujinx.Audio.Renderer.Dsp
|
|||
switch (info.SampleFormat)
|
||||
{
|
||||
case SampleFormat.Adpcm:
|
||||
ReadOnlySpan<byte> waveBufferAdpcm = ReadOnlySpan<byte>.Empty;
|
||||
ReadOnlySpan<byte> waveBufferAdpcm = [];
|
||||
|
||||
if (waveBuffer.Buffer != 0 && waveBuffer.BufferSize != 0)
|
||||
{
|
||||
|
@ -142,7 +142,7 @@ namespace Ryujinx.Audio.Renderer.Dsp
|
|||
decodedSampleCount = AdpcmHelper.Decode(tempSpan, waveBufferAdpcm, targetSampleStartOffset, targetSampleEndOffset, offset, sampleCountToDecode - y, coefficients, ref voiceState.LoopContext);
|
||||
break;
|
||||
case SampleFormat.PcmInt16:
|
||||
ReadOnlySpan<short> waveBufferPcm16 = ReadOnlySpan<short>.Empty;
|
||||
ReadOnlySpan<short> waveBufferPcm16 = [];
|
||||
|
||||
if (waveBuffer.Buffer != 0 && waveBuffer.BufferSize != 0)
|
||||
{
|
||||
|
@ -155,7 +155,7 @@ namespace Ryujinx.Audio.Renderer.Dsp
|
|||
decodedSampleCount = PcmHelper.Decode(tempSpan, waveBufferPcm16, targetSampleStartOffset, targetSampleEndOffset, info.ChannelIndex, info.ChannelCount);
|
||||
break;
|
||||
case SampleFormat.PcmFloat:
|
||||
ReadOnlySpan<float> waveBufferPcmFloat = ReadOnlySpan<float>.Empty;
|
||||
ReadOnlySpan<float> waveBufferPcmFloat = [];
|
||||
|
||||
if (waveBuffer.Buffer != 0 && waveBuffer.BufferSize != 0)
|
||||
{
|
||||
|
|
|
@ -9,8 +9,9 @@ namespace Ryujinx.Audio.Renderer.Dsp
|
|||
{
|
||||
public static class ResamplerHelper
|
||||
{
|
||||
#pragma warning disable IDE0055 // Disable formatting
|
||||
#region "Default Quality Lookup Tables"
|
||||
private static readonly short[] _normalCurveLut0 = {
|
||||
private static readonly short[] _normalCurveLut0 = [
|
||||
6600, 19426, 6722, 3, 6479, 19424, 6845, 9, 6359, 19419, 6968, 15, 6239, 19412, 7093, 22,
|
||||
6121, 19403, 7219, 28, 6004, 19391, 7345, 34, 5888, 19377, 7472, 41, 5773, 19361, 7600, 48,
|
||||
5659, 19342, 7728, 55, 5546, 19321, 7857, 62, 5434, 19298, 7987, 69, 5323, 19273, 8118, 77,
|
||||
|
@ -43,9 +44,9 @@ namespace Ryujinx.Audio.Renderer.Dsp
|
|||
77, 8118, 19273, 5323, 69, 7987, 19298, 5434, 62, 7857, 19321, 5546, 55, 7728, 19342, 5659,
|
||||
48, 7600, 19361, 5773, 41, 7472, 19377, 5888, 34, 7345, 19391, 6004, 28, 7219, 19403, 6121,
|
||||
22, 7093, 19412, 6239, 15, 6968, 19419, 6359, 9, 6845, 19424, 6479, 3, 6722, 19426, 6600,
|
||||
};
|
||||
];
|
||||
|
||||
private static readonly short[] _normalCurveLut1 = {
|
||||
private static readonly short[] _normalCurveLut1 = [
|
||||
-68, 32639, 69, -5, -200, 32630, 212, -15, -328, 32613, 359, -26, -450, 32586, 512, -36,
|
||||
-568, 32551, 669, -47, -680, 32507, 832, -58, -788, 32454, 1000, -69, -891, 32393, 1174, -80,
|
||||
-990, 32323, 1352, -92, -1084, 32244, 1536, -103, -1173, 32157, 1724, -115, -1258, 32061, 1919, -128,
|
||||
|
@ -78,9 +79,9 @@ namespace Ryujinx.Audio.Renderer.Dsp
|
|||
-128, 1919, 32061, -1258, -115, 1724, 32157, -1173, -103, 1536, 32244, -1084, -92, 1352, 32323, -990,
|
||||
-80, 1174, 32393, -891, -69, 1000, 32454, -788, -58, 832, 32507, -680, -47, 669, 32551, -568,
|
||||
-36, 512, 32586, -450, -26, 359, 32613, -328, -15, 212, 32630, -200, -5, 69, 32639, -68,
|
||||
};
|
||||
];
|
||||
|
||||
private static readonly short[] _normalCurveLut2 = {
|
||||
private static readonly short[] _normalCurveLut2 = [
|
||||
3195, 26287, 3329, -32, 3064, 26281, 3467, -34, 2936, 26270, 3608, -38, 2811, 26253, 3751, -42,
|
||||
2688, 26230, 3897, -46, 2568, 26202, 4046, -50, 2451, 26169, 4199, -54, 2338, 26130, 4354, -58,
|
||||
2227, 26085, 4512, -63, 2120, 26035, 4673, -67, 2015, 25980, 4837, -72, 1912, 25919, 5004, -76,
|
||||
|
@ -113,11 +114,11 @@ namespace Ryujinx.Audio.Renderer.Dsp
|
|||
-76, 5004, 25919, 1912, -72, 4837, 25980, 2015, -67, 4673, 26035, 2120, -63, 4512, 26085, 2227,
|
||||
-58, 4354, 26130, 2338, -54, 4199, 26169, 2451, -50, 4046, 26202, 2568, -46, 3897, 26230, 2688,
|
||||
-42, 3751, 26253, 2811, -38, 3608, 26270, 2936, -34, 3467, 26281, 3064, -32, 3329, 26287, 3195,
|
||||
};
|
||||
];
|
||||
#endregion
|
||||
|
||||
#region "High Quality Lookup Tables"
|
||||
private static readonly short[] _highCurveLut0 = {
|
||||
private static readonly short[] _highCurveLut0 = [
|
||||
-582, -23, 8740, 16386, 8833, 8, -590, 0, -573, -54, 8647, 16385, 8925, 40, -598, -1,
|
||||
-565, -84, 8555, 16383, 9018, 72, -606, -1, -557, -113, 8462, 16379, 9110, 105, -614, -2,
|
||||
-549, -142, 8370, 16375, 9203, 139, -622, -2, -541, -170, 8277, 16369, 9295, 173, -630, -3,
|
||||
|
@ -182,9 +183,9 @@ namespace Ryujinx.Audio.Renderer.Dsp
|
|||
-3, -630, 173, 9295, 16369, 8277, -170, -541, -2, -622, 139, 9203, 16375, 8370, -142, -549,
|
||||
-2, -614, 105, 9110, 16379, 8462, -113, -557, -1, -606, 72, 9018, 16383, 8555, -84, -565,
|
||||
-1, -598, 40, 8925, 16385, 8647, -54, -573, 0, -590, 8, 8833, 16386, 8740, -23, -582,
|
||||
};
|
||||
];
|
||||
|
||||
private static readonly short[] _highCurveLut1 = {
|
||||
private static readonly short[] _highCurveLut1 = [
|
||||
-12, 47, -134, 32767, 81, -16, 2, 0, -26, 108, -345, 32760, 301, -79, 17, -1,
|
||||
-40, 168, -552, 32745, 526, -144, 32, -2, -53, 226, -753, 32723, 755, -210, 47, -3,
|
||||
-66, 284, -950, 32694, 989, -277, 63, -5, -78, 340, -1143, 32658, 1226, -346, 79, -6,
|
||||
|
@ -249,9 +250,9 @@ namespace Ryujinx.Audio.Renderer.Dsp
|
|||
-6, 79, -346, 1226, 32658, -1143, 340, -78, -5, 63, -277, 989, 32694, -950, 284, -66,
|
||||
-3, 47, -210, 755, 32723, -753, 226, -53, -2, 32, -144, 526, 32745, -552, 168, -40,
|
||||
-1, 17, -79, 301, 32760, -345, 108, -26, 0, 2, -16, 81, 32767, -134, 47, -12,
|
||||
};
|
||||
];
|
||||
|
||||
private static readonly short[] _highCurveLut2 = {
|
||||
private static readonly short[] _highCurveLut2 = [
|
||||
418, -2538, 6118, 24615, 6298, -2563, 417, 0, 420, -2512, 5939, 24611, 6479, -2588, 415, 1,
|
||||
421, -2485, 5761, 24605, 6662, -2612, 412, 2, 422, -2458, 5585, 24595, 6846, -2635, 409, 3,
|
||||
423, -2430, 5410, 24582, 7030, -2658, 406, 4, 423, -2402, 5236, 24565, 7216, -2680, 403, 5,
|
||||
|
@ -316,8 +317,9 @@ namespace Ryujinx.Audio.Renderer.Dsp
|
|||
5, 403, -2680, 7216, 24565, 5236, -2402, 423, 4, 406, -2658, 7030, 24582, 5410, -2430, 423,
|
||||
3, 409, -2635, 6846, 24595, 5585, -2458, 422, 2, 412, -2612, 6662, 24605, 5761, -2485, 421,
|
||||
1, 415, -2588, 6479, 24611, 5939, -2512, 420, 0, 417, -2563, 6298, 24615, 6118, -2538, 418,
|
||||
};
|
||||
];
|
||||
#endregion
|
||||
#pragma warning restore IDE0055
|
||||
|
||||
private static readonly float[] _normalCurveLut0F;
|
||||
private static readonly float[] _normalCurveLut1F;
|
||||
|
|
|
@ -6,12 +6,12 @@ namespace Ryujinx.Audio.Renderer.Dsp.State
|
|||
{
|
||||
public struct Reverb3dState
|
||||
{
|
||||
private readonly float[] _fdnDelayMinTimes = new float[4] { 5.0f, 6.0f, 13.0f, 14.0f };
|
||||
private readonly float[] _fdnDelayMaxTimes = new float[4] { 45.704f, 82.782f, 149.94f, 271.58f };
|
||||
private readonly float[] _decayDelayMaxTimes1 = new float[4] { 17.0f, 13.0f, 9.0f, 7.0f };
|
||||
private readonly float[] _decayDelayMaxTimes2 = new float[4] { 19.0f, 11.0f, 10.0f, 6.0f };
|
||||
private readonly float[] _earlyDelayTimes = new float[20] { 0.017136f, 0.059154f, 0.16173f, 0.39019f, 0.42526f, 0.45541f, 0.68974f, 0.74591f, 0.83384f, 0.8595f, 0.0f, 0.075024f, 0.16879f, 0.2999f, 0.33744f, 0.3719f, 0.59901f, 0.71674f, 0.81786f, 0.85166f };
|
||||
public readonly float[] EarlyGain = new float[20] { 0.67096f, 0.61027f, 1.0f, 0.35680f, 0.68361f, 0.65978f, 0.51939f, 0.24712f, 0.45945f, 0.45021f, 0.64196f, 0.54879f, 0.92925f, 0.38270f, 0.72867f, 0.69794f, 0.5464f, 0.24563f, 0.45214f, 0.44042f };
|
||||
private readonly float[] _fdnDelayMinTimes = [5.0f, 6.0f, 13.0f, 14.0f];
|
||||
private readonly float[] _fdnDelayMaxTimes = [45.704f, 82.782f, 149.94f, 271.58f];
|
||||
private readonly float[] _decayDelayMaxTimes1 = [17.0f, 13.0f, 9.0f, 7.0f];
|
||||
private readonly float[] _decayDelayMaxTimes2 = [19.0f, 11.0f, 10.0f, 6.0f];
|
||||
private readonly float[] _earlyDelayTimes = [0.017136f, 0.059154f, 0.16173f, 0.39019f, 0.42526f, 0.45541f, 0.68974f, 0.74591f, 0.83384f, 0.8595f, 0.0f, 0.075024f, 0.16879f, 0.2999f, 0.33744f, 0.3719f, 0.59901f, 0.71674f, 0.81786f, 0.85166f];
|
||||
public readonly float[] EarlyGain = [0.67096f, 0.61027f, 1.0f, 0.35680f, 0.68361f, 0.65978f, 0.51939f, 0.24712f, 0.45945f, 0.45021f, 0.64196f, 0.54879f, 0.92925f, 0.38270f, 0.72867f, 0.69794f, 0.5464f, 0.24563f, 0.45214f, 0.44042f];
|
||||
|
||||
public IDelayLine[] FdnDelayLines { get; }
|
||||
public DecayDelay[] DecayDelays1 { get; }
|
||||
|
|
|
@ -7,8 +7,9 @@ namespace Ryujinx.Audio.Renderer.Dsp.State
|
|||
{
|
||||
public struct ReverbState
|
||||
{
|
||||
private static readonly float[] _fdnDelayTimes = new float[20]
|
||||
{
|
||||
#pragma warning disable IDE0055 // Disable formatting
|
||||
private static readonly float[] _fdnDelayTimes =
|
||||
[
|
||||
// Room
|
||||
53.953247f, 79.192566f, 116.238770f, 130.615295f,
|
||||
// Hall
|
||||
|
@ -19,10 +20,10 @@ namespace Ryujinx.Audio.Renderer.Dsp.State
|
|||
47.03f, 71f, 103f, 170f,
|
||||
// Max delay (Hall is the one with the highest values so identical to Hall)
|
||||
53.953247f, 79.192566f, 116.238770f, 170.615295f,
|
||||
};
|
||||
];
|
||||
|
||||
private static readonly float[] _decayDelayTimes = new float[20]
|
||||
{
|
||||
private static readonly float[] _decayDelayTimes =
|
||||
[
|
||||
// Room
|
||||
7f, 9f, 13f, 17f,
|
||||
// Hall
|
||||
|
@ -33,10 +34,10 @@ namespace Ryujinx.Audio.Renderer.Dsp.State
|
|||
7f, 7f, 13f, 9f,
|
||||
// Max delay (Hall is the one with the highest values so identical to Hall)
|
||||
7f, 9f, 13f, 17f,
|
||||
};
|
||||
];
|
||||
|
||||
private static readonly float[] _earlyDelayTimes = new float[50]
|
||||
{
|
||||
private static readonly float[] _earlyDelayTimes =
|
||||
[
|
||||
// Room
|
||||
0.0f, 3.5f, 2.8f, 3.9f, 2.7f, 13.4f, 7.9f, 8.4f, 9.9f, 12.0f,
|
||||
// Chamber
|
||||
|
@ -47,10 +48,10 @@ namespace Ryujinx.Audio.Renderer.Dsp.State
|
|||
33.1f, 43.3f, 22.8f, 37.9f, 14.9f, 35.3f, 17.9f, 34.2f, 0.0f, 43.3f,
|
||||
// Disabled
|
||||
0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f,
|
||||
};
|
||||
];
|
||||
|
||||
private static readonly float[] _earlyGainBase = new float[50]
|
||||
{
|
||||
private static readonly float[] _earlyGainBase =
|
||||
[
|
||||
// Room
|
||||
0.70f, 0.68f, 0.70f, 0.68f, 0.70f, 0.68f, 0.70f, 0.68f, 0.68f, 0.68f,
|
||||
// Chamber
|
||||
|
@ -61,10 +62,11 @@ namespace Ryujinx.Audio.Renderer.Dsp.State
|
|||
0.93f, 0.92f, 0.87f, 0.86f, 0.94f, 0.81f, 0.80f, 0.77f, 0.76f, 0.65f,
|
||||
// Disabled
|
||||
0.00f, 0.00f, 0.00f, 0.00f, 0.00f, 0.00f, 0.00f, 0.00f, 0.00f, 0.00f,
|
||||
};
|
||||
];
|
||||
#pragma warning restore IDE0055
|
||||
|
||||
private static readonly float[] _preDelayTimes = new float[5]
|
||||
{
|
||||
private static readonly float[] _preDelayTimes =
|
||||
[
|
||||
// Room
|
||||
12.5f,
|
||||
// Chamber
|
||||
|
@ -75,7 +77,7 @@ namespace Ryujinx.Audio.Renderer.Dsp.State
|
|||
50.0f,
|
||||
// Disabled
|
||||
0.0f,
|
||||
};
|
||||
];
|
||||
|
||||
public DelayLine[] FdnDelayLines { get; }
|
||||
public DecayDelay[] DecayDelays { get; }
|
||||
|
|
|
@ -190,7 +190,7 @@ namespace Ryujinx.Audio.Renderer.Server.MemoryPool
|
|||
}
|
||||
}
|
||||
|
||||
return Span<MemoryPoolState>.Empty;
|
||||
return [];
|
||||
}
|
||||
|
||||
/// <summary>
|
||||
|
|
|
@ -125,7 +125,7 @@ namespace Ryujinx.Audio.Renderer.Server.Mix
|
|||
{
|
||||
if (_effectProcessingOrderArrayPointer == IntPtr.Zero)
|
||||
{
|
||||
return Span<int>.Empty;
|
||||
return [];
|
||||
}
|
||||
|
||||
unsafe
|
||||
|
|
|
@ -80,7 +80,7 @@ namespace Ryujinx.Audio.Renderer.Server.Splitter
|
|||
{
|
||||
if (Unsafe.IsNullRef(ref _v1))
|
||||
{
|
||||
return Span<float>.Empty;
|
||||
return [];
|
||||
}
|
||||
else
|
||||
{
|
||||
|
@ -106,7 +106,7 @@ namespace Ryujinx.Audio.Renderer.Server.Splitter
|
|||
{
|
||||
if (Unsafe.IsNullRef(ref _v1))
|
||||
{
|
||||
return Span<float>.Empty;
|
||||
return [];
|
||||
}
|
||||
else
|
||||
{
|
||||
|
|
|
@ -13,7 +13,7 @@ namespace Ryujinx.Common
|
|||
|
||||
public bool IsCancellationRequested => _cts.IsCancellationRequested;
|
||||
|
||||
public AsyncWorkQueue(Action<T> callback, string name = null) : this(callback, name, new BlockingCollection<T>())
|
||||
public AsyncWorkQueue(Action<T> callback, string name = null) : this(callback, name, [])
|
||||
{
|
||||
}
|
||||
|
||||
|
|
|
@ -106,7 +106,7 @@ namespace Ryujinx.Common.Collections
|
|||
/// <returns>A list of all RangeNodes sorted by Key Order</returns>
|
||||
public List<RangeNode<TKey, TValue>> AsList()
|
||||
{
|
||||
List<RangeNode<TKey, TValue>> list = new();
|
||||
List<RangeNode<TKey, TValue>> list = [];
|
||||
|
||||
AddToList(Root, list);
|
||||
|
||||
|
@ -492,7 +492,7 @@ namespace Ryujinx.Common.Collections
|
|||
Start = start;
|
||||
End = end;
|
||||
Max = end;
|
||||
Values = new List<RangeNode<TKey, TValue>> { new RangeNode<TKey, TValue>(start, end, value) };
|
||||
Values = [new RangeNode<TKey, TValue>(start, end, value)];
|
||||
Parent = parent;
|
||||
}
|
||||
}
|
||||
|
|
|
@ -139,7 +139,7 @@ namespace Ryujinx.Common.Collections
|
|||
/// <param name="list">List to add the tree pairs into</param>
|
||||
public List<KeyValuePair<TKey, TValue>> AsLevelOrderList()
|
||||
{
|
||||
List<KeyValuePair<TKey, TValue>> list = new();
|
||||
List<KeyValuePair<TKey, TValue>> list = [];
|
||||
|
||||
Queue<Node<TKey, TValue>> nodes = new();
|
||||
|
||||
|
@ -168,7 +168,7 @@ namespace Ryujinx.Common.Collections
|
|||
/// <returns>A list of all KeyValuePairs sorted by Key Order</returns>
|
||||
public List<KeyValuePair<TKey, TValue>> AsList()
|
||||
{
|
||||
List<KeyValuePair<TKey, TValue>> list = new();
|
||||
List<KeyValuePair<TKey, TValue>> list = [];
|
||||
|
||||
AddToList(Root, list);
|
||||
|
||||
|
@ -574,7 +574,7 @@ namespace Ryujinx.Common.Collections
|
|||
/// <returns>List of node keys</returns>
|
||||
private SortedList<TKey, TValue> GetKeyValues()
|
||||
{
|
||||
SortedList<TKey, TValue> set = new();
|
||||
SortedList<TKey, TValue> set = [];
|
||||
Queue<Node<TKey, TValue>> queue = new();
|
||||
if (Root != null)
|
||||
{
|
||||
|
|
|
@ -8,7 +8,7 @@ namespace Ryujinx.Common.Configuration
|
|||
|
||||
public ModMetadata()
|
||||
{
|
||||
Mods = new List<Mod>();
|
||||
Mods = [];
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
@ -131,7 +131,7 @@ namespace Ryujinx.Common.Logging
|
|||
_enabledClasses[index] = true;
|
||||
}
|
||||
|
||||
_logTargets = new List<ILogTarget>();
|
||||
_logTargets = [];
|
||||
|
||||
_time = Stopwatch.StartNew();
|
||||
|
||||
|
|
|
@ -87,7 +87,7 @@ namespace Ryujinx.Common.Memory
|
|||
/// Gets a span from the array.
|
||||
/// </summary>
|
||||
/// <returns>Span of the array</returns>
|
||||
public Span<T> AsSpan() => Length == 0 ? Span<T>.Empty : MemoryMarshal.CreateSpan(ref this[0], Length);
|
||||
public Span<T> AsSpan() => Length == 0 ? [] : MemoryMarshal.CreateSpan(ref this[0], Length);
|
||||
|
||||
/// <summary>
|
||||
/// Gets the array base pointer.
|
||||
|
|
|
@ -125,8 +125,8 @@ namespace Ryujinx.Common.PreciseSleep
|
|||
}
|
||||
|
||||
private readonly object _lock = new();
|
||||
private readonly List<NanosleepThread> _threads = new();
|
||||
private readonly List<NanosleepThread> _active = new();
|
||||
private readonly List<NanosleepThread> _threads = [];
|
||||
private readonly List<NanosleepThread> _active = [];
|
||||
private readonly Stack<NanosleepThread> _free = new();
|
||||
private readonly AutoResetEvent _signalTarget;
|
||||
|
||||
|
|
|
@ -51,7 +51,7 @@ namespace Ryujinx.Common.SystemInterop
|
|||
private long _lastId;
|
||||
|
||||
private readonly object _lock = new();
|
||||
private readonly List<WaitingObject> _waitingObjects = new();
|
||||
private readonly List<WaitingObject> _waitingObjects = [];
|
||||
|
||||
private WindowsGranularTimer()
|
||||
{
|
||||
|
|
|
@ -31,7 +31,8 @@ namespace Ryujinx.Common
|
|||
private const ulong Prime64_4 = 0x85EBCA77C2B2AE63UL;
|
||||
private const ulong Prime64_5 = 0x27D4EB2F165667C5UL;
|
||||
|
||||
private static readonly ulong[] _xxh3InitAcc = {
|
||||
private static readonly ulong[] _xxh3InitAcc =
|
||||
[
|
||||
Prime32_3,
|
||||
Prime64_1,
|
||||
Prime64_2,
|
||||
|
@ -39,8 +40,8 @@ namespace Ryujinx.Common
|
|||
Prime64_4,
|
||||
Prime32_2,
|
||||
Prime64_5,
|
||||
Prime32_1,
|
||||
};
|
||||
Prime32_1
|
||||
];
|
||||
|
||||
private static ReadOnlySpan<byte> Xxh3KSecret => new byte[]
|
||||
{
|
||||
|
|
|
@ -230,7 +230,7 @@ namespace Ryujinx.Cpu.AppleHv
|
|||
{
|
||||
if (size == 0)
|
||||
{
|
||||
return Enumerable.Empty<HostMemoryRange>();
|
||||
return [];
|
||||
}
|
||||
|
||||
var guestRegions = GetPhysicalRegionsImpl(va, size);
|
||||
|
@ -256,7 +256,7 @@ namespace Ryujinx.Cpu.AppleHv
|
|||
{
|
||||
if (size == 0)
|
||||
{
|
||||
return Enumerable.Empty<MemoryRange>();
|
||||
return [];
|
||||
}
|
||||
|
||||
return GetPhysicalRegionsImpl(va, size);
|
||||
|
|
|
@ -21,7 +21,7 @@ namespace Ryujinx.Cpu.Jit.HostTracked
|
|||
public AddressSpacePartitioned(MemoryTracking tracking, MemoryBlock backingMemory, NativePageTable nativePageTable, bool useProtectionMirrors)
|
||||
{
|
||||
_backingMemory = backingMemory;
|
||||
_partitions = new();
|
||||
_partitions = [];
|
||||
_asAllocator = new(tracking, nativePageTable.Read, _partitions);
|
||||
_updatePtCallback = nativePageTable.Update;
|
||||
_useProtectionMirrors = useProtectionMirrors;
|
||||
|
|
|
@ -250,7 +250,7 @@ namespace Ryujinx.Cpu.Jit
|
|||
{
|
||||
if (size == 0)
|
||||
{
|
||||
return Enumerable.Empty<HostMemoryRange>();
|
||||
return [];
|
||||
}
|
||||
|
||||
var guestRegions = GetPhysicalRegionsImpl(va, size);
|
||||
|
@ -276,7 +276,7 @@ namespace Ryujinx.Cpu.Jit
|
|||
{
|
||||
if (size == 0)
|
||||
{
|
||||
return Enumerable.Empty<MemoryRange>();
|
||||
return [];
|
||||
}
|
||||
|
||||
return GetPhysicalRegionsImpl(va, size);
|
||||
|
|
|
@ -263,7 +263,7 @@ namespace Ryujinx.Cpu.Jit
|
|||
{
|
||||
if (size == 0)
|
||||
{
|
||||
return ReadOnlySpan<byte>.Empty;
|
||||
return [];
|
||||
}
|
||||
|
||||
if (tracked)
|
||||
|
@ -469,7 +469,7 @@ namespace Ryujinx.Cpu.Jit
|
|||
{
|
||||
if (size == 0)
|
||||
{
|
||||
return Enumerable.Empty<MemoryRange>();
|
||||
return [];
|
||||
}
|
||||
|
||||
return GetPhysicalRegionsImpl(va, size);
|
||||
|
|
|
@ -36,7 +36,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm32
|
|||
RegisterAllocator = registerAllocator;
|
||||
MemoryManagerType = mmType;
|
||||
_itConditions = new ArmCondition[4];
|
||||
_pendingBranches = new();
|
||||
_pendingBranches = [];
|
||||
IsThumb = isThumb;
|
||||
}
|
||||
|
||||
|
|
|
@ -10,8 +10,8 @@ namespace Ryujinx.Cpu.LightningJit.Arm32
|
|||
{
|
||||
public static MultiBlock DecodeMulti(CpuPreset cpuPreset, IMemoryManager memoryManager, ulong address, bool isThumb)
|
||||
{
|
||||
List<Block> blocks = new();
|
||||
List<ulong> branchTargets = new();
|
||||
List<Block> blocks = [];
|
||||
List<ulong> branchTargets = [];
|
||||
|
||||
while (true)
|
||||
{
|
||||
|
@ -202,7 +202,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm32
|
|||
{
|
||||
ulong startAddress = address;
|
||||
|
||||
List<InstInfo> insts = new();
|
||||
List<InstInfo> insts = [];
|
||||
|
||||
uint encoding;
|
||||
InstMeta meta;
|
||||
|
|
|
@ -9,494 +9,494 @@ namespace Ryujinx.Cpu.LightningJit.Arm32
|
|||
|
||||
static InstTableA32()
|
||||
{
|
||||
InstEncoding[] condConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0xF0000000, 0xF0000000),
|
||||
};
|
||||
InstEncoding[] condConstraints =
|
||||
[
|
||||
new(0xF0000000, 0xF0000000)
|
||||
];
|
||||
|
||||
InstEncoding[] condRnsRnConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] condRnsRnConstraints =
|
||||
[
|
||||
new(0xF0000000, 0xF0000000),
|
||||
new(0x000F0000, 0x001F0000),
|
||||
new(0x000D0000, 0x000F0000),
|
||||
};
|
||||
new(0x000D0000, 0x000F0000)
|
||||
];
|
||||
|
||||
InstEncoding[] condRnConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] condRnConstraints =
|
||||
[
|
||||
new(0xF0000000, 0xF0000000),
|
||||
new(0x000D0000, 0x000F0000),
|
||||
};
|
||||
new(0x000D0000, 0x000F0000)
|
||||
];
|
||||
|
||||
InstEncoding[] vdVmConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] vdVmConstraints =
|
||||
[
|
||||
new(0x00001000, 0x00001000),
|
||||
new(0x00000001, 0x00000001),
|
||||
};
|
||||
new(0x00000001, 0x00000001)
|
||||
];
|
||||
|
||||
InstEncoding[] condRnConstraints2 = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] condRnConstraints2 =
|
||||
[
|
||||
new(0xF0000000, 0xF0000000),
|
||||
new(0x0000000F, 0x0000000F),
|
||||
};
|
||||
new(0x0000000F, 0x0000000F)
|
||||
];
|
||||
|
||||
InstEncoding[] optionConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x00000000, 0x0000000F),
|
||||
};
|
||||
InstEncoding[] optionConstraints =
|
||||
[
|
||||
new(0x00000000, 0x0000000F)
|
||||
];
|
||||
|
||||
InstEncoding[] condPuwPwPuwPuwConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] condPuwPwPuwPuwConstraints =
|
||||
[
|
||||
new(0xF0000000, 0xF0000000),
|
||||
new(0x00000000, 0x01A00000),
|
||||
new(0x01000000, 0x01200000),
|
||||
new(0x00200000, 0x01A00000),
|
||||
new(0x01A00000, 0x01A00000),
|
||||
};
|
||||
new(0x01A00000, 0x01A00000)
|
||||
];
|
||||
|
||||
InstEncoding[] condRnPuwConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] condRnPuwConstraints =
|
||||
[
|
||||
new(0xF0000000, 0xF0000000),
|
||||
new(0x000F0000, 0x000F0000),
|
||||
new(0x00000000, 0x01A00000),
|
||||
};
|
||||
new(0x00000000, 0x01A00000)
|
||||
];
|
||||
|
||||
InstEncoding[] condPuwConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] condPuwConstraints =
|
||||
[
|
||||
new(0xF0000000, 0xF0000000),
|
||||
new(0x00000000, 0x01A00000),
|
||||
};
|
||||
new(0x00000000, 0x01A00000)
|
||||
];
|
||||
|
||||
InstEncoding[] condRnPwConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] condRnPwConstraints =
|
||||
[
|
||||
new(0xF0000000, 0xF0000000),
|
||||
new(0x000F0000, 0x000F0000),
|
||||
new(0x00200000, 0x01200000),
|
||||
};
|
||||
new(0x00200000, 0x01200000)
|
||||
];
|
||||
|
||||
InstEncoding[] condPwConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] condPwConstraints =
|
||||
[
|
||||
new(0xF0000000, 0xF0000000),
|
||||
new(0x00200000, 0x01200000),
|
||||
};
|
||||
new(0x00200000, 0x01200000)
|
||||
];
|
||||
|
||||
InstEncoding[] condRnConstraints3 = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] condRnConstraints3 =
|
||||
[
|
||||
new(0xF0000000, 0xF0000000),
|
||||
new(0x000F0000, 0x000F0000),
|
||||
};
|
||||
new(0x000F0000, 0x000F0000)
|
||||
];
|
||||
|
||||
InstEncoding[] condMaskrConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] condMaskrConstraints =
|
||||
[
|
||||
new(0xF0000000, 0xF0000000),
|
||||
new(0x00000000, 0x004F0000),
|
||||
};
|
||||
new(0x00000000, 0x004F0000)
|
||||
];
|
||||
|
||||
InstEncoding[] rnConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x000F0000, 0x000F0000),
|
||||
};
|
||||
InstEncoding[] rnConstraints =
|
||||
[
|
||||
new(0x000F0000, 0x000F0000)
|
||||
];
|
||||
|
||||
InstEncoding[] vdVnVmConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] vdVnVmConstraints =
|
||||
[
|
||||
new(0x00001000, 0x00001000),
|
||||
new(0x00010000, 0x00010000),
|
||||
new(0x00000001, 0x00000001),
|
||||
};
|
||||
new(0x00000001, 0x00000001)
|
||||
];
|
||||
|
||||
InstEncoding[] condRaConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] condRaConstraints =
|
||||
[
|
||||
new(0xF0000000, 0xF0000000),
|
||||
new(0x0000F000, 0x0000F000),
|
||||
};
|
||||
new(0x0000F000, 0x0000F000)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeQvdQvnQvmConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeQvdQvnQvmConstraints =
|
||||
[
|
||||
new(0x00300000, 0x00300000),
|
||||
new(0x00001040, 0x00001040),
|
||||
new(0x00010040, 0x00010040),
|
||||
new(0x00000041, 0x00000041),
|
||||
};
|
||||
new(0x00000041, 0x00000041)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeVdConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeVdConstraints =
|
||||
[
|
||||
new(0x00300000, 0x00300000),
|
||||
new(0x00001000, 0x00001000),
|
||||
};
|
||||
new(0x00001000, 0x00001000)
|
||||
];
|
||||
|
||||
InstEncoding[] qvdQvnQvmConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] qvdQvnQvmConstraints =
|
||||
[
|
||||
new(0x00001040, 0x00001040),
|
||||
new(0x00010040, 0x00010040),
|
||||
new(0x00000041, 0x00000041),
|
||||
};
|
||||
new(0x00000041, 0x00000041)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeQvdQvmConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeQvdQvmConstraints =
|
||||
[
|
||||
new(0x000C0000, 0x000C0000),
|
||||
new(0x00001040, 0x00001040),
|
||||
new(0x00000041, 0x00000041),
|
||||
};
|
||||
new(0x00000041, 0x00000041)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeVnVmConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeVnVmConstraints =
|
||||
[
|
||||
new(0x00300000, 0x00300000),
|
||||
new(0x00010000, 0x00010000),
|
||||
new(0x00000001, 0x00000001),
|
||||
};
|
||||
new(0x00000001, 0x00000001)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeVdOpvnConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeVdOpvnConstraints =
|
||||
[
|
||||
new(0x00300000, 0x00300000),
|
||||
new(0x00001000, 0x00001000),
|
||||
new(0x00010100, 0x00010100),
|
||||
};
|
||||
new(0x00010100, 0x00010100)
|
||||
];
|
||||
|
||||
InstEncoding[] cmodeCmodeQvdConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] cmodeCmodeQvdConstraints =
|
||||
[
|
||||
new(0x00000000, 0x00000100),
|
||||
new(0x00000C00, 0x00000C00),
|
||||
new(0x00001040, 0x00001040),
|
||||
};
|
||||
new(0x00001040, 0x00001040)
|
||||
];
|
||||
|
||||
InstEncoding[] qvdQvnQvmOpConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] qvdQvnQvmOpConstraints =
|
||||
[
|
||||
new(0x00001040, 0x00001040),
|
||||
new(0x00010040, 0x00010040),
|
||||
new(0x00000041, 0x00000041),
|
||||
new(0x00000000, 0x00300000),
|
||||
};
|
||||
new(0x00000000, 0x00300000)
|
||||
];
|
||||
|
||||
InstEncoding[] qvdQvnQvmSizeConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] qvdQvnQvmSizeConstraints =
|
||||
[
|
||||
new(0x00001040, 0x00001040),
|
||||
new(0x00010040, 0x00010040),
|
||||
new(0x00000041, 0x00000041),
|
||||
new(0x00300000, 0x00300000),
|
||||
};
|
||||
new(0x00300000, 0x00300000)
|
||||
];
|
||||
|
||||
InstEncoding[] qvdQvnConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] qvdQvnConstraints =
|
||||
[
|
||||
new(0x00001040, 0x00001040),
|
||||
new(0x00010040, 0x00010040),
|
||||
};
|
||||
new(0x00010040, 0x00010040)
|
||||
];
|
||||
|
||||
InstEncoding[] qvdQvmConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] qvdQvmConstraints =
|
||||
[
|
||||
new(0x00001040, 0x00001040),
|
||||
new(0x00000041, 0x00000041),
|
||||
};
|
||||
new(0x00000041, 0x00000041)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x00000000, 0x00000300),
|
||||
};
|
||||
InstEncoding[] sizeConstraints =
|
||||
[
|
||||
new(0x00000000, 0x00000300)
|
||||
];
|
||||
|
||||
InstEncoding[] vmConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x00000001, 0x00000001),
|
||||
};
|
||||
InstEncoding[] vmConstraints =
|
||||
[
|
||||
new(0x00000001, 0x00000001)
|
||||
];
|
||||
|
||||
InstEncoding[] opvdOpvmConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] opvdOpvmConstraints =
|
||||
[
|
||||
new(0x00001100, 0x00001100),
|
||||
new(0x00000001, 0x00000101),
|
||||
};
|
||||
new(0x00000001, 0x00000101)
|
||||
];
|
||||
|
||||
InstEncoding[] imm6Opimm6Imm6QvdQvmConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] imm6Opimm6Imm6QvdQvmConstraints =
|
||||
[
|
||||
new(0x00000000, 0x00380000),
|
||||
new(0x00200000, 0x00300200),
|
||||
new(0x00000000, 0x00200000),
|
||||
new(0x00001040, 0x00001040),
|
||||
new(0x00000041, 0x00000041),
|
||||
};
|
||||
new(0x00000041, 0x00000041)
|
||||
];
|
||||
|
||||
InstEncoding[] condQvdEbConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] condQvdEbConstraints =
|
||||
[
|
||||
new(0xF0000000, 0xF0000000),
|
||||
new(0x00210000, 0x00210000),
|
||||
new(0x00400020, 0x00400020),
|
||||
};
|
||||
new(0x00400020, 0x00400020)
|
||||
];
|
||||
|
||||
InstEncoding[] imm4QvdConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] imm4QvdConstraints =
|
||||
[
|
||||
new(0x00000000, 0x00070000),
|
||||
new(0x00001040, 0x00001040),
|
||||
};
|
||||
new(0x00001040, 0x00001040)
|
||||
];
|
||||
|
||||
InstEncoding[] qvdQvnQvmQimm4Constraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] qvdQvnQvmQimm4Constraints =
|
||||
[
|
||||
new(0x00001040, 0x00001040),
|
||||
new(0x00010040, 0x00010040),
|
||||
new(0x00000041, 0x00000041),
|
||||
new(0x00000800, 0x00000840),
|
||||
};
|
||||
new(0x00000800, 0x00000840)
|
||||
];
|
||||
|
||||
InstEncoding[] qvdConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x00001040, 0x00001040),
|
||||
};
|
||||
InstEncoding[] qvdConstraints =
|
||||
[
|
||||
new(0x00001040, 0x00001040)
|
||||
];
|
||||
|
||||
InstEncoding[] vdVnConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] vdVnConstraints =
|
||||
[
|
||||
new(0x00001000, 0x00001000),
|
||||
new(0x00010000, 0x00010000),
|
||||
};
|
||||
new(0x00010000, 0x00010000)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeConstraints2 = new InstEncoding[]
|
||||
{
|
||||
new(0x00000C00, 0x00000C00),
|
||||
};
|
||||
InstEncoding[] sizeConstraints2 =
|
||||
[
|
||||
new(0x00000C00, 0x00000C00)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeIndexAlignIndexAlignConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeIndexAlignIndexAlignConstraints =
|
||||
[
|
||||
new(0x00000C00, 0x00000C00),
|
||||
new(0x00000010, 0x00000030),
|
||||
new(0x00000020, 0x00000030),
|
||||
};
|
||||
new(0x00000020, 0x00000030)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeSizeaConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeSizeaConstraints =
|
||||
[
|
||||
new(0x000000C0, 0x000000C0),
|
||||
new(0x00000010, 0x000000D0),
|
||||
};
|
||||
new(0x00000010, 0x000000D0)
|
||||
];
|
||||
|
||||
InstEncoding[] alignConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x00000020, 0x00000020),
|
||||
};
|
||||
InstEncoding[] alignConstraints =
|
||||
[
|
||||
new(0x00000020, 0x00000020)
|
||||
];
|
||||
|
||||
InstEncoding[] alignConstraints2 = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] alignConstraints2 =
|
||||
[
|
||||
new(0x00000030, 0x00000030)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeConstraints3 =
|
||||
[
|
||||
new(0x000000C0, 0x000000C0)
|
||||
];
|
||||
|
||||
InstEncoding[] alignSizeConstraints =
|
||||
[
|
||||
new(0x00000030, 0x00000030),
|
||||
};
|
||||
new(0x000000C0, 0x000000C0)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeConstraints3 = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeAConstraints =
|
||||
[
|
||||
new(0x000000C0, 0x000000C0),
|
||||
};
|
||||
new(0x00000010, 0x00000010)
|
||||
];
|
||||
|
||||
InstEncoding[] alignSizeConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x00000030, 0x00000030),
|
||||
InstEncoding[] sizeAlignConstraints =
|
||||
[
|
||||
new(0x000000C0, 0x000000C0),
|
||||
};
|
||||
new(0x00000020, 0x00000020)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeAConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x000000C0, 0x000000C0),
|
||||
new(0x00000010, 0x00000010),
|
||||
};
|
||||
|
||||
InstEncoding[] sizeAlignConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x000000C0, 0x000000C0),
|
||||
new(0x00000020, 0x00000020),
|
||||
};
|
||||
|
||||
InstEncoding[] sizeIndexAlignConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeIndexAlignConstraints =
|
||||
[
|
||||
new(0x00000C00, 0x00000C00),
|
||||
new(0x00000030, 0x00000030),
|
||||
};
|
||||
new(0x00000030, 0x00000030)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeaConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x000000C0, 0x000000D0),
|
||||
};
|
||||
InstEncoding[] sizeaConstraints =
|
||||
[
|
||||
new(0x000000C0, 0x000000D0)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeSizeVdConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeSizeVdConstraints =
|
||||
[
|
||||
new(0x00300000, 0x00300000),
|
||||
new(0x00000000, 0x00300000),
|
||||
new(0x00001000, 0x00001000),
|
||||
};
|
||||
new(0x00001000, 0x00001000)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeQvdQvnConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeQvdQvnConstraints =
|
||||
[
|
||||
new(0x00300000, 0x00300000),
|
||||
new(0x01001000, 0x01001000),
|
||||
new(0x01010000, 0x01010000),
|
||||
};
|
||||
new(0x01010000, 0x01010000)
|
||||
];
|
||||
|
||||
InstEncoding[] imm3hImm3hImm3hImm3hImm3hVdConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] imm3hImm3hImm3hImm3hImm3hVdConstraints =
|
||||
[
|
||||
new(0x00000000, 0x00380000),
|
||||
new(0x00180000, 0x00380000),
|
||||
new(0x00280000, 0x00380000),
|
||||
new(0x00300000, 0x00380000),
|
||||
new(0x00380000, 0x00380000),
|
||||
new(0x00001000, 0x00001000),
|
||||
};
|
||||
new(0x00001000, 0x00001000)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeVmConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeVmConstraints =
|
||||
[
|
||||
new(0x000C0000, 0x000C0000),
|
||||
new(0x00000001, 0x00000001),
|
||||
};
|
||||
new(0x00000001, 0x00000001)
|
||||
];
|
||||
|
||||
InstEncoding[] condOpc1opc2Constraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] condOpc1opc2Constraints =
|
||||
[
|
||||
new(0xF0000000, 0xF0000000),
|
||||
new(0x00000040, 0x00400060),
|
||||
};
|
||||
new(0x00000040, 0x00400060)
|
||||
];
|
||||
|
||||
InstEncoding[] condUopc1opc2Uopc1opc2Constraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] condUopc1opc2Uopc1opc2Constraints =
|
||||
[
|
||||
new(0xF0000000, 0xF0000000),
|
||||
new(0x00800000, 0x00C00060),
|
||||
new(0x00000040, 0x00400060),
|
||||
};
|
||||
new(0x00000040, 0x00400060)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeOpuOpsizeVdConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeOpuOpsizeVdConstraints =
|
||||
[
|
||||
new(0x00300000, 0x00300000),
|
||||
new(0x01000200, 0x01000200),
|
||||
new(0x00100200, 0x00300200),
|
||||
new(0x00001000, 0x00001000),
|
||||
};
|
||||
new(0x00001000, 0x00001000)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeOpsizeOpsizeQvdQvnQvmConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeOpsizeOpsizeQvdQvnQvmConstraints =
|
||||
[
|
||||
new(0x00300000, 0x00300000),
|
||||
new(0x01100000, 0x01300000),
|
||||
new(0x01200000, 0x01300000),
|
||||
new(0x00001040, 0x00001040),
|
||||
new(0x00010040, 0x00010040),
|
||||
new(0x00000041, 0x00000041),
|
||||
};
|
||||
new(0x00000041, 0x00000041)
|
||||
];
|
||||
|
||||
InstEncoding[] cmodeQvdConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] cmodeQvdConstraints =
|
||||
[
|
||||
new(0x00000E00, 0x00000E00),
|
||||
new(0x00001040, 0x00001040),
|
||||
};
|
||||
new(0x00001040, 0x00001040)
|
||||
];
|
||||
|
||||
InstEncoding[] qConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x00000040, 0x00000040),
|
||||
};
|
||||
InstEncoding[] qConstraints =
|
||||
[
|
||||
new(0x00000040, 0x00000040)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeQConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeQConstraints =
|
||||
[
|
||||
new(0x00300000, 0x00300000),
|
||||
new(0x00000040, 0x00000040),
|
||||
};
|
||||
new(0x00000040, 0x00000040)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeConstraints4 = new InstEncoding[]
|
||||
{
|
||||
new(0x00300000, 0x00300000),
|
||||
};
|
||||
InstEncoding[] sizeConstraints4 =
|
||||
[
|
||||
new(0x00300000, 0x00300000)
|
||||
];
|
||||
|
||||
InstEncoding[] qvdQvnQvmSizeSizeConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] qvdQvnQvmSizeSizeConstraints =
|
||||
[
|
||||
new(0x00001040, 0x00001040),
|
||||
new(0x00010040, 0x00010040),
|
||||
new(0x00000041, 0x00000041),
|
||||
new(0x00000000, 0x00300000),
|
||||
new(0x00300000, 0x00300000),
|
||||
};
|
||||
new(0x00300000, 0x00300000)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeSizeQvdQvnConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeSizeQvdQvnConstraints =
|
||||
[
|
||||
new(0x00300000, 0x00300000),
|
||||
new(0x00000000, 0x00300000),
|
||||
new(0x01001000, 0x01001000),
|
||||
new(0x01010000, 0x01010000),
|
||||
};
|
||||
new(0x01010000, 0x01010000)
|
||||
];
|
||||
|
||||
InstEncoding[] opSizeVmConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] opSizeVmConstraints =
|
||||
[
|
||||
new(0x00000000, 0x000000C0),
|
||||
new(0x000C0000, 0x000C0000),
|
||||
new(0x00000001, 0x00000001),
|
||||
};
|
||||
new(0x00000001, 0x00000001)
|
||||
];
|
||||
|
||||
InstEncoding[] qvdQvmQvnConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] qvdQvmQvnConstraints =
|
||||
[
|
||||
new(0x00001040, 0x00001040),
|
||||
new(0x00000041, 0x00000041),
|
||||
new(0x00010040, 0x00010040),
|
||||
};
|
||||
new(0x00010040, 0x00010040)
|
||||
];
|
||||
|
||||
InstEncoding[] imm6UopVmConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] imm6UopVmConstraints =
|
||||
[
|
||||
new(0x00000000, 0x00380000),
|
||||
new(0x00000000, 0x01000100),
|
||||
new(0x00000001, 0x00000001),
|
||||
};
|
||||
new(0x00000001, 0x00000001)
|
||||
];
|
||||
|
||||
InstEncoding[] imm6lUopQvdQvmConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] imm6lUopQvdQvmConstraints =
|
||||
[
|
||||
new(0x00000000, 0x00380080),
|
||||
new(0x00000000, 0x01000100),
|
||||
new(0x00001040, 0x00001040),
|
||||
new(0x00000041, 0x00000041),
|
||||
};
|
||||
new(0x00000041, 0x00000041)
|
||||
];
|
||||
|
||||
InstEncoding[] qvdQvmSizeSizeConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] qvdQvmSizeSizeConstraints =
|
||||
[
|
||||
new(0x00001040, 0x00001040),
|
||||
new(0x00000041, 0x00000041),
|
||||
new(0x00000000, 0x000C0000),
|
||||
new(0x000C0000, 0x000C0000),
|
||||
};
|
||||
new(0x000C0000, 0x000C0000)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeSizeSizeQvdQvmConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeSizeSizeQvdQvmConstraints =
|
||||
[
|
||||
new(0x00040000, 0x000C0000),
|
||||
new(0x00080000, 0x000C0000),
|
||||
new(0x000C0000, 0x000C0000),
|
||||
new(0x00001040, 0x00001040),
|
||||
new(0x00000041, 0x00000041),
|
||||
};
|
||||
new(0x00000041, 0x00000041)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeSizeQvdQvmConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeSizeQvdQvmConstraints =
|
||||
[
|
||||
new(0x00080000, 0x000C0000),
|
||||
new(0x000C0000, 0x000C0000),
|
||||
new(0x00001040, 0x00001040),
|
||||
new(0x00000041, 0x00000041),
|
||||
};
|
||||
new(0x00000041, 0x00000041)
|
||||
];
|
||||
|
||||
InstEncoding[] imm6lQvdQvmConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] imm6lQvdQvmConstraints =
|
||||
[
|
||||
new(0x00000000, 0x00380080),
|
||||
new(0x00001040, 0x00001040),
|
||||
new(0x00000041, 0x00000041),
|
||||
};
|
||||
new(0x00000041, 0x00000041)
|
||||
];
|
||||
|
||||
InstEncoding[] imm6VmConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] imm6VmConstraints =
|
||||
[
|
||||
new(0x00000000, 0x00380000),
|
||||
new(0x00000001, 0x00000001),
|
||||
};
|
||||
new(0x00000001, 0x00000001)
|
||||
];
|
||||
|
||||
InstEncoding[] imm6VdImm6Imm6Imm6Constraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] imm6VdImm6Imm6Imm6Constraints =
|
||||
[
|
||||
new(0x00000000, 0x00380000),
|
||||
new(0x00001000, 0x00001000),
|
||||
new(0x00080000, 0x003F0000),
|
||||
new(0x00100000, 0x003F0000),
|
||||
new(0x00200000, 0x003F0000),
|
||||
};
|
||||
new(0x00200000, 0x003F0000)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeVdConstraints2 = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeVdConstraints2 =
|
||||
[
|
||||
new(0x000C0000, 0x000C0000),
|
||||
new(0x00001000, 0x00001000),
|
||||
};
|
||||
new(0x00001000, 0x00001000)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeQsizeQvdQvmConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeQsizeQvdQvmConstraints =
|
||||
[
|
||||
new(0x000C0000, 0x000C0000),
|
||||
new(0x00080000, 0x000C0040),
|
||||
new(0x00001040, 0x00001040),
|
||||
new(0x00000041, 0x00000041),
|
||||
};
|
||||
new(0x00000041, 0x00000041)
|
||||
];
|
||||
|
||||
List<InstInfoForTable> insts = new()
|
||||
{
|
||||
List<InstInfoForTable> insts =
|
||||
[
|
||||
new(0x02A00000, 0x0FE00000, condConstraints, InstName.AdcI, T.AdcIA1, IsaVersion.v80, InstFlags.CondRd),
|
||||
new(0x00A00000, 0x0FE00010, condConstraints, InstName.AdcR, T.AdcRA1, IsaVersion.v80, InstFlags.CondRd),
|
||||
new(0x00A00010, 0x0FE00090, condConstraints, InstName.AdcRr, T.AdcRrA1, IsaVersion.v80, InstFlags.CondRd),
|
||||
|
@ -1176,7 +1176,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm32
|
|||
new(0x0320F002, 0x0FFFFFFF, condConstraints, InstName.Wfe, T.WfeA1, IsaVersion.v80, InstFlags.Cond),
|
||||
new(0x0320F003, 0x0FFFFFFF, condConstraints, InstName.Wfi, T.WfiA1, IsaVersion.v80, InstFlags.Cond),
|
||||
new(0x0320F001, 0x0FFFFFFF, condConstraints, InstName.Yield, T.YieldA1, IsaVersion.v80, InstFlags.Cond),
|
||||
};
|
||||
];
|
||||
|
||||
_table = new(insts);
|
||||
}
|
||||
|
|
|
@ -9,48 +9,49 @@ namespace Ryujinx.Cpu.LightningJit.Arm32
|
|||
|
||||
static InstTableT16()
|
||||
{
|
||||
InstEncoding[] rmRdndnConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] rmRdndnConstraints =
|
||||
[
|
||||
new(0x00680000, 0x00780000),
|
||||
new(0x00850000, 0x00870000),
|
||||
};
|
||||
new(0x00850000, 0x00870000)
|
||||
];
|
||||
|
||||
InstEncoding[] rmConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x00680000, 0x00780000),
|
||||
};
|
||||
InstEncoding[] rmConstraints =
|
||||
[
|
||||
new(0x00680000, 0x00780000)
|
||||
];
|
||||
|
||||
InstEncoding[] condCondConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] condCondConstraints =
|
||||
[
|
||||
new(0x0E000000, 0x0F000000),
|
||||
new(0x0F000000, 0x0F000000),
|
||||
};
|
||||
new(0x0F000000, 0x0F000000)
|
||||
];
|
||||
|
||||
InstEncoding[] maskConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x00000000, 0x000F0000),
|
||||
};
|
||||
InstEncoding[] maskConstraints =
|
||||
[
|
||||
new(0x00000000, 0x000F0000)
|
||||
];
|
||||
|
||||
InstEncoding[] opConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x18000000, 0x18000000),
|
||||
};
|
||||
InstEncoding[] opConstraints =
|
||||
[
|
||||
new(0x18000000, 0x18000000)
|
||||
];
|
||||
|
||||
InstEncoding[] opOpOpOpConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] opOpOpOpConstraints =
|
||||
[
|
||||
new(0x00000000, 0x03C00000),
|
||||
new(0x00400000, 0x03C00000),
|
||||
new(0x01400000, 0x03C00000),
|
||||
new(0x01800000, 0x03C00000),
|
||||
};
|
||||
new(0x01800000, 0x03C00000)
|
||||
];
|
||||
|
||||
List<InstInfoForTable> insts = new()
|
||||
{
|
||||
List<InstInfoForTable> insts =
|
||||
[
|
||||
new(0x41400000, 0xFFC00000, InstName.AdcR, T.AdcRT1, IsaVersion.v80, InstFlags.Rdn),
|
||||
new(0x1C000000, 0xFE000000, InstName.AddI, T.AddIT1, IsaVersion.v80, InstFlags.Rd),
|
||||
new(0x30000000, 0xF8000000, InstName.AddI, T.AddIT2, IsaVersion.v80, InstFlags.Rdn),
|
||||
new(0x18000000, 0xFE000000, InstName.AddR, T.AddRT1, IsaVersion.v80, InstFlags.Rd),
|
||||
new(0x44000000, 0xFF000000, rmRdndnConstraints, InstName.AddR, T.AddRT2, IsaVersion.v80, InstFlags.RdnDn),
|
||||
new(0x44000000, 0xFF000000, rmRdndnConstraints, InstName.AddR, T.AddRT2, IsaVersion.v80,
|
||||
InstFlags.RdnDn),
|
||||
new(0xA8000000, 0xF8000000, InstName.AddSpI, T.AddSpIT1, IsaVersion.v80, InstFlags.RdRd16),
|
||||
new(0xB0000000, 0xFF800000, InstName.AddSpI, T.AddSpIT2, IsaVersion.v80, InstFlags.None),
|
||||
new(0x44680000, 0xFF780000, InstName.AddSpR, T.AddSpRT1, IsaVersion.v80, InstFlags.None),
|
||||
|
@ -86,7 +87,8 @@ namespace Ryujinx.Cpu.LightningJit.Arm32
|
|||
new(0x20000000, 0xF8000000, InstName.MovI, T.MovIT1, IsaVersion.v80, InstFlags.RdRd16),
|
||||
new(0x46000000, 0xFF000000, InstName.MovR, T.MovRT1, IsaVersion.v80, InstFlags.Rd),
|
||||
new(0x00000000, 0xE0000000, opConstraints, InstName.MovR, T.MovRT2, IsaVersion.v80, InstFlags.Rd),
|
||||
new(0x40000000, 0xFE000000, opOpOpOpConstraints, InstName.MovRr, T.MovRrT1, IsaVersion.v80, InstFlags.None),
|
||||
new(0x40000000, 0xFE000000, opOpOpOpConstraints, InstName.MovRr, T.MovRrT1, IsaVersion.v80,
|
||||
InstFlags.None),
|
||||
new(0x43400000, 0xFFC00000, InstName.Mul, T.MulT1, IsaVersion.v80, InstFlags.None),
|
||||
new(0x43C00000, 0xFFC00000, InstName.MvnR, T.MvnRT1, IsaVersion.v80, InstFlags.Rd),
|
||||
new(0xBF000000, 0xFFFF0000, InstName.Nop, T.NopT1, IsaVersion.v80, InstFlags.None),
|
||||
|
@ -99,7 +101,8 @@ namespace Ryujinx.Cpu.LightningJit.Arm32
|
|||
new(0x42400000, 0xFFC00000, InstName.RsbI, T.RsbIT1, IsaVersion.v80, InstFlags.Rd),
|
||||
new(0x41800000, 0xFFC00000, InstName.SbcR, T.SbcRT1, IsaVersion.v80, InstFlags.Rdn),
|
||||
new(0xB6500000, 0xFFF70000, InstName.Setend, T.SetendT1, IsaVersion.v80, InstFlags.None),
|
||||
new(0xB6100000, 0xFFF70000, InstName.Setpan, T.SetpanT1, IsaVersion.v81, IsaFeature.FeatPan, InstFlags.None),
|
||||
new(0xB6100000, 0xFFF70000, InstName.Setpan, T.SetpanT1, IsaVersion.v81, IsaFeature.FeatPan,
|
||||
InstFlags.None),
|
||||
new(0xBF400000, 0xFFFF0000, InstName.Sev, T.SevT1, IsaVersion.v80, InstFlags.None),
|
||||
new(0xBF500000, 0xFFFF0000, InstName.Sevl, T.SevlT1, IsaVersion.v80, InstFlags.None),
|
||||
new(0xC0000000, 0xF8000000, InstName.Stm, T.StmT1, IsaVersion.v80, InstFlags.RlistRead),
|
||||
|
@ -123,8 +126,8 @@ namespace Ryujinx.Cpu.LightningJit.Arm32
|
|||
new(0xB2800000, 0xFFC00000, InstName.Uxth, T.UxthT1, IsaVersion.v80, InstFlags.Rd),
|
||||
new(0xBF200000, 0xFFFF0000, InstName.Wfe, T.WfeT1, IsaVersion.v80, InstFlags.None),
|
||||
new(0xBF300000, 0xFFFF0000, InstName.Wfi, T.WfiT1, IsaVersion.v80, InstFlags.None),
|
||||
new(0xBF100000, 0xFFFF0000, InstName.Yield, T.YieldT1, IsaVersion.v80, InstFlags.None),
|
||||
};
|
||||
new(0xBF100000, 0xFFFF0000, InstName.Yield, T.YieldT1, IsaVersion.v80, InstFlags.None)
|
||||
];
|
||||
|
||||
_table = new(insts);
|
||||
}
|
||||
|
|
|
@ -9,525 +9,525 @@ namespace Ryujinx.Cpu.LightningJit.Arm32
|
|||
|
||||
static InstTableT32()
|
||||
{
|
||||
InstEncoding[] rnRdsConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] rnRdsConstraints =
|
||||
[
|
||||
new(0x000D0000, 0x000F0000),
|
||||
new(0x00100F00, 0x00100F00),
|
||||
};
|
||||
new(0x00100F00, 0x00100F00)
|
||||
];
|
||||
|
||||
InstEncoding[] rnRnConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] rnRnConstraints =
|
||||
[
|
||||
new(0x000D0000, 0x000F0000),
|
||||
new(0x000F0000, 0x000F0000),
|
||||
};
|
||||
new(0x000F0000, 0x000F0000)
|
||||
];
|
||||
|
||||
InstEncoding[] rdsConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x00100F00, 0x00100F00),
|
||||
};
|
||||
InstEncoding[] rdsConstraints =
|
||||
[
|
||||
new(0x00100F00, 0x00100F00)
|
||||
];
|
||||
|
||||
InstEncoding[] vdVmConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] vdVmConstraints =
|
||||
[
|
||||
new(0x00001000, 0x00001000),
|
||||
new(0x00000001, 0x00000001),
|
||||
};
|
||||
new(0x00000001, 0x00000001)
|
||||
];
|
||||
|
||||
InstEncoding[] condCondCondConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] condCondCondConstraints =
|
||||
[
|
||||
new(0x03800000, 0x03C00000),
|
||||
new(0x03C00000, 0x03C00000),
|
||||
new(0x03800000, 0x03800000),
|
||||
};
|
||||
new(0x03800000, 0x03800000)
|
||||
];
|
||||
|
||||
InstEncoding[] rnConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x000F0000, 0x000F0000),
|
||||
};
|
||||
InstEncoding[] rnConstraints =
|
||||
[
|
||||
new(0x000F0000, 0x000F0000)
|
||||
];
|
||||
|
||||
InstEncoding[] hConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x00000001, 0x00000001),
|
||||
};
|
||||
InstEncoding[] hConstraints =
|
||||
[
|
||||
new(0x00000001, 0x00000001)
|
||||
];
|
||||
|
||||
InstEncoding[] imodmConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x00000000, 0x00000700),
|
||||
};
|
||||
InstEncoding[] imodmConstraints =
|
||||
[
|
||||
new(0x00000000, 0x00000700)
|
||||
];
|
||||
|
||||
InstEncoding[] optionConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x00000000, 0x0000000F),
|
||||
};
|
||||
InstEncoding[] optionConstraints =
|
||||
[
|
||||
new(0x00000000, 0x0000000F)
|
||||
];
|
||||
|
||||
InstEncoding[] puwPwPuwPuwConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] puwPwPuwPuwConstraints =
|
||||
[
|
||||
new(0x00000000, 0x01A00000),
|
||||
new(0x01000000, 0x01200000),
|
||||
new(0x00200000, 0x01A00000),
|
||||
new(0x01A00000, 0x01A00000),
|
||||
};
|
||||
new(0x01A00000, 0x01A00000)
|
||||
];
|
||||
|
||||
InstEncoding[] rnPuwConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] rnPuwConstraints =
|
||||
[
|
||||
new(0x000F0000, 0x000F0000),
|
||||
new(0x00000000, 0x01A00000),
|
||||
};
|
||||
new(0x00000000, 0x01A00000)
|
||||
];
|
||||
|
||||
InstEncoding[] puwConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x00000000, 0x01A00000),
|
||||
};
|
||||
InstEncoding[] puwConstraints =
|
||||
[
|
||||
new(0x00000000, 0x01A00000)
|
||||
];
|
||||
|
||||
InstEncoding[] rnRtConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] rnRtConstraints =
|
||||
[
|
||||
new(0x000F0000, 0x000F0000),
|
||||
new(0x0000F000, 0x0000F000),
|
||||
};
|
||||
new(0x0000F000, 0x0000F000)
|
||||
];
|
||||
|
||||
InstEncoding[] rnRtpuwPuwPwConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] rnRtpuwPuwPwConstraints =
|
||||
[
|
||||
new(0x000F0000, 0x000F0000),
|
||||
new(0x0000F400, 0x0000F700),
|
||||
new(0x00000600, 0x00000700),
|
||||
new(0x00000000, 0x00000500),
|
||||
};
|
||||
new(0x00000000, 0x00000500)
|
||||
];
|
||||
|
||||
InstEncoding[] rtConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x0000F000, 0x0000F000),
|
||||
};
|
||||
InstEncoding[] rtConstraints =
|
||||
[
|
||||
new(0x0000F000, 0x0000F000)
|
||||
];
|
||||
|
||||
InstEncoding[] rnPwConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] rnPwConstraints =
|
||||
[
|
||||
new(0x000F0000, 0x000F0000),
|
||||
new(0x00000000, 0x01200000),
|
||||
};
|
||||
new(0x00000000, 0x01200000)
|
||||
];
|
||||
|
||||
InstEncoding[] pwConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x00000000, 0x01200000),
|
||||
};
|
||||
InstEncoding[] pwConstraints =
|
||||
[
|
||||
new(0x00000000, 0x01200000)
|
||||
];
|
||||
|
||||
InstEncoding[] rnPuwPwConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] rnPuwPwConstraints =
|
||||
[
|
||||
new(0x000F0000, 0x000F0000),
|
||||
new(0x00000600, 0x00000700),
|
||||
new(0x00000000, 0x00000500),
|
||||
};
|
||||
new(0x00000000, 0x00000500)
|
||||
];
|
||||
|
||||
InstEncoding[] raConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x0000F000, 0x0000F000),
|
||||
};
|
||||
InstEncoding[] raConstraints =
|
||||
[
|
||||
new(0x0000F000, 0x0000F000)
|
||||
];
|
||||
|
||||
InstEncoding[] sTConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sTConstraints =
|
||||
[
|
||||
new(0x00100000, 0x00100000),
|
||||
new(0x00000010, 0x00000010),
|
||||
};
|
||||
new(0x00000010, 0x00000010)
|
||||
];
|
||||
|
||||
InstEncoding[] vdVnVmConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] vdVnVmConstraints =
|
||||
[
|
||||
new(0x00001000, 0x00001000),
|
||||
new(0x00010000, 0x00010000),
|
||||
new(0x00000001, 0x00000001),
|
||||
};
|
||||
new(0x00000001, 0x00000001)
|
||||
];
|
||||
|
||||
InstEncoding[] shimm2imm3Constraints = new InstEncoding[]
|
||||
{
|
||||
new(0x00200000, 0x002070C0),
|
||||
};
|
||||
InstEncoding[] shimm2imm3Constraints =
|
||||
[
|
||||
new(0x00200000, 0x002070C0)
|
||||
];
|
||||
|
||||
InstEncoding[] rnimm8Constraints = new InstEncoding[]
|
||||
{
|
||||
new(0x000E0000, 0x000F00FF),
|
||||
};
|
||||
InstEncoding[] rnimm8Constraints =
|
||||
[
|
||||
new(0x000E0000, 0x000F00FF)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeQvdQvnQvmConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeQvdQvnQvmConstraints =
|
||||
[
|
||||
new(0x00300000, 0x00300000),
|
||||
new(0x00001040, 0x00001040),
|
||||
new(0x00010040, 0x00010040),
|
||||
new(0x00000041, 0x00000041),
|
||||
};
|
||||
new(0x00000041, 0x00000041)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeVdConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeVdConstraints =
|
||||
[
|
||||
new(0x00300000, 0x00300000),
|
||||
new(0x00001000, 0x00001000),
|
||||
};
|
||||
new(0x00001000, 0x00001000)
|
||||
];
|
||||
|
||||
InstEncoding[] qvdQvnQvmConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] qvdQvnQvmConstraints =
|
||||
[
|
||||
new(0x00001040, 0x00001040),
|
||||
new(0x00010040, 0x00010040),
|
||||
new(0x00000041, 0x00000041),
|
||||
};
|
||||
new(0x00000041, 0x00000041)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeQvdQvmConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeQvdQvmConstraints =
|
||||
[
|
||||
new(0x000C0000, 0x000C0000),
|
||||
new(0x00001040, 0x00001040),
|
||||
new(0x00000041, 0x00000041),
|
||||
};
|
||||
new(0x00000041, 0x00000041)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeVnVmConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeVnVmConstraints =
|
||||
[
|
||||
new(0x00300000, 0x00300000),
|
||||
new(0x00010000, 0x00010000),
|
||||
new(0x00000001, 0x00000001),
|
||||
};
|
||||
new(0x00000001, 0x00000001)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeVdOpvnConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeVdOpvnConstraints =
|
||||
[
|
||||
new(0x00300000, 0x00300000),
|
||||
new(0x00001000, 0x00001000),
|
||||
new(0x00010100, 0x00010100),
|
||||
};
|
||||
new(0x00010100, 0x00010100)
|
||||
];
|
||||
|
||||
InstEncoding[] cmodeCmodeQvdConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] cmodeCmodeQvdConstraints =
|
||||
[
|
||||
new(0x00000000, 0x00000100),
|
||||
new(0x00000C00, 0x00000C00),
|
||||
new(0x00001040, 0x00001040),
|
||||
};
|
||||
new(0x00001040, 0x00001040)
|
||||
];
|
||||
|
||||
InstEncoding[] qvdQvnQvmOpConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] qvdQvnQvmOpConstraints =
|
||||
[
|
||||
new(0x00001040, 0x00001040),
|
||||
new(0x00010040, 0x00010040),
|
||||
new(0x00000041, 0x00000041),
|
||||
new(0x00000000, 0x00300000),
|
||||
};
|
||||
new(0x00000000, 0x00300000)
|
||||
];
|
||||
|
||||
InstEncoding[] qvdQvnQvmSizeConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] qvdQvnQvmSizeConstraints =
|
||||
[
|
||||
new(0x00001040, 0x00001040),
|
||||
new(0x00010040, 0x00010040),
|
||||
new(0x00000041, 0x00000041),
|
||||
new(0x00300000, 0x00300000),
|
||||
};
|
||||
new(0x00300000, 0x00300000)
|
||||
];
|
||||
|
||||
InstEncoding[] qvdQvnConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] qvdQvnConstraints =
|
||||
[
|
||||
new(0x00001040, 0x00001040),
|
||||
new(0x00010040, 0x00010040),
|
||||
};
|
||||
new(0x00010040, 0x00010040)
|
||||
];
|
||||
|
||||
InstEncoding[] qvdQvmConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] qvdQvmConstraints =
|
||||
[
|
||||
new(0x00001040, 0x00001040),
|
||||
new(0x00000041, 0x00000041),
|
||||
};
|
||||
new(0x00000041, 0x00000041)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x00000000, 0x00000300),
|
||||
};
|
||||
InstEncoding[] sizeConstraints =
|
||||
[
|
||||
new(0x00000000, 0x00000300)
|
||||
];
|
||||
|
||||
InstEncoding[] vmConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x00000001, 0x00000001),
|
||||
};
|
||||
InstEncoding[] vmConstraints =
|
||||
[
|
||||
new(0x00000001, 0x00000001)
|
||||
];
|
||||
|
||||
InstEncoding[] opvdOpvmConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] opvdOpvmConstraints =
|
||||
[
|
||||
new(0x00001100, 0x00001100),
|
||||
new(0x00000001, 0x00000101),
|
||||
};
|
||||
new(0x00000001, 0x00000101)
|
||||
];
|
||||
|
||||
InstEncoding[] imm6Opimm6Imm6QvdQvmConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] imm6Opimm6Imm6QvdQvmConstraints =
|
||||
[
|
||||
new(0x00000000, 0x00380000),
|
||||
new(0x00200000, 0x00300200),
|
||||
new(0x00000000, 0x00200000),
|
||||
new(0x00001040, 0x00001040),
|
||||
new(0x00000041, 0x00000041),
|
||||
};
|
||||
new(0x00000041, 0x00000041)
|
||||
];
|
||||
|
||||
InstEncoding[] qvdEbConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] qvdEbConstraints =
|
||||
[
|
||||
new(0x00210000, 0x00210000),
|
||||
new(0x00400020, 0x00400020),
|
||||
};
|
||||
new(0x00400020, 0x00400020)
|
||||
];
|
||||
|
||||
InstEncoding[] imm4QvdConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] imm4QvdConstraints =
|
||||
[
|
||||
new(0x00000000, 0x00070000),
|
||||
new(0x00001040, 0x00001040),
|
||||
};
|
||||
new(0x00001040, 0x00001040)
|
||||
];
|
||||
|
||||
InstEncoding[] qvdQvnQvmQimm4Constraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] qvdQvnQvmQimm4Constraints =
|
||||
[
|
||||
new(0x00001040, 0x00001040),
|
||||
new(0x00010040, 0x00010040),
|
||||
new(0x00000041, 0x00000041),
|
||||
new(0x00000800, 0x00000840),
|
||||
};
|
||||
new(0x00000800, 0x00000840)
|
||||
];
|
||||
|
||||
InstEncoding[] qvdConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x00001040, 0x00001040),
|
||||
};
|
||||
InstEncoding[] qvdConstraints =
|
||||
[
|
||||
new(0x00001040, 0x00001040)
|
||||
];
|
||||
|
||||
InstEncoding[] vdVnConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] vdVnConstraints =
|
||||
[
|
||||
new(0x00001000, 0x00001000),
|
||||
new(0x00010000, 0x00010000),
|
||||
};
|
||||
new(0x00010000, 0x00010000)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeConstraints2 = new InstEncoding[]
|
||||
{
|
||||
new(0x00000C00, 0x00000C00),
|
||||
};
|
||||
InstEncoding[] sizeConstraints2 =
|
||||
[
|
||||
new(0x00000C00, 0x00000C00)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeIndexAlignIndexAlignConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeIndexAlignIndexAlignConstraints =
|
||||
[
|
||||
new(0x00000C00, 0x00000C00),
|
||||
new(0x00000010, 0x00000030),
|
||||
new(0x00000020, 0x00000030),
|
||||
};
|
||||
new(0x00000020, 0x00000030)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeSizeaConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeSizeaConstraints =
|
||||
[
|
||||
new(0x000000C0, 0x000000C0),
|
||||
new(0x00000010, 0x000000D0),
|
||||
};
|
||||
new(0x00000010, 0x000000D0)
|
||||
];
|
||||
|
||||
InstEncoding[] alignConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x00000020, 0x00000020),
|
||||
};
|
||||
InstEncoding[] alignConstraints =
|
||||
[
|
||||
new(0x00000020, 0x00000020)
|
||||
];
|
||||
|
||||
InstEncoding[] alignConstraints2 = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] alignConstraints2 =
|
||||
[
|
||||
new(0x00000030, 0x00000030)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeConstraints3 =
|
||||
[
|
||||
new(0x000000C0, 0x000000C0)
|
||||
];
|
||||
|
||||
InstEncoding[] alignSizeConstraints =
|
||||
[
|
||||
new(0x00000030, 0x00000030),
|
||||
};
|
||||
new(0x000000C0, 0x000000C0)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeConstraints3 = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeAConstraints =
|
||||
[
|
||||
new(0x000000C0, 0x000000C0),
|
||||
};
|
||||
new(0x00000010, 0x00000010)
|
||||
];
|
||||
|
||||
InstEncoding[] alignSizeConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x00000030, 0x00000030),
|
||||
InstEncoding[] sizeAlignConstraints =
|
||||
[
|
||||
new(0x000000C0, 0x000000C0),
|
||||
};
|
||||
new(0x00000020, 0x00000020)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeAConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x000000C0, 0x000000C0),
|
||||
new(0x00000010, 0x00000010),
|
||||
};
|
||||
|
||||
InstEncoding[] sizeAlignConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x000000C0, 0x000000C0),
|
||||
new(0x00000020, 0x00000020),
|
||||
};
|
||||
|
||||
InstEncoding[] sizeIndexAlignConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeIndexAlignConstraints =
|
||||
[
|
||||
new(0x00000C00, 0x00000C00),
|
||||
new(0x00000030, 0x00000030),
|
||||
};
|
||||
new(0x00000030, 0x00000030)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeaConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x000000C0, 0x000000D0),
|
||||
};
|
||||
InstEncoding[] sizeaConstraints =
|
||||
[
|
||||
new(0x000000C0, 0x000000D0)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeSizeVdConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeSizeVdConstraints =
|
||||
[
|
||||
new(0x00300000, 0x00300000),
|
||||
new(0x00000000, 0x00300000),
|
||||
new(0x00001000, 0x00001000),
|
||||
};
|
||||
new(0x00001000, 0x00001000)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeQvdQvnConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeQvdQvnConstraints =
|
||||
[
|
||||
new(0x00300000, 0x00300000),
|
||||
new(0x10001000, 0x10001000),
|
||||
new(0x10010000, 0x10010000),
|
||||
};
|
||||
new(0x10010000, 0x10010000)
|
||||
];
|
||||
|
||||
InstEncoding[] imm3hImm3hImm3hImm3hImm3hVdConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] imm3hImm3hImm3hImm3hImm3hVdConstraints =
|
||||
[
|
||||
new(0x00000000, 0x00380000),
|
||||
new(0x00180000, 0x00380000),
|
||||
new(0x00280000, 0x00380000),
|
||||
new(0x00300000, 0x00380000),
|
||||
new(0x00380000, 0x00380000),
|
||||
new(0x00001000, 0x00001000),
|
||||
};
|
||||
new(0x00001000, 0x00001000)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeVmConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeVmConstraints =
|
||||
[
|
||||
new(0x000C0000, 0x000C0000),
|
||||
new(0x00000001, 0x00000001),
|
||||
};
|
||||
new(0x00000001, 0x00000001)
|
||||
];
|
||||
|
||||
InstEncoding[] opc1opc2Constraints = new InstEncoding[]
|
||||
{
|
||||
new(0x00000040, 0x00400060),
|
||||
};
|
||||
InstEncoding[] opc1opc2Constraints =
|
||||
[
|
||||
new(0x00000040, 0x00400060)
|
||||
];
|
||||
|
||||
InstEncoding[] uopc1opc2Uopc1opc2Constraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] uopc1opc2Uopc1opc2Constraints =
|
||||
[
|
||||
new(0x00800000, 0x00C00060),
|
||||
new(0x00000040, 0x00400060),
|
||||
};
|
||||
new(0x00000040, 0x00400060)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeOpuOpsizeVdConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeOpuOpsizeVdConstraints =
|
||||
[
|
||||
new(0x00300000, 0x00300000),
|
||||
new(0x10000200, 0x10000200),
|
||||
new(0x00100200, 0x00300200),
|
||||
new(0x00001000, 0x00001000),
|
||||
};
|
||||
new(0x00001000, 0x00001000)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeOpsizeOpsizeQvdQvnQvmConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeOpsizeOpsizeQvdQvnQvmConstraints =
|
||||
[
|
||||
new(0x00300000, 0x00300000),
|
||||
new(0x10100000, 0x10300000),
|
||||
new(0x10200000, 0x10300000),
|
||||
new(0x00001040, 0x00001040),
|
||||
new(0x00010040, 0x00010040),
|
||||
new(0x00000041, 0x00000041),
|
||||
};
|
||||
new(0x00000041, 0x00000041)
|
||||
];
|
||||
|
||||
InstEncoding[] cmodeQvdConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] cmodeQvdConstraints =
|
||||
[
|
||||
new(0x00000E00, 0x00000E00),
|
||||
new(0x00001040, 0x00001040),
|
||||
};
|
||||
new(0x00001040, 0x00001040)
|
||||
];
|
||||
|
||||
InstEncoding[] qConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x00000040, 0x00000040),
|
||||
};
|
||||
InstEncoding[] qConstraints =
|
||||
[
|
||||
new(0x00000040, 0x00000040)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeQConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeQConstraints =
|
||||
[
|
||||
new(0x00300000, 0x00300000),
|
||||
new(0x00000040, 0x00000040),
|
||||
};
|
||||
new(0x00000040, 0x00000040)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeConstraints4 = new InstEncoding[]
|
||||
{
|
||||
new(0x00300000, 0x00300000),
|
||||
};
|
||||
InstEncoding[] sizeConstraints4 =
|
||||
[
|
||||
new(0x00300000, 0x00300000)
|
||||
];
|
||||
|
||||
InstEncoding[] qvdQvnQvmSizeSizeConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] qvdQvnQvmSizeSizeConstraints =
|
||||
[
|
||||
new(0x00001040, 0x00001040),
|
||||
new(0x00010040, 0x00010040),
|
||||
new(0x00000041, 0x00000041),
|
||||
new(0x00000000, 0x00300000),
|
||||
new(0x00300000, 0x00300000),
|
||||
};
|
||||
new(0x00300000, 0x00300000)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeSizeQvdQvnConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeSizeQvdQvnConstraints =
|
||||
[
|
||||
new(0x00300000, 0x00300000),
|
||||
new(0x00000000, 0x00300000),
|
||||
new(0x10001000, 0x10001000),
|
||||
new(0x10010000, 0x10010000),
|
||||
};
|
||||
new(0x10010000, 0x10010000)
|
||||
];
|
||||
|
||||
InstEncoding[] opSizeVmConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] opSizeVmConstraints =
|
||||
[
|
||||
new(0x00000000, 0x000000C0),
|
||||
new(0x000C0000, 0x000C0000),
|
||||
new(0x00000001, 0x00000001),
|
||||
};
|
||||
new(0x00000001, 0x00000001)
|
||||
];
|
||||
|
||||
InstEncoding[] qvdQvmQvnConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] qvdQvmQvnConstraints =
|
||||
[
|
||||
new(0x00001040, 0x00001040),
|
||||
new(0x00000041, 0x00000041),
|
||||
new(0x00010040, 0x00010040),
|
||||
};
|
||||
new(0x00010040, 0x00010040)
|
||||
];
|
||||
|
||||
InstEncoding[] imm6UopVmConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] imm6UopVmConstraints =
|
||||
[
|
||||
new(0x00000000, 0x00380000),
|
||||
new(0x00000000, 0x10000100),
|
||||
new(0x00000001, 0x00000001),
|
||||
};
|
||||
new(0x00000001, 0x00000001)
|
||||
];
|
||||
|
||||
InstEncoding[] imm6lUopQvdQvmConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] imm6lUopQvdQvmConstraints =
|
||||
[
|
||||
new(0x00000000, 0x00380080),
|
||||
new(0x00000000, 0x10000100),
|
||||
new(0x00001040, 0x00001040),
|
||||
new(0x00000041, 0x00000041),
|
||||
};
|
||||
new(0x00000041, 0x00000041)
|
||||
];
|
||||
|
||||
InstEncoding[] qvdQvmSizeSizeConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] qvdQvmSizeSizeConstraints =
|
||||
[
|
||||
new(0x00001040, 0x00001040),
|
||||
new(0x00000041, 0x00000041),
|
||||
new(0x00000000, 0x000C0000),
|
||||
new(0x000C0000, 0x000C0000),
|
||||
};
|
||||
new(0x000C0000, 0x000C0000)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeSizeSizeQvdQvmConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeSizeSizeQvdQvmConstraints =
|
||||
[
|
||||
new(0x00040000, 0x000C0000),
|
||||
new(0x00080000, 0x000C0000),
|
||||
new(0x000C0000, 0x000C0000),
|
||||
new(0x00001040, 0x00001040),
|
||||
new(0x00000041, 0x00000041),
|
||||
};
|
||||
new(0x00000041, 0x00000041)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeSizeQvdQvmConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeSizeQvdQvmConstraints =
|
||||
[
|
||||
new(0x00080000, 0x000C0000),
|
||||
new(0x000C0000, 0x000C0000),
|
||||
new(0x00001040, 0x00001040),
|
||||
new(0x00000041, 0x00000041),
|
||||
};
|
||||
new(0x00000041, 0x00000041)
|
||||
];
|
||||
|
||||
InstEncoding[] imm6lQvdQvmConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] imm6lQvdQvmConstraints =
|
||||
[
|
||||
new(0x00000000, 0x00380080),
|
||||
new(0x00001040, 0x00001040),
|
||||
new(0x00000041, 0x00000041),
|
||||
};
|
||||
new(0x00000041, 0x00000041)
|
||||
];
|
||||
|
||||
InstEncoding[] imm6VmConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] imm6VmConstraints =
|
||||
[
|
||||
new(0x00000000, 0x00380000),
|
||||
new(0x00000001, 0x00000001),
|
||||
};
|
||||
new(0x00000001, 0x00000001)
|
||||
];
|
||||
|
||||
InstEncoding[] imm6VdImm6Imm6Imm6Constraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] imm6VdImm6Imm6Imm6Constraints =
|
||||
[
|
||||
new(0x00000000, 0x00380000),
|
||||
new(0x00001000, 0x00001000),
|
||||
new(0x00080000, 0x003F0000),
|
||||
new(0x00100000, 0x003F0000),
|
||||
new(0x00200000, 0x003F0000),
|
||||
};
|
||||
new(0x00200000, 0x003F0000)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeVdConstraints2 = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeVdConstraints2 =
|
||||
[
|
||||
new(0x000C0000, 0x000C0000),
|
||||
new(0x00001000, 0x00001000),
|
||||
};
|
||||
new(0x00001000, 0x00001000)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeQsizeQvdQvmConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeQsizeQvdQvmConstraints =
|
||||
[
|
||||
new(0x000C0000, 0x000C0000),
|
||||
new(0x00080000, 0x000C0040),
|
||||
new(0x00001040, 0x00001040),
|
||||
new(0x00000041, 0x00000041),
|
||||
};
|
||||
new(0x00000041, 0x00000041)
|
||||
];
|
||||
|
||||
List<InstInfoForTable> insts = new()
|
||||
{
|
||||
List<InstInfoForTable> insts =
|
||||
[
|
||||
new(0xF1400000, 0xFBE08000, InstName.AdcI, T.AdcIT1, IsaVersion.v80, InstFlags.Rd),
|
||||
new(0xEB400000, 0xFFE08000, InstName.AdcR, T.AdcRT2, IsaVersion.v80, InstFlags.Rd),
|
||||
new(0xF1000000, 0xFBE08000, rnRdsConstraints, InstName.AddI, T.AddIT3, IsaVersion.v80, InstFlags.Rd),
|
||||
|
@ -1190,7 +1190,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm32
|
|||
new(0xF3AF8002, 0xFFFFFFFF, InstName.Wfe, T.WfeT2, IsaVersion.v80, InstFlags.None),
|
||||
new(0xF3AF8003, 0xFFFFFFFF, InstName.Wfi, T.WfiT2, IsaVersion.v80, InstFlags.None),
|
||||
new(0xF3AF8001, 0xFFFFFFFF, InstName.Yield, T.YieldT2, IsaVersion.v80, InstFlags.None),
|
||||
};
|
||||
];
|
||||
|
||||
_table = new(insts);
|
||||
}
|
||||
|
|
|
@ -230,7 +230,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
|
|||
{
|
||||
MultiBlock multiBlock = Decoder<InstEmit>.DecodeMulti(cpuPreset, memoryManager, address, isThumb);
|
||||
|
||||
Dictionary<ulong, int> targets = new();
|
||||
Dictionary<ulong, int> targets = [];
|
||||
|
||||
CodeWriter writer = new();
|
||||
RegisterAllocator regAlloc = new();
|
||||
|
|
|
@ -25,8 +25,8 @@ namespace Ryujinx.Cpu.LightningJit.Arm64
|
|||
{
|
||||
Debug.Assert((int)((endAddress - address) / 4) == instructions.Count);
|
||||
|
||||
_predecessors = new();
|
||||
_successors = new();
|
||||
_predecessors = [];
|
||||
_successors = [];
|
||||
Address = address;
|
||||
EndAddress = endAddress;
|
||||
Instructions = instructions;
|
||||
|
|
|
@ -36,8 +36,8 @@ namespace Ryujinx.Cpu.LightningJit.Arm64
|
|||
{
|
||||
Console.WriteLine($"bb {block.Index}");
|
||||
|
||||
List<int> predList = new();
|
||||
List<int> succList = new();
|
||||
List<int> predList = [];
|
||||
List<int> succList = [];
|
||||
|
||||
for (int index = 0; index < block.PredecessorsCount; index++)
|
||||
{
|
||||
|
|
|
@ -308,8 +308,8 @@ namespace Ryujinx.Cpu.LightningJit.Arm64.Target.Arm64
|
|||
{
|
||||
MultiBlock multiBlock = Decoder.DecodeMulti(cpuPreset, memoryManager, address);
|
||||
|
||||
Dictionary<ulong, int> targets = new();
|
||||
List<PendingBranch> pendingBranches = new();
|
||||
Dictionary<ulong, int> targets = [];
|
||||
List<PendingBranch> pendingBranches = [];
|
||||
|
||||
uint gprUseMask = multiBlock.GlobalUseMask.GprMask;
|
||||
uint fpSimdUseMask = multiBlock.GlobalUseMask.FpSimdMask;
|
||||
|
|
|
@ -15,8 +15,8 @@ namespace Ryujinx.Cpu.LightningJit.Arm64.Target.Arm64
|
|||
|
||||
public static MultiBlock DecodeMulti(CpuPreset cpuPreset, IMemoryManager memoryManager, ulong address)
|
||||
{
|
||||
List<Block> blocks = new();
|
||||
List<ulong> branchTargets = new();
|
||||
List<Block> blocks = [];
|
||||
List<ulong> branchTargets = [];
|
||||
|
||||
RegisterMask useMask = RegisterMask.Zero;
|
||||
|
||||
|
@ -137,7 +137,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm64.Target.Arm64
|
|||
|
||||
private static void NumberAndLinkBlocks(List<Block> blocks)
|
||||
{
|
||||
Dictionary<ulong, Block> blocksByAddress = new();
|
||||
Dictionary<ulong, Block> blocksByAddress = [];
|
||||
|
||||
for (int blockIndex = 0; blockIndex < blocks.Count; blockIndex++)
|
||||
{
|
||||
|
@ -238,7 +238,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm64.Target.Arm64
|
|||
{
|
||||
ulong startAddress = address;
|
||||
|
||||
List<InstInfo> insts = new();
|
||||
List<InstInfo> insts = [];
|
||||
|
||||
uint gprUseMask = useMask.GprMask;
|
||||
uint fpSimdUseMask = useMask.FpSimdMask;
|
||||
|
|
|
@ -94,37 +94,37 @@ namespace Ryujinx.Cpu.LightningJit.Arm64.Target.Arm64
|
|||
|
||||
static InstTable()
|
||||
{
|
||||
InstEncoding[] qsizeConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x00C00000, 0x40C00000),
|
||||
};
|
||||
InstEncoding[] qsizeConstraints =
|
||||
[
|
||||
new(0x00C00000, 0x40C00000)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x00C00000, 0x00C00000),
|
||||
};
|
||||
InstEncoding[] sizeConstraints =
|
||||
[
|
||||
new(0x00C00000, 0x00C00000)
|
||||
];
|
||||
|
||||
InstEncoding[] opuOpuOpuConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] opuOpuOpuConstraints =
|
||||
[
|
||||
new(0x00001400, 0x00001C00),
|
||||
new(0x00001800, 0x00001C00),
|
||||
new(0x00001C00, 0x00001C00),
|
||||
};
|
||||
new(0x00001C00, 0x00001C00)
|
||||
];
|
||||
|
||||
InstEncoding[] shiftSfimm6Constraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] shiftSfimm6Constraints =
|
||||
[
|
||||
new(0x00C00000, 0x00C00000),
|
||||
new(0x00008000, 0x80008000),
|
||||
};
|
||||
new(0x00008000, 0x80008000)
|
||||
];
|
||||
|
||||
InstEncoding[] qsizeSizeConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] qsizeSizeConstraints =
|
||||
[
|
||||
new(0x00800000, 0x40C00000),
|
||||
new(0x00C00000, 0x00C00000),
|
||||
};
|
||||
new(0x00C00000, 0x00C00000)
|
||||
];
|
||||
|
||||
InstEncoding[] nimmsNimmsNimmsNimmsNimmsNimmsNimmsNimmsSfnConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] nimmsNimmsNimmsNimmsNimmsNimmsNimmsNimmsSfnConstraints =
|
||||
[
|
||||
new(0x0040FC00, 0x0040FC00),
|
||||
new(0x00007C00, 0x0040FC00),
|
||||
new(0x0000BC00, 0x0040FC00),
|
||||
|
@ -133,326 +133,326 @@ namespace Ryujinx.Cpu.LightningJit.Arm64.Target.Arm64
|
|||
new(0x0000F400, 0x0040FC00),
|
||||
new(0x0000F800, 0x0040FC00),
|
||||
new(0x0000FC00, 0x0040FC00),
|
||||
new(0x00400000, 0x80400000),
|
||||
};
|
||||
new(0x00400000, 0x80400000)
|
||||
];
|
||||
|
||||
InstEncoding[] sfimm6Constraints = new InstEncoding[]
|
||||
{
|
||||
new(0x00008000, 0x80008000),
|
||||
};
|
||||
InstEncoding[] sfimm6Constraints =
|
||||
[
|
||||
new(0x00008000, 0x80008000)
|
||||
];
|
||||
|
||||
InstEncoding[] sfnSfnSfimmr5Sfimms5Constraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sfnSfnSfimmr5Sfimms5Constraints =
|
||||
[
|
||||
new(0x80000000, 0x80400000),
|
||||
new(0x00400000, 0x80400000),
|
||||
new(0x00200000, 0x80200000),
|
||||
new(0x00008000, 0x80008000),
|
||||
};
|
||||
new(0x00008000, 0x80008000)
|
||||
];
|
||||
|
||||
InstEncoding[] cmodeopqConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x2000F000, 0x6000F000),
|
||||
};
|
||||
InstEncoding[] cmodeopqConstraints =
|
||||
[
|
||||
new(0x2000F000, 0x6000F000)
|
||||
];
|
||||
|
||||
InstEncoding[] rsRtConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] rsRtConstraints =
|
||||
[
|
||||
new(0x00010000, 0x00010000),
|
||||
new(0x00000001, 0x00000001),
|
||||
};
|
||||
new(0x00000001, 0x00000001)
|
||||
];
|
||||
|
||||
InstEncoding[] sfszSfszSfszSfszConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sfszSfszSfszSfszConstraints =
|
||||
[
|
||||
new(0x80000000, 0x80000C00),
|
||||
new(0x80000400, 0x80000C00),
|
||||
new(0x80000800, 0x80000C00),
|
||||
new(0x00000C00, 0x80000C00),
|
||||
};
|
||||
new(0x00000C00, 0x80000C00)
|
||||
];
|
||||
|
||||
InstEncoding[] imm5Constraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] imm5Constraints =
|
||||
[
|
||||
new(0x00000000, 0x000F0000)
|
||||
];
|
||||
|
||||
InstEncoding[] imm5Imm5qConstraints =
|
||||
[
|
||||
new(0x00000000, 0x000F0000),
|
||||
};
|
||||
new(0x00080000, 0x400F0000)
|
||||
];
|
||||
|
||||
InstEncoding[] imm5Imm5qConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x00000000, 0x000F0000),
|
||||
new(0x00080000, 0x400F0000),
|
||||
};
|
||||
|
||||
InstEncoding[] nsfNsfSfimmsConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] nsfNsfSfimmsConstraints =
|
||||
[
|
||||
new(0x00400000, 0x80400000),
|
||||
new(0x80000000, 0x80400000),
|
||||
new(0x00008000, 0x80008000),
|
||||
};
|
||||
new(0x00008000, 0x80008000)
|
||||
];
|
||||
|
||||
InstEncoding[] qimm4Constraints = new InstEncoding[]
|
||||
{
|
||||
new(0x00004000, 0x40004000),
|
||||
};
|
||||
InstEncoding[] qimm4Constraints =
|
||||
[
|
||||
new(0x00004000, 0x40004000)
|
||||
];
|
||||
|
||||
InstEncoding[] qszConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x00400000, 0x40400000),
|
||||
};
|
||||
InstEncoding[] qszConstraints =
|
||||
[
|
||||
new(0x00400000, 0x40400000)
|
||||
];
|
||||
|
||||
InstEncoding[] euacEuacEuacConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] euacEuacEuacConstraints =
|
||||
[
|
||||
new(0x00000800, 0x20800800),
|
||||
new(0x00800000, 0x20800800),
|
||||
new(0x00800800, 0x20800800),
|
||||
};
|
||||
new(0x00800800, 0x20800800)
|
||||
];
|
||||
|
||||
InstEncoding[] qszEuacEuacEuacConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] qszEuacEuacEuacConstraints =
|
||||
[
|
||||
new(0x00400000, 0x40400000),
|
||||
new(0x00000800, 0x20800800),
|
||||
new(0x00800000, 0x20800800),
|
||||
new(0x00800800, 0x20800800),
|
||||
};
|
||||
new(0x00800800, 0x20800800)
|
||||
];
|
||||
|
||||
InstEncoding[] szConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x00400000, 0x00400000),
|
||||
};
|
||||
InstEncoding[] szConstraints =
|
||||
[
|
||||
new(0x00400000, 0x00400000)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeQsizeConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeQsizeConstraints =
|
||||
[
|
||||
new(0x00000000, 0x00C00000),
|
||||
new(0x00C00000, 0x40C00000),
|
||||
};
|
||||
new(0x00C00000, 0x40C00000)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeSizeSizelSizeqSizehqConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeSizeSizelSizeqSizehqConstraints =
|
||||
[
|
||||
new(0x00000000, 0x00C00000),
|
||||
new(0x00C00000, 0x00C00000),
|
||||
new(0x00A00000, 0x00E00000),
|
||||
new(0x00800000, 0x40C00000),
|
||||
new(0x00400800, 0x40C00800),
|
||||
};
|
||||
new(0x00400800, 0x40C00800)
|
||||
];
|
||||
|
||||
InstEncoding[] szConstraints2 = new InstEncoding[]
|
||||
{
|
||||
new(0x00000000, 0x00400000),
|
||||
};
|
||||
InstEncoding[] szConstraints2 =
|
||||
[
|
||||
new(0x00000000, 0x00400000)
|
||||
];
|
||||
|
||||
InstEncoding[] immhConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] immhConstraints =
|
||||
[
|
||||
new(0x00000000, 0x00780000)
|
||||
];
|
||||
|
||||
InstEncoding[] immhQimmhConstraints =
|
||||
[
|
||||
new(0x00000000, 0x00780000),
|
||||
};
|
||||
new(0x00400000, 0x40400000)
|
||||
];
|
||||
|
||||
InstEncoding[] immhQimmhConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x00000000, 0x00780000),
|
||||
new(0x00400000, 0x40400000),
|
||||
};
|
||||
InstEncoding[] sfscaleConstraints =
|
||||
[
|
||||
new(0x00000000, 0x80008000)
|
||||
];
|
||||
|
||||
InstEncoding[] sfscaleConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x00000000, 0x80008000),
|
||||
};
|
||||
|
||||
InstEncoding[] ftypeopcFtypeopcFtypeopcFtypeopcFtypeOpcConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] ftypeopcFtypeopcFtypeopcFtypeopcFtypeOpcConstraints =
|
||||
[
|
||||
new(0x00000000, 0x00C18000),
|
||||
new(0x00408000, 0x00C18000),
|
||||
new(0x00810000, 0x00C18000),
|
||||
new(0x00C18000, 0x00C18000),
|
||||
new(0x00800000, 0x00C00000),
|
||||
new(0x00010000, 0x00018000),
|
||||
};
|
||||
new(0x00010000, 0x00018000)
|
||||
];
|
||||
|
||||
InstEncoding[] szlConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] szlConstraints =
|
||||
[
|
||||
new(0x00600000, 0x00600000)
|
||||
];
|
||||
|
||||
InstEncoding[] szlQszConstraints =
|
||||
[
|
||||
new(0x00600000, 0x00600000),
|
||||
};
|
||||
new(0x00400000, 0x40400000)
|
||||
];
|
||||
|
||||
InstEncoding[] szlQszConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x00600000, 0x00600000),
|
||||
new(0x00400000, 0x40400000),
|
||||
};
|
||||
InstEncoding[] qConstraints =
|
||||
[
|
||||
new(0x00000000, 0x40000000)
|
||||
];
|
||||
|
||||
InstEncoding[] qConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x00000000, 0x40000000),
|
||||
};
|
||||
|
||||
InstEncoding[] sfftypermodeSfftypermodeConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sfftypermodeSfftypermodeConstraints =
|
||||
[
|
||||
new(0x00400000, 0x80C80000),
|
||||
new(0x80000000, 0x80C80000),
|
||||
};
|
||||
new(0x80000000, 0x80C80000)
|
||||
];
|
||||
|
||||
InstEncoding[] uo1o2Constraints = new InstEncoding[]
|
||||
{
|
||||
new(0x20800000, 0x20801000),
|
||||
};
|
||||
InstEncoding[] uo1o2Constraints =
|
||||
[
|
||||
new(0x20800000, 0x20801000)
|
||||
];
|
||||
|
||||
InstEncoding[] qszUo1o2Constraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] qszUo1o2Constraints =
|
||||
[
|
||||
new(0x00400000, 0x40400000),
|
||||
new(0x20800000, 0x20801000),
|
||||
};
|
||||
new(0x20800000, 0x20801000)
|
||||
];
|
||||
|
||||
InstEncoding[] sConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x00001000, 0x00001000),
|
||||
};
|
||||
InstEncoding[] sConstraints =
|
||||
[
|
||||
new(0x00001000, 0x00001000)
|
||||
];
|
||||
|
||||
InstEncoding[] opcodesizeOpcodesizeOpcodesizesOpcodesizeConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] opcodesizeOpcodesizeOpcodesizesOpcodesizeConstraints =
|
||||
[
|
||||
new(0x00004400, 0x0000C400),
|
||||
new(0x00008800, 0x0000C800),
|
||||
new(0x00009400, 0x0000D400),
|
||||
new(0x0000C000, 0x0000C000),
|
||||
};
|
||||
new(0x0000C000, 0x0000C000)
|
||||
];
|
||||
|
||||
InstEncoding[] qsizeConstraints2 = new InstEncoding[]
|
||||
{
|
||||
new(0x00000C00, 0x40000C00),
|
||||
};
|
||||
InstEncoding[] qsizeConstraints2 =
|
||||
[
|
||||
new(0x00000C00, 0x40000C00)
|
||||
];
|
||||
|
||||
InstEncoding[] rtRtConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] rtRtConstraints =
|
||||
[
|
||||
new(0x00000018, 0x00000018),
|
||||
new(0x00000001, 0x00000001),
|
||||
};
|
||||
new(0x00000001, 0x00000001)
|
||||
];
|
||||
|
||||
InstEncoding[] opc1sizeOpc1sizeOpc1sizeConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] opc1sizeOpc1sizeOpc1sizeConstraints =
|
||||
[
|
||||
new(0x40800000, 0xC0800000),
|
||||
new(0x80800000, 0xC0800000),
|
||||
new(0xC0800000, 0xC0800000),
|
||||
};
|
||||
new(0xC0800000, 0xC0800000)
|
||||
];
|
||||
|
||||
InstEncoding[] rtRt2Constraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] rtRt2Constraints =
|
||||
[
|
||||
new(0x0000001F, 0x0000001F),
|
||||
new(0x001F0000, 0x001F0000),
|
||||
};
|
||||
new(0x001F0000, 0x001F0000)
|
||||
];
|
||||
|
||||
InstEncoding[] opcConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0xC0000000, 0xC0000000),
|
||||
};
|
||||
InstEncoding[] opcConstraints =
|
||||
[
|
||||
new(0xC0000000, 0xC0000000)
|
||||
];
|
||||
|
||||
InstEncoding[] opcConstraints2 = new InstEncoding[]
|
||||
{
|
||||
new(0x40000000, 0x40000000),
|
||||
};
|
||||
InstEncoding[] opcConstraints2 =
|
||||
[
|
||||
new(0x40000000, 0x40000000)
|
||||
];
|
||||
|
||||
InstEncoding[] opclOpcConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] opclOpcConstraints =
|
||||
[
|
||||
new(0x40000000, 0x40400000),
|
||||
new(0xC0000000, 0xC0000000),
|
||||
};
|
||||
new(0xC0000000, 0xC0000000)
|
||||
];
|
||||
|
||||
InstEncoding[] optionConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x00000000, 0x00004000),
|
||||
};
|
||||
InstEncoding[] optionConstraints =
|
||||
[
|
||||
new(0x00000000, 0x00004000)
|
||||
];
|
||||
|
||||
InstEncoding[] opc1sizeOpc1sizeOpc1sizeOptionConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] opc1sizeOpc1sizeOpc1sizeOptionConstraints =
|
||||
[
|
||||
new(0x40800000, 0xC0800000),
|
||||
new(0x80800000, 0xC0800000),
|
||||
new(0xC0800000, 0xC0800000),
|
||||
new(0x00000000, 0x00004000),
|
||||
};
|
||||
new(0x00000000, 0x00004000)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeSizeConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeSizeConstraints =
|
||||
[
|
||||
new(0x00000000, 0x00C00000),
|
||||
new(0x00C00000, 0x00C00000),
|
||||
};
|
||||
new(0x00C00000, 0x00C00000)
|
||||
];
|
||||
|
||||
InstEncoding[] sfhwConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x00400000, 0x80400000),
|
||||
};
|
||||
InstEncoding[] sfhwConstraints =
|
||||
[
|
||||
new(0x00400000, 0x80400000)
|
||||
];
|
||||
|
||||
InstEncoding[] rtConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x00000001, 0x00000001),
|
||||
};
|
||||
InstEncoding[] rtConstraints =
|
||||
[
|
||||
new(0x00000001, 0x00000001)
|
||||
];
|
||||
|
||||
InstEncoding[] usizeUsizeUsizeSizeConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] usizeUsizeUsizeSizeConstraints =
|
||||
[
|
||||
new(0x20400000, 0x20C00000),
|
||||
new(0x20800000, 0x20C00000),
|
||||
new(0x20C00000, 0x20C00000),
|
||||
new(0x00C00000, 0x00C00000),
|
||||
};
|
||||
new(0x00C00000, 0x00C00000)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeSizeConstraints2 = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeSizeConstraints2 =
|
||||
[
|
||||
new(0x00400000, 0x00C00000),
|
||||
new(0x00800000, 0x00C00000)
|
||||
];
|
||||
|
||||
InstEncoding[] rtConstraints2 =
|
||||
[
|
||||
new(0x00000018, 0x00000018)
|
||||
];
|
||||
|
||||
InstEncoding[] sfopcConstraints =
|
||||
[
|
||||
new(0x00000400, 0x80000400)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeSizeSizeConstraints =
|
||||
[
|
||||
new(0x00400000, 0x00C00000),
|
||||
new(0x00800000, 0x00C00000),
|
||||
};
|
||||
new(0x00C00000, 0x00C00000)
|
||||
];
|
||||
|
||||
InstEncoding[] rtConstraints2 = new InstEncoding[]
|
||||
{
|
||||
new(0x00000018, 0x00000018),
|
||||
};
|
||||
|
||||
InstEncoding[] sfopcConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x00000400, 0x80000400),
|
||||
};
|
||||
|
||||
InstEncoding[] sizeSizeSizeConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x00400000, 0x00C00000),
|
||||
InstEncoding[] sizeSizeConstraints3 =
|
||||
[
|
||||
new(0x00800000, 0x00C00000),
|
||||
new(0x00C00000, 0x00C00000),
|
||||
};
|
||||
new(0x00C00000, 0x00C00000)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeSizeConstraints3 = new InstEncoding[]
|
||||
{
|
||||
new(0x00800000, 0x00C00000),
|
||||
new(0x00C00000, 0x00C00000),
|
||||
};
|
||||
InstEncoding[] sfConstraints =
|
||||
[
|
||||
new(0x00000000, 0x80000000)
|
||||
];
|
||||
|
||||
InstEncoding[] sfConstraints = new InstEncoding[]
|
||||
{
|
||||
new(0x00000000, 0x80000000),
|
||||
};
|
||||
|
||||
InstEncoding[] immhImmhConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] immhImmhConstraints =
|
||||
[
|
||||
new(0x00000000, 0x00780000),
|
||||
new(0x00400000, 0x00400000),
|
||||
};
|
||||
new(0x00400000, 0x00400000)
|
||||
];
|
||||
|
||||
InstEncoding[] sizeSizeConstraints4 = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] sizeSizeConstraints4 =
|
||||
[
|
||||
new(0x00C00000, 0x00C00000),
|
||||
new(0x00000000, 0x00C00000),
|
||||
};
|
||||
new(0x00000000, 0x00C00000)
|
||||
];
|
||||
|
||||
InstEncoding[] ssizeSsizeSsizeConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] ssizeSsizeSsizeConstraints =
|
||||
[
|
||||
new(0x00000000, 0x00C00800),
|
||||
new(0x00400000, 0x00C00800),
|
||||
new(0x00800000, 0x00C00800),
|
||||
};
|
||||
new(0x00800000, 0x00C00800)
|
||||
];
|
||||
|
||||
InstEncoding[] immhOpuConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] immhOpuConstraints =
|
||||
[
|
||||
new(0x00000000, 0x00780000),
|
||||
new(0x00000000, 0x20001000),
|
||||
};
|
||||
new(0x00000000, 0x20001000)
|
||||
];
|
||||
|
||||
InstEncoding[] immhQimmhOpuConstraints = new InstEncoding[]
|
||||
{
|
||||
InstEncoding[] immhQimmhOpuConstraints =
|
||||
[
|
||||
new(0x00000000, 0x00780000),
|
||||
new(0x00400000, 0x40400000),
|
||||
new(0x00000000, 0x20001000),
|
||||
};
|
||||
new(0x00000000, 0x20001000)
|
||||
];
|
||||
|
||||
List<InstInfo> insts = new()
|
||||
{
|
||||
List<InstInfo> insts =
|
||||
[
|
||||
new(0x5AC02000, 0x7FFFFC00, InstName.Abs, IsaVersion.v89, InstFlags.RdRn),
|
||||
new(0x5EE0B800, 0xFFFFFC00, InstName.AbsAdvsimdS, IsaVersion.v80, InstFlags.RdRnFpSimd),
|
||||
new(0x0E20B800, 0xBF3FFC00, qsizeConstraints, InstName.AbsAdvsimdV, IsaVersion.v80, InstFlags.RdRnFpSimd),
|
||||
|
@ -1587,7 +1587,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm64.Target.Arm64
|
|||
new(0xD503203F, 0xFFFFFFFF, InstName.Yield, IsaVersion.v80, InstFlags.None),
|
||||
new(0x0E003800, 0xBF20FC00, qsizeConstraints, InstName.Zip1Advsimd, IsaVersion.v80, InstFlags.RdRnRmFpSimd),
|
||||
new(0x0E007800, 0xBF20FC00, qsizeConstraints, InstName.Zip2Advsimd, IsaVersion.v80, InstFlags.RdRnRmFpSimd),
|
||||
};
|
||||
];
|
||||
|
||||
_table = new(insts);
|
||||
}
|
||||
|
|
|
@ -24,7 +24,7 @@ namespace Ryujinx.Cpu.LightningJit.Cache
|
|||
}
|
||||
}
|
||||
|
||||
private readonly List<MemoryBlock> _blocks = new();
|
||||
private readonly List<MemoryBlock> _blocks = [];
|
||||
|
||||
public CacheMemoryAllocator(int capacity)
|
||||
{
|
||||
|
|
|
@ -21,7 +21,7 @@ namespace Ryujinx.Cpu.LightningJit.Cache
|
|||
|
||||
private static CacheMemoryAllocator _cacheAllocator;
|
||||
|
||||
private static readonly List<CacheEntry> _cacheEntries = new();
|
||||
private static readonly List<CacheEntry> _cacheEntries = [];
|
||||
|
||||
private static readonly object _lock = new();
|
||||
private static bool _initialized;
|
||||
|
|
|
@ -6,8 +6,8 @@ namespace Ryujinx.Cpu.LightningJit.Cache
|
|||
{
|
||||
class JitCacheInvalidation
|
||||
{
|
||||
private static readonly int[] _invalidationCode = new int[]
|
||||
{
|
||||
private static readonly int[] _invalidationCode =
|
||||
[
|
||||
unchecked((int)0xd53b0022), // mrs x2, ctr_el0
|
||||
unchecked((int)0xd3504c44), // ubfx x4, x2, #16, #4
|
||||
unchecked((int)0x52800083), // mov w3, #0x4
|
||||
|
@ -36,7 +36,7 @@ namespace Ryujinx.Cpu.LightningJit.Cache
|
|||
unchecked((int)0xd5033b9f), // dsb ish
|
||||
unchecked((int)0xd5033fdf), // isb
|
||||
unchecked((int)0xd65f03c0), // ret
|
||||
};
|
||||
];
|
||||
|
||||
private delegate void InvalidateCache(ulong start, ulong end);
|
||||
|
||||
|
|
|
@ -190,7 +190,7 @@ namespace Ryujinx.Cpu.LightningJit.Cache
|
|||
|
||||
private bool TryGetThreadLocalFunction(ulong guestAddress, out IntPtr funcPtr)
|
||||
{
|
||||
if ((_threadLocalCache ??= new()).TryGetValue(guestAddress, out var entry))
|
||||
if ((_threadLocalCache ??= []).TryGetValue(guestAddress, out var entry))
|
||||
{
|
||||
if (entry.IncrementUseCount() >= MinCallsForPad)
|
||||
{
|
||||
|
@ -231,7 +231,7 @@ namespace Ryujinx.Cpu.LightningJit.Cache
|
|||
_sharedCache.Pointer,
|
||||
SharedCacheSize);
|
||||
|
||||
List<(ulong, ThreadLocalCacheEntry)> toDelete = new();
|
||||
List<(ulong, ThreadLocalCacheEntry)> toDelete = [];
|
||||
|
||||
foreach ((ulong address, ThreadLocalCacheEntry entry) in _threadLocalCache)
|
||||
{
|
||||
|
@ -306,7 +306,7 @@ namespace Ryujinx.Cpu.LightningJit.Cache
|
|||
IntPtr funcPtr = _localCache.Pointer + funcOffset;
|
||||
code.CopyTo(new Span<byte>((void*)funcPtr, code.Length));
|
||||
|
||||
(_threadLocalCache ??= new()).Add(guestAddress, new(funcOffset, code.Length, funcPtr));
|
||||
(_threadLocalCache ??= []).Add(guestAddress, new(funcOffset, code.Length, funcPtr));
|
||||
|
||||
_localCache.ReprotectAsRx(funcOffset, alignedSize);
|
||||
|
||||
|
|
|
@ -35,8 +35,8 @@ namespace Ryujinx.Cpu.LightningJit.Cache
|
|||
{
|
||||
_alignedRangeAction = alignedRangeAction;
|
||||
_alignedFunctionAction = alignedFunctionAction;
|
||||
_pendingFunctions = new();
|
||||
_ranges = new();
|
||||
_pendingFunctions = [];
|
||||
_ranges = [];
|
||||
}
|
||||
|
||||
public bool Has(ulong address)
|
||||
|
|
|
@ -26,7 +26,7 @@ namespace Ryujinx.Cpu.LightningJit.CodeGen.Arm64
|
|||
public Assembler(CodeWriter writer)
|
||||
{
|
||||
_code = writer.GetList();
|
||||
_labels = new List<LabelState>();
|
||||
_labels = [];
|
||||
}
|
||||
|
||||
public readonly Operand CreateLabel()
|
||||
|
|
|
@ -8,7 +8,7 @@ namespace Ryujinx.Cpu.LightningJit.CodeGen.Arm64
|
|||
{
|
||||
public IEnumerable<ulong> GetCallStack(IntPtr framePointer, IntPtr codeRegionStart, int codeRegionSize, IntPtr codeRegion2Start, int codeRegion2Size)
|
||||
{
|
||||
List<ulong> functionPointers = new();
|
||||
List<ulong> functionPointers = [];
|
||||
|
||||
while (true)
|
||||
{
|
||||
|
|
|
@ -16,7 +16,7 @@ namespace Ryujinx.Cpu.LightningJit.CodeGen.Arm64
|
|||
|
||||
public TailMerger()
|
||||
{
|
||||
_branchPointers = new();
|
||||
_branchPointers = [];
|
||||
}
|
||||
|
||||
public void AddConditionalReturn(CodeWriter writer, in Assembler asm, ArmCondition returnCondition)
|
||||
|
|
|
@ -12,7 +12,7 @@ namespace Ryujinx.Cpu.LightningJit
|
|||
|
||||
public CodeWriter()
|
||||
{
|
||||
_instructions = new();
|
||||
_instructions = [];
|
||||
}
|
||||
|
||||
public void WriteInstruction(uint instruction)
|
||||
|
|
|
@ -34,7 +34,7 @@ namespace Ryujinx.Cpu.LightningJit.Table
|
|||
{
|
||||
int splitIndex = (int)((insts[index].Encoding >> _shift) & _mask);
|
||||
|
||||
(splitList[splitIndex] ??= new()).Add(insts[index]);
|
||||
(splitList[splitIndex] ??= []).Add(insts[index]);
|
||||
}
|
||||
|
||||
for (int index = 0; index < count; index++)
|
||||
|
|
|
@ -20,23 +20,21 @@ namespace Ryujinx.Cpu.LightningJit
|
|||
private static bool IsNoWxPlatform => false;
|
||||
|
||||
private static readonly AddressTable<ulong>.Level[] _levels64Bit =
|
||||
new AddressTable<ulong>.Level[]
|
||||
{
|
||||
[
|
||||
new(31, 17),
|
||||
new(23, 8),
|
||||
new(15, 8),
|
||||
new(7, 8),
|
||||
new( 2, 5),
|
||||
};
|
||||
new(2, 5)
|
||||
];
|
||||
|
||||
private static readonly AddressTable<ulong>.Level[] _levels32Bit =
|
||||
new AddressTable<ulong>.Level[]
|
||||
{
|
||||
[
|
||||
new(23, 9),
|
||||
new(15, 8),
|
||||
new(7, 8),
|
||||
new( 1, 6),
|
||||
};
|
||||
new(1, 6)
|
||||
];
|
||||
|
||||
private readonly ConcurrentQueue<KeyValuePair<ulong, TranslatedFunction>> _oldFuncs;
|
||||
private readonly NoWxCache _noWxCache;
|
||||
|
@ -153,7 +151,7 @@ namespace Ryujinx.Cpu.LightningJit
|
|||
|
||||
public void InvalidateJitCacheRegion(ulong address, ulong size)
|
||||
{
|
||||
ulong[] overlapAddresses = Array.Empty<ulong>();
|
||||
ulong[] overlapAddresses = [];
|
||||
|
||||
int overlapsCount = Functions.GetOverlaps(address, size, ref overlapAddresses);
|
||||
|
||||
|
|
|
@ -140,7 +140,7 @@ namespace Ryujinx.Cpu.LightningJit
|
|||
/// <returns>Generated <see cref="DispatchStub"/></returns>
|
||||
private IntPtr GenerateDispatchStub()
|
||||
{
|
||||
List<int> branchToFallbackOffsets = new();
|
||||
List<int> branchToFallbackOffsets = [];
|
||||
|
||||
CodeWriter writer = new();
|
||||
|
||||
|
|
|
@ -38,10 +38,10 @@ namespace Ryujinx.Cpu
|
|||
{
|
||||
Memory = memory;
|
||||
Size = size;
|
||||
_freeRanges = new List<Range>
|
||||
{
|
||||
new Range(0, size),
|
||||
};
|
||||
_freeRanges =
|
||||
[
|
||||
new Range(0, size)
|
||||
];
|
||||
}
|
||||
|
||||
public ulong Allocate(ulong size, ulong alignment)
|
||||
|
@ -185,7 +185,7 @@ namespace Ryujinx.Cpu
|
|||
|
||||
public PrivateMemoryAllocatorImpl(ulong blockAlignment, MemoryAllocationFlags allocationFlags)
|
||||
{
|
||||
_blocks = new List<T>();
|
||||
_blocks = [];
|
||||
_blockAlignment = blockAlignment;
|
||||
_allocationFlags = allocationFlags;
|
||||
}
|
||||
|
|
|
@ -28,7 +28,7 @@ namespace Ryujinx.Graphics.Device
|
|||
|
||||
if (debugLogCallback != null)
|
||||
{
|
||||
_fieldNamesForDebug = new Dictionary<uint, string>();
|
||||
_fieldNamesForDebug = [];
|
||||
_debugLogCallback = debugLogCallback;
|
||||
}
|
||||
|
||||
|
|
|
@ -15,8 +15,8 @@ namespace Ryujinx.Graphics.GAL.Multithreading
|
|||
{
|
||||
private ulong _bufferHandle = 0;
|
||||
|
||||
private readonly Dictionary<BufferHandle, BufferHandle> _bufferMap = new();
|
||||
private readonly HashSet<BufferHandle> _inFlight = new();
|
||||
private readonly Dictionary<BufferHandle, BufferHandle> _bufferMap = [];
|
||||
private readonly HashSet<BufferHandle> _inFlight = [];
|
||||
private readonly AutoResetEvent _inFlightChanged = new(false);
|
||||
|
||||
internal BufferHandle CreateBufferHandle()
|
||||
|
|
|
@ -22,7 +22,7 @@ namespace Ryujinx.Graphics.GAL.Multithreading.Resources
|
|||
_renderer = renderer;
|
||||
|
||||
_toCompile = new Queue<IProgramRequest>();
|
||||
_inProgress = new List<ThreadedProgram>();
|
||||
_inProgress = [];
|
||||
}
|
||||
|
||||
public void Add(IProgramRequest request)
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show more
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Reference in a new issue