.. |
CpuTest.cs
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shader cache: Fix Linux boot issues (#1709)
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2020-11-17 22:40:19 +01:00 |
CpuTest32.cs
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shader cache: Fix Linux boot issues (#1709)
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2020-11-17 22:40:19 +01:00 |
CpuTestAlu.cs
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Implement a custom value generator for the Tests of the CLS and CLZ instructions (Base: 32, 64 bits. Simd: 8, 16, 32 bits). (#696)
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2019-06-12 09:03:31 -03:00 |
CpuTestAlu32.cs
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Add SSAT, SSAT16, USAT and USAT16 ARM32 instructions (#954)
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2020-03-01 07:51:55 +11:00 |
CpuTestAluBinary.cs
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Add SSE4.2 Path for CRC32, add A32 variant, add tests for non-castagnoli variants. (#1328)
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2020-07-13 20:48:14 +10:00 |
CpuTestAluBinary32.cs
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Add SSE4.2 Path for CRC32, add A32 variant, add tests for non-castagnoli variants. (#1328)
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2020-07-13 20:48:14 +10:00 |
CpuTestAluImm.cs
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Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)
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2018-11-01 01:22:09 -03:00 |
CpuTestAluRs.cs
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Add a new JIT compiler for CPU code (#693)
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2019-08-08 21:56:22 +03:00 |
CpuTestAluRs32.cs
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Add most of the A32 instruction set to ARMeilleure (#897)
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2020-02-24 08:20:40 +11:00 |
CpuTestAluRx.cs
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Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)
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2018-11-01 01:22:09 -03:00 |
CpuTestBf32.cs
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Add most of the A32 instruction set to ARMeilleure (#897)
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2020-02-24 08:20:40 +11:00 |
CpuTestBfm.cs
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Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)
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2018-11-01 01:22:09 -03:00 |
CpuTestCcmpImm.cs
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Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)
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2018-11-01 01:22:09 -03:00 |
CpuTestCcmpReg.cs
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Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)
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2018-11-01 01:22:09 -03:00 |
CpuTestCsel.cs
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Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)
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2018-11-01 01:22:09 -03:00 |
CpuTestMisc.cs
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Add Fmax/minv_V & S/Ushl_S Inst.s with Tests. Fix Maxps/d & Minps/d d… (#1335)
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2020-07-13 21:08:47 +10:00 |
CpuTestMisc32.cs
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CPU: This PR fixes Fpscr, among other things. (#1433)
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2020-08-08 17:18:51 +02:00 |
CpuTestMov.cs
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Implement a custom value generator for the Tests of the CLS and CLZ instructions (Base: 32, 64 bits. Simd: 8, 16, 32 bits). (#696)
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2019-06-12 09:03:31 -03:00 |
CpuTestMul.cs
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Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)
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2018-11-01 01:22:09 -03:00 |
CpuTestMul32.cs
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Add SSAT, SSAT16, USAT and USAT16 ARM32 instructions (#954)
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2020-03-01 07:51:55 +11:00 |
CpuTestSimd.cs
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CPU (A64): Add FP16/FP32 fast paths (F16C Intrinsics) for Fcvt_S, Fcvtl_V & Fcvtn_V Instructions. Now HardwareCapabilities uses CpuId. (#1650)
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2020-11-18 19:35:54 +01:00 |
CpuTestSimd32.cs
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CPU: A32: Fix Vabs_V & Vneg_V (S8, S16, S32 & F32); add Tests. (#1394)
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2020-07-17 10:57:49 -03:00 |
CpuTestSimdCrypto.cs
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Add a new JIT compiler for CPU code (#693)
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2019-08-08 21:56:22 +03:00 |
CpuTestSimdCrypto32.cs
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Implement AESMC, AESIMC, AESE, AESD and VEOR AArch32 instructions (#982)
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2020-03-14 10:29:58 +11:00 |
CpuTestSimdCvt.cs
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Implemented fast paths for: (#846)
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2019-12-29 22:22:47 -03:00 |
CpuTestSimdCvt32.cs
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Fix Vcvt_FI & Vcvt_RM; Add Vfma_S & Vfms_S. Add Tests. (#1471)
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2020-08-13 02:34:02 -03:00 |
CpuTestSimdExt.cs
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Add a new JIT compiler for CPU code (#693)
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2019-08-08 21:56:22 +03:00 |
CpuTestSimdFcond.cs
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Add a new JIT compiler for CPU code (#693)
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2019-08-08 21:56:22 +03:00 |
CpuTestSimdFmov.cs
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Add a new JIT compiler for CPU code (#693)
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2019-08-08 21:56:22 +03:00 |
CpuTestSimdImm.cs
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Add a new JIT compiler for CPU code (#693)
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2019-08-08 21:56:22 +03:00 |
CpuTestSimdIns.cs
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Add a new JIT compiler for CPU code (#693)
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2019-08-08 21:56:22 +03:00 |
CpuTestSimdLogical32.cs
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Implements some 32-bit instructions (VBIC, VTST, VSRA) (#1192)
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2020-07-19 15:11:58 -03:00 |
CpuTestSimdMemory32.cs
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CPU: This PR fixes Fpscr, among other things. (#1433)
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2020-08-08 17:18:51 +02:00 |
CpuTestSimdMov32.cs
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Fix VMVN (immediate), Add VPMIN, VPMAX, VMVN (register) (#1303)
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2020-06-24 10:43:44 +10:00 |
CpuTestSimdReg.cs
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Add Fmax/minv_V & S/Ushl_S Inst.s with Tests. Fix Maxps/d & Minps/d d… (#1335)
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2020-07-13 21:08:47 +10:00 |
CpuTestSimdReg32.cs
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CPU: This PR fixes Fpscr, among other things. (#1433)
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2020-08-08 17:18:51 +02:00 |
CpuTestSimdRegElem.cs
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Add a new JIT compiler for CPU code (#693)
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2019-08-08 21:56:22 +03:00 |
CpuTestSimdRegElem32.cs
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Implement VMULL, VMLSL, VRSHR, VQRSHRN, VQRSHRUN AArch32 instructions + other fixes (#977)
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2020-03-11 11:49:27 +11:00 |
CpuTestSimdRegElemF.cs
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Add a new JIT compiler for CPU code (#693)
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2019-08-08 21:56:22 +03:00 |
CpuTestSimdShImm.cs
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CPU (A64): Add Scvtf_S_Fixed & Ucvtf_S_Fixed with Tests. (#1492)
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2020-08-31 20:48:21 -03:00 |
CpuTestSimdShImm32.cs
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CPU: This PR fixes Fpscr, among other things. (#1433)
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2020-08-08 17:18:51 +02:00 |
CpuTestSimdTbl.cs
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Add Tbx Inst. (fast & slow paths), with Tests. (#782)
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2019-10-04 11:43:20 -03:00 |
CpuTestSystem.cs
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Add Mrs & Msr (Nzcv) Inst., with Tests. (#819)
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2019-11-14 13:08:07 +11:00 |