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Fix an issue introduced in #2190 where by 2 different count table entry addresses were used for LCQ functions. E.g: ```asm .L1: mov rbp,COUNT_TABLE_0 ;; This gets an address. mov ebp,[rbp] lea esi,[rbp+1] mov rdi,COUNT_TABLE_1 ;; This gets another address. mov [rdi],esi cmp ebp,64h je near .L34 ``` This caused LCQ functions to not tier up when they're loaded from the PTC cache. This does not happen when they're freshly compiled. This PR fixes the issue by ensuring only a single counter is created per translation. |
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.. | ||
Cache | ||
PTC | ||
ArmEmitterContext.cs | ||
Compiler.cs | ||
CompilerContext.cs | ||
CompilerOptions.cs | ||
ControlFlowGraph.cs | ||
DelegateHelper.cs | ||
DelegateInfo.cs | ||
Delegates.cs | ||
DispatcherFunction.cs | ||
Dominance.cs | ||
EmitterContext.cs | ||
GuestFunction.cs | ||
RegisterToLocal.cs | ||
RegisterUsage.cs | ||
RejitRequest.cs | ||
SsaConstruction.cs | ||
SsaDeconstruction.cs | ||
TranslatedFunction.cs | ||
Translator.cs | ||
TranslatorStubs.cs |