a0aecd1ff8
Correctly calculates the number of iterations required to copy all the data from compressed textures
203 lines
No EOL
6.9 KiB
C#
203 lines
No EOL
6.9 KiB
C#
using Ryujinx.Graphics.Memory;
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using Ryujinx.Graphics.Texture;
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using System.Collections.Generic;
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namespace Ryujinx.Graphics.Graphics3d
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{
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class NvGpuEngineM2mf : INvGpuEngine
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{
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public int[] Registers { get; private set; }
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private NvGpu _gpu;
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private Dictionary<int, NvGpuMethod> _methods;
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public NvGpuEngineM2mf(NvGpu gpu)
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{
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_gpu = gpu;
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Registers = new int[0x1d6];
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_methods = new Dictionary<int, NvGpuMethod>();
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void AddMethod(int meth, int count, int stride, NvGpuMethod method)
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{
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while (count-- > 0)
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{
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_methods.Add(meth, method);
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meth += stride;
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}
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}
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AddMethod(0xc0, 1, 1, Execute);
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}
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public void CallMethod(NvGpuVmm vmm, GpuMethodCall methCall)
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{
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if (_methods.TryGetValue(methCall.Method, out NvGpuMethod method))
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{
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method(vmm, methCall);
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}
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else
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{
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WriteRegister(methCall);
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}
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}
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private void Execute(NvGpuVmm vmm, GpuMethodCall methCall)
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{
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//TODO: Some registers and copy modes are still not implemented.
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int control = methCall.Argument;
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bool srcLinear = ((control >> 7) & 1) != 0;
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bool dstLinear = ((control >> 8) & 1) != 0;
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bool copy2D = ((control >> 9) & 1) != 0;
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long srcAddress = MakeInt64From2xInt32(NvGpuEngineM2mfReg.SrcAddress);
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long dstAddress = MakeInt64From2xInt32(NvGpuEngineM2mfReg.DstAddress);
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int srcPitch = ReadRegister(NvGpuEngineM2mfReg.SrcPitch);
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int dstPitch = ReadRegister(NvGpuEngineM2mfReg.DstPitch);
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int xCount = ReadRegister(NvGpuEngineM2mfReg.XCount);
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int yCount = ReadRegister(NvGpuEngineM2mfReg.YCount);
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int swizzle = ReadRegister(NvGpuEngineM2mfReg.Swizzle);
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int dstBlkDim = ReadRegister(NvGpuEngineM2mfReg.DstBlkDim);
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int dstSizeX = ReadRegister(NvGpuEngineM2mfReg.DstSizeX);
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int dstSizeY = ReadRegister(NvGpuEngineM2mfReg.DstSizeY);
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int dstSizeZ = ReadRegister(NvGpuEngineM2mfReg.DstSizeZ);
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int dstPosXY = ReadRegister(NvGpuEngineM2mfReg.DstPosXY);
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int dstPosZ = ReadRegister(NvGpuEngineM2mfReg.DstPosZ);
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int srcBlkDim = ReadRegister(NvGpuEngineM2mfReg.SrcBlkDim);
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int srcSizeX = ReadRegister(NvGpuEngineM2mfReg.SrcSizeX);
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int srcSizeY = ReadRegister(NvGpuEngineM2mfReg.SrcSizeY);
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int srcSizeZ = ReadRegister(NvGpuEngineM2mfReg.SrcSizeZ);
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int srcPosXY = ReadRegister(NvGpuEngineM2mfReg.SrcPosXY);
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int srcPosZ = ReadRegister(NvGpuEngineM2mfReg.SrcPosZ);
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int srcCpp = ((swizzle >> 20) & 7) + 1;
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int dstCpp = ((swizzle >> 24) & 7) + 1;
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int dstPosX = (dstPosXY >> 0) & 0xffff;
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int dstPosY = (dstPosXY >> 16) & 0xffff;
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int srcPosX = (srcPosXY >> 0) & 0xffff;
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int srcPosY = (srcPosXY >> 16) & 0xffff;
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int srcBlockHeight = 1 << ((srcBlkDim >> 4) & 0xf);
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int dstBlockHeight = 1 << ((dstBlkDim >> 4) & 0xf);
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long srcPa = vmm.GetPhysicalAddress(srcAddress);
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long dstPa = vmm.GetPhysicalAddress(dstAddress);
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if (copy2D)
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{
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if (srcLinear)
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{
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srcPosX = srcPosY = srcPosZ = 0;
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}
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if (dstLinear)
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{
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dstPosX = dstPosY = dstPosZ = 0;
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}
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if (srcLinear && dstLinear)
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{
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for (int y = 0; y < yCount; y++)
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{
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int srcOffset = (srcPosY + y) * srcPitch + srcPosX * srcCpp;
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int dstOffset = (dstPosY + y) * dstPitch + dstPosX * dstCpp;
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long src = srcPa + (uint)srcOffset;
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long dst = dstPa + (uint)dstOffset;
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vmm.Memory.CopyBytes(src, dst, xCount * srcCpp);
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}
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}
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else
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{
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ISwizzle srcSwizzle;
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if (srcLinear)
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{
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srcSwizzle = new LinearSwizzle(srcPitch, srcCpp, srcSizeX, srcSizeY);
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}
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else
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{
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srcSwizzle = new BlockLinearSwizzle(
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srcSizeX,
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srcSizeY, 1,
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srcBlockHeight, 1,
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srcCpp);
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}
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ISwizzle dstSwizzle;
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if (dstLinear)
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{
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dstSwizzle = new LinearSwizzle(dstPitch, dstCpp, srcSizeX, srcSizeY);
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}
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else
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{
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dstSwizzle = new BlockLinearSwizzle(
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dstSizeX,
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dstSizeY, 1,
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dstBlockHeight, 1,
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dstCpp);
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}
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// Calculate the bits per pixel
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int bpp = srcPitch / xCount;
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// Copying all the bits at the same time corrupts the texture, unknown why but probably because the texture isn't linear
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// To avoid this we will simply loop more times to cover all the bits,
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// this allows up to recalculate the memory locations for each iteration around the loop
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xCount *= bpp / srcCpp;
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for (int y = 0; y < yCount; y++)
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for (int x = 0; x < xCount; x++)
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{
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int srcOffset = srcSwizzle.GetSwizzleOffset(srcPosX + x, srcPosY + y, 0);
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int dstOffset = dstSwizzle.GetSwizzleOffset(dstPosX + x, dstPosY + y, 0);
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long src = srcPa + (uint)srcOffset;
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long dst = dstPa + (uint)dstOffset;
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vmm.Memory.CopyBytes(src, dst, srcCpp);
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}
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}
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}
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else
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{
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vmm.Memory.CopyBytes(srcPa, dstPa, xCount);
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}
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}
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private long MakeInt64From2xInt32(NvGpuEngineM2mfReg reg)
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{
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return
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(long)Registers[(int)reg + 0] << 32 |
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(uint)Registers[(int)reg + 1];
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}
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private void WriteRegister(GpuMethodCall methCall)
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{
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Registers[methCall.Method] = methCall.Argument;
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}
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private int ReadRegister(NvGpuEngineM2mfReg reg)
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{
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return Registers[(int)reg];
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}
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private void WriteRegister(NvGpuEngineM2mfReg reg, int value)
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{
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Registers[(int)reg] = value;
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}
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}
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} |