mirror of
https://github.com/Ryujinx/Ryujinx.git
synced 2024-08-18 06:38:42 +02:00
* Back to the origins: Make memory manager take guest PA rather than host address once again * Direct mapping with alias support on Windows * Fixes and remove more of the emulated shared memory * Linux support * Make shared and transfer memory not depend on SharedMemoryStorage * More efficient view mapping on Windows (no more restricted to 4KB pages at a time) * Handle potential access violations caused by partial unmap * Implement host mapping using shared memory on Linux * Add new GetPhysicalAddressChecked method, used to ensure the virtual address is mapped before address translation Also align GetRef behaviour with software memory manager * We don't need a mirrorable memory block for software memory manager mode * Disable memory aliasing tests while we don't have shared memory support on Mac * Shared memory & SIGBUS handler for macOS * Fix typo + nits + re-enable memory tests * Set MAP_JIT_DARWIN on x86 Mac too * Add back the address space mirror * Only set MAP_JIT_DARWIN if we are mapping as executable * Disable aliasing tests again (still fails on Mac) * Fix UnmapView4KB (by not casting size to int) * Use ref counting on memory blocks to delay closing the shared memory handle until all blocks using it are disposed * Address PR feedback * Make RO hold a reference to the guest process memory manager to avoid early disposal Co-authored-by: nastys <nastys@users.noreply.github.com>
142 lines
3.7 KiB
C#
142 lines
3.7 KiB
C#
namespace Ryujinx.Memory
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{
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public class PageTable<T> where T : unmanaged
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{
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public const int PageBits = 12;
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public const int PageSize = 1 << PageBits;
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public const int PageMask = PageSize - 1;
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private const int PtLevelBits = 9; // 9 * 4 + 12 = 48 (max address space size)
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private const int PtLevelSize = 1 << PtLevelBits;
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private const int PtLevelMask = PtLevelSize - 1;
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private readonly T[][][][] _pageTable;
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public PageTable()
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{
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_pageTable = new T[PtLevelSize][][][];
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}
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public T Read(ulong va)
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{
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int l3 = (int)(va >> PageBits) & PtLevelMask;
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int l2 = (int)(va >> (PageBits + PtLevelBits)) & PtLevelMask;
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int l1 = (int)(va >> (PageBits + PtLevelBits * 2)) & PtLevelMask;
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int l0 = (int)(va >> (PageBits + PtLevelBits * 3)) & PtLevelMask;
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if (_pageTable[l0] == null)
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{
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return default;
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}
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if (_pageTable[l0][l1] == null)
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{
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return default;
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}
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if (_pageTable[l0][l1][l2] == null)
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{
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return default;
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}
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return _pageTable[l0][l1][l2][l3];
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}
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public void Map(ulong va, T value)
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{
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int l3 = (int)(va >> PageBits) & PtLevelMask;
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int l2 = (int)(va >> (PageBits + PtLevelBits)) & PtLevelMask;
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int l1 = (int)(va >> (PageBits + PtLevelBits * 2)) & PtLevelMask;
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int l0 = (int)(va >> (PageBits + PtLevelBits * 3)) & PtLevelMask;
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if (_pageTable[l0] == null)
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{
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_pageTable[l0] = new T[PtLevelSize][][];
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}
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if (_pageTable[l0][l1] == null)
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{
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_pageTable[l0][l1] = new T[PtLevelSize][];
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}
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if (_pageTable[l0][l1][l2] == null)
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{
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_pageTable[l0][l1][l2] = new T[PtLevelSize];
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}
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_pageTable[l0][l1][l2][l3] = value;
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}
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public void Unmap(ulong va)
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{
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int l3 = (int)(va >> PageBits) & PtLevelMask;
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int l2 = (int)(va >> (PageBits + PtLevelBits)) & PtLevelMask;
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int l1 = (int)(va >> (PageBits + PtLevelBits * 2)) & PtLevelMask;
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int l0 = (int)(va >> (PageBits + PtLevelBits * 3)) & PtLevelMask;
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if (_pageTable[l0] == null)
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{
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return;
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}
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if (_pageTable[l0][l1] == null)
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{
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return;
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}
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if (_pageTable[l0][l1][l2] == null)
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{
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return;
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}
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_pageTable[l0][l1][l2][l3] = default;
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bool empty = true;
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for (int i = 0; i < _pageTable[l0][l1][l2].Length; i++)
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{
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empty &= _pageTable[l0][l1][l2][i].Equals(default);
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}
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if (empty)
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{
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_pageTable[l0][l1][l2] = null;
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RemoveIfAllNull(l0, l1);
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}
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}
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private void RemoveIfAllNull(int l0, int l1)
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{
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bool empty = true;
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for (int i = 0; i < _pageTable[l0][l1].Length; i++)
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{
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empty &= (_pageTable[l0][l1][i] == null);
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}
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if (empty)
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{
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_pageTable[l0][l1] = null;
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RemoveIfAllNull(l0);
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}
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}
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private void RemoveIfAllNull(int l0)
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{
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bool empty = true;
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for (int i = 0; i < _pageTable[l0].Length; i++)
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{
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empty &= (_pageTable[l0][i] == null);
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}
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if (empty)
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{
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_pageTable[l0] = null;
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}
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}
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}
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}
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