a731ab3a2a
* Start of the ARMeilleure project * Refactoring around the old IRAdapter, now renamed to PreAllocator * Optimize the LowestBitSet method * Add CLZ support and fix CLS implementation * Add missing Equals and GetHashCode overrides on some structs, misc small tweaks * Implement the ByteSwap IR instruction, and some refactoring on the assembler * Implement the DivideUI IR instruction and fix 64-bits IDIV * Correct constant operand type on CSINC * Move division instructions implementation to InstEmitDiv * Fix destination type for the ConditionalSelect IR instruction * Implement UMULH and SMULH, with new IR instructions * Fix some issues with shift instructions * Fix constant types for BFM instructions * Fix up new tests using the new V128 struct * Update tests * Move DIV tests to a separate file * Add support for calls, and some instructions that depends on them * Start adding support for SIMD & FP types, along with some of the related ARM instructions * Fix some typos and the divide instruction with FP operands * Fix wrong method call on Clz_V * Implement ARM FP & SIMD move instructions, Saddlv_V, and misc. fixes * Implement SIMD logical instructions and more misc. fixes * Fix PSRAD x86 instruction encoding, TRN, UABD and UABDL implementations * Implement float conversion instruction, merge in LDj3SNuD fixes, and some other misc. fixes * Implement SIMD shift instruction and fix Dup_V * Add SCVTF and UCVTF (vector, fixed-point) variants to the opcode table * Fix check with tolerance on tester * Implement FP & SIMD comparison instructions, and some fixes * Update FCVT (Scalar) encoding on the table to support the Half-float variants * Support passing V128 structs, some cleanup on the register allocator, merge LDj3SNuD fixes * Use old memory access methods, made a start on SIMD memory insts support, some fixes * Fix float constant passed to functions, save and restore non-volatile XMM registers, other fixes * Fix arguments count with struct return values, other fixes * More instructions * Misc. fixes and integrate LDj3SNuD fixes * Update tests * Add a faster linear scan allocator, unwinding support on windows, and other changes * Update Ryujinx.HLE * Update Ryujinx.Graphics * Fix V128 return pointer passing, RCX is clobbered * Update Ryujinx.Tests * Update ITimeZoneService * Stop using GetFunctionPointer as that can't be called from native code, misc. fixes and tweaks * Use generic GetFunctionPointerForDelegate method and other tweaks * Some refactoring on the code generator, assert on invalid operations and use a separate enum for intrinsics * Remove some unused code on the assembler * Fix REX.W prefix regression on float conversion instructions, add some sort of profiler * Add hardware capability detection * Fix regression on Sha1h and revert Fcm** changes * Add SSE2-only paths on vector extract and insert, some refactoring on the pre-allocator * Fix silly mistake introduced on last commit on CpuId * Generate inline stack probes when the stack allocation is too large * Initial support for the System-V ABI * Support multiple destination operands * Fix SSE2 VectorInsert8 path, and other fixes * Change placement of XMM callee save and restore code to match other compilers * Rename Dest to Destination and Inst to Instruction * Fix a regression related to calls and the V128 type * Add an extra space on comments to match code style * Some refactoring * Fix vector insert FP32 SSE2 path * Port over the ARM32 instructions * Avoid memory protection races on JIT Cache * Another fix on VectorInsert FP32 (thanks to LDj3SNuD * Float operands don't need to use the same register when VEX is supported * Add a new register allocator, higher quality code for hot code (tier up), and other tweaks * Some nits, small improvements on the pre allocator * CpuThreadState is gone * Allow changing CPU emulators with a config entry * Add runtime identifiers on the ARMeilleure project * Allow switching between CPUs through a config entry (pt. 2) * Change win10-x64 to win-x64 on projects * Update the Ryujinx project to use ARMeilleure * Ensure that the selected register is valid on the hybrid allocator * Allow exiting on returns to 0 (should fix test regression) * Remove register assignments for most used variables on the hybrid allocator * Do not use fixed registers as spill temp * Add missing namespace and remove unneeded using * Address PR feedback * Fix types, etc * Enable AssumeStrictAbiCompliance by default * Ensure that Spill and Fill don't load or store any more than necessary
565 lines
No EOL
18 KiB
C#
565 lines
No EOL
18 KiB
C#
using ARMeilleure.Memory;
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using Ryujinx.Common;
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using Ryujinx.HLE.HOS.Ipc;
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using Ryujinx.HLE.HOS.Kernel.Common;
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using Ryujinx.HLE.HOS.Kernel.Memory;
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using Ryujinx.HLE.HOS.Kernel.Process;
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using Ryujinx.HLE.Loaders.Executables;
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using Ryujinx.HLE.Utilities;
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using System.Collections.Generic;
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using System.IO;
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using System.Linq;
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using System.Runtime.InteropServices;
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using System.Security.Cryptography;
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namespace Ryujinx.HLE.HOS.Services.Ldr
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{
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[StructLayout(LayoutKind.Explicit, Size = 0x350)]
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unsafe struct NrrHeader
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{
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[FieldOffset(0)]
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public uint Magic;
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[FieldOffset(0x10)]
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public ulong TitleIdMask;
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[FieldOffset(0x18)]
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public ulong TitleIdPattern;
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[FieldOffset(0x30)]
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public fixed byte Modulus[0x100];
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[FieldOffset(0x130)]
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public fixed byte FixedKeySignature[0x100];
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[FieldOffset(0x230)]
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public fixed byte NrrSignature[0x100];
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[FieldOffset(0x330)]
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public ulong TitleIdMin;
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[FieldOffset(0x338)]
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public uint NrrSize;
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[FieldOffset(0x340)]
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public uint HashOffset;
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[FieldOffset(0x344)]
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public uint HashCount;
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}
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class NrrInfo
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{
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public NrrHeader Header { get; private set; }
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public List<byte[]> Hashes { get; private set; }
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public long NrrAddress { get; private set; }
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public NrrInfo(long nrrAddress, NrrHeader header, List<byte[]> hashes)
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{
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NrrAddress = nrrAddress;
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Header = header;
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Hashes = hashes;
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}
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}
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class NroInfo
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{
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public NxRelocatableObject Executable { get; private set; }
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public byte[] Hash { get; private set; }
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public ulong NroAddress { get; private set; }
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public ulong NroSize { get; private set; }
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public ulong BssAddress { get; private set; }
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public ulong BssSize { get; private set; }
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public ulong TotalSize { get; private set; }
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public ulong NroMappedAddress { get; set; }
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public NroInfo(
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NxRelocatableObject executable,
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byte[] hash,
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ulong nroAddress,
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ulong nroSize,
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ulong bssAddress,
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ulong bssSize,
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ulong totalSize)
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{
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Executable = executable;
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Hash = hash;
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NroAddress = nroAddress;
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NroSize = nroSize;
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BssAddress = bssAddress;
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BssSize = bssSize;
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TotalSize = totalSize;
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}
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}
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[Service("ldr:ro")]
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class IRoInterface : IpcService
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{
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private const int MaxNrr = 0x40;
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private const int MaxNro = 0x40;
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private const uint NrrMagic = 0x3052524E;
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private const uint NroMagic = 0x304F524E;
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private List<NrrInfo> _nrrInfos;
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private List<NroInfo> _nroInfos;
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private bool _isInitialized;
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public IRoInterface(ServiceCtx context)
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{
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_nrrInfos = new List<NrrInfo>(MaxNrr);
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_nroInfos = new List<NroInfo>(MaxNro);
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}
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private ResultCode ParseNrr(out NrrInfo nrrInfo, ServiceCtx context, long nrrAddress, long nrrSize)
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{
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nrrInfo = null;
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if (nrrSize == 0 || nrrAddress + nrrSize <= nrrAddress || (nrrSize & 0xFFF) != 0)
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{
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return ResultCode.BadSize;
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}
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else if ((nrrAddress & 0xFFF) != 0)
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{
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return ResultCode.UnalignedAddress;
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}
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StructReader reader = new StructReader(context.Memory, nrrAddress);
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NrrHeader header = reader.Read<NrrHeader>();
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if (header.Magic != NrrMagic)
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{
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return ResultCode.InvalidNrr;
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}
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else if (header.NrrSize != nrrSize)
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{
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return ResultCode.BadSize;
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}
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List<byte[]> hashes = new List<byte[]>();
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for (int i = 0; i < header.HashCount; i++)
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{
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hashes.Add(context.Memory.ReadBytes(nrrAddress + header.HashOffset + (i * 0x20), 0x20));
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}
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nrrInfo = new NrrInfo(nrrAddress, header, hashes);
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return ResultCode.Success;
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}
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public bool IsNroHashPresent(byte[] nroHash)
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{
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foreach (NrrInfo info in _nrrInfos)
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{
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foreach (byte[] hash in info.Hashes)
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{
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if (hash.SequenceEqual(nroHash))
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{
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return true;
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}
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}
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}
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return false;
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}
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public bool IsNroLoaded(byte[] nroHash)
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{
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foreach (NroInfo info in _nroInfos)
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{
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if (info.Hash.SequenceEqual(nroHash))
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{
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return true;
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}
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}
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return false;
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}
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public ResultCode ParseNro(out NroInfo res, ServiceCtx context, ulong nroAddress, ulong nroSize, ulong bssAddress, ulong bssSize)
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{
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res = null;
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if (_nroInfos.Count >= MaxNro)
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{
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return ResultCode.MaxNro;
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}
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else if (nroSize == 0 || nroAddress + nroSize <= nroAddress || (nroSize & 0xFFF) != 0)
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{
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return ResultCode.BadSize;
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}
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else if (bssSize != 0 && bssAddress + bssSize <= bssAddress)
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{
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return ResultCode.BadSize;
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}
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else if ((nroAddress & 0xFFF) != 0)
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{
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return ResultCode.UnalignedAddress;
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}
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uint magic = context.Memory.ReadUInt32((long)nroAddress + 0x10);
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uint nroFileSize = context.Memory.ReadUInt32((long)nroAddress + 0x18);
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if (magic != NroMagic || nroSize != nroFileSize)
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{
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return ResultCode.InvalidNro;
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}
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byte[] nroData = context.Memory.ReadBytes((long)nroAddress, (long)nroSize);
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byte[] nroHash = null;
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MemoryStream stream = new MemoryStream(nroData);
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using (SHA256 hasher = SHA256.Create())
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{
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nroHash = hasher.ComputeHash(stream);
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}
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if (!IsNroHashPresent(nroHash))
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{
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return ResultCode.NroHashNotPresent;
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}
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if (IsNroLoaded(nroHash))
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{
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return ResultCode.NroAlreadyLoaded;
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}
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stream.Position = 0;
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NxRelocatableObject executable = new NxRelocatableObject(stream, nroAddress, bssAddress);
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// check if everything is page align.
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if ((executable.Text.Length & 0xFFF) != 0 || (executable.Ro.Length & 0xFFF) != 0 ||
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(executable.Data.Length & 0xFFF) != 0 || (executable.BssSize & 0xFFF) != 0)
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{
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return ResultCode.InvalidNro;
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}
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// check if everything is contiguous.
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if (executable.RoOffset != executable.TextOffset + executable.Text.Length ||
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executable.DataOffset != executable.RoOffset + executable.Ro.Length ||
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nroFileSize != executable.DataOffset + executable.Data.Length)
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{
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return ResultCode.InvalidNro;
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}
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// finally check the bss size match.
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if ((ulong)executable.BssSize != bssSize)
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{
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return ResultCode.InvalidNro;
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}
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int totalSize = executable.Text.Length + executable.Ro.Length + executable.Data.Length + executable.BssSize;
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res = new NroInfo(
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executable,
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nroHash,
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nroAddress,
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nroSize,
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bssAddress,
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bssSize,
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(ulong)totalSize);
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return ResultCode.Success;
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}
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private ResultCode MapNro(ServiceCtx context, NroInfo info, out ulong nroMappedAddress)
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{
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nroMappedAddress = 0;
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KMemoryManager memMgr = context.Process.MemoryManager;
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ulong targetAddress = memMgr.GetAddrSpaceBaseAddr();
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while (true)
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{
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if (targetAddress + info.TotalSize >= memMgr.AddrSpaceEnd)
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{
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return ResultCode.InvalidMemoryState;
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}
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KMemoryInfo memInfo = memMgr.QueryMemory(targetAddress);
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if (memInfo.State == MemoryState.Unmapped && memInfo.Size >= info.TotalSize)
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{
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if (!memMgr.InsideHeapRegion (targetAddress, info.TotalSize) &&
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!memMgr.InsideAliasRegion(targetAddress, info.TotalSize))
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{
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break;
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}
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}
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targetAddress += memInfo.Size;
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}
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KernelResult result = memMgr.MapProcessCodeMemory(targetAddress, info.NroAddress, info.NroSize);
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if (result != KernelResult.Success)
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{
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return ResultCode.InvalidMemoryState;
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}
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ulong bssTargetAddress = targetAddress + info.NroSize;
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if (info.BssSize != 0)
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{
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result = memMgr.MapProcessCodeMemory(bssTargetAddress, info.BssAddress, info.BssSize);
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if (result != KernelResult.Success)
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{
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memMgr.UnmapProcessCodeMemory(targetAddress, info.NroAddress, info.NroSize);
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return ResultCode.InvalidMemoryState;
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}
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}
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result = LoadNroIntoMemory(context.Process, info.Executable, targetAddress);
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if (result != KernelResult.Success)
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{
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memMgr.UnmapProcessCodeMemory(targetAddress, info.NroAddress, info.NroSize);
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if (info.BssSize != 0)
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{
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memMgr.UnmapProcessCodeMemory(bssTargetAddress, info.BssAddress, info.BssSize);
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}
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return ResultCode.Success;
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}
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info.NroMappedAddress = targetAddress;
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nroMappedAddress = targetAddress;
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return ResultCode.Success;
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}
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private KernelResult LoadNroIntoMemory(KProcess process, IExecutable relocatableObject, ulong baseAddress)
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{
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ulong textStart = baseAddress + (ulong)relocatableObject.TextOffset;
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ulong roStart = baseAddress + (ulong)relocatableObject.RoOffset;
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ulong dataStart = baseAddress + (ulong)relocatableObject.DataOffset;
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ulong bssStart = dataStart + (ulong)relocatableObject.Data.Length;
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ulong bssEnd = BitUtils.AlignUp(bssStart + (ulong)relocatableObject.BssSize, KMemoryManager.PageSize);
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process.CpuMemory.WriteBytes((long)textStart, relocatableObject.Text);
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process.CpuMemory.WriteBytes((long)roStart, relocatableObject.Ro);
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process.CpuMemory.WriteBytes((long)dataStart, relocatableObject.Data);
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MemoryHelper.FillWithZeros(process.CpuMemory, (long)bssStart, (int)(bssEnd - bssStart));
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KernelResult result;
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result = process.MemoryManager.SetProcessMemoryPermission(textStart, roStart - textStart, MemoryPermission.ReadAndExecute);
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if (result != KernelResult.Success)
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{
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return result;
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}
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result = process.MemoryManager.SetProcessMemoryPermission(roStart, dataStart - roStart, MemoryPermission.Read);
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if (result != KernelResult.Success)
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{
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return result;
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}
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return process.MemoryManager.SetProcessMemoryPermission(dataStart, bssEnd - dataStart, MemoryPermission.ReadAndWrite);
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}
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private ResultCode RemoveNrrInfo(long nrrAddress)
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{
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foreach (NrrInfo info in _nrrInfos)
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{
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if (info.NrrAddress == nrrAddress)
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{
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_nrrInfos.Remove(info);
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return ResultCode.Success;
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}
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}
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return ResultCode.BadNrrAddress;
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}
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private ResultCode RemoveNroInfo(ServiceCtx context, ulong nroMappedAddress)
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{
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foreach (NroInfo info in _nroInfos)
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{
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if (info.NroMappedAddress == nroMappedAddress)
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{
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_nroInfos.Remove(info);
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ulong textSize = (ulong)info.Executable.Text.Length;
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ulong roSize = (ulong)info.Executable.Ro.Length;
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ulong dataSize = (ulong)info.Executable.Data.Length;
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ulong bssSize = (ulong)info.Executable.BssSize;
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KernelResult result = KernelResult.Success;
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if (info.Executable.BssSize != 0)
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{
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result = context.Process.MemoryManager.UnmapProcessCodeMemory(
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info.NroMappedAddress + textSize + roSize + dataSize,
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info.Executable.BssAddress,
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bssSize);
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}
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if (result == KernelResult.Success)
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{
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result = context.Process.MemoryManager.UnmapProcessCodeMemory(
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info.NroMappedAddress + textSize + roSize,
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info.Executable.SourceAddress + textSize + roSize,
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dataSize);
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if (result == KernelResult.Success)
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{
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result = context.Process.MemoryManager.UnmapProcessCodeMemory(
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info.NroMappedAddress,
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info.Executable.SourceAddress,
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textSize + roSize);
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}
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}
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return (ResultCode)result;
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}
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}
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return ResultCode.BadNroAddress;
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}
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[Command(0)]
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// LoadNro(u64, u64, u64, u64, u64, pid) -> u64
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public ResultCode LoadNro(ServiceCtx context)
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{
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ResultCode result = ResultCode.BadInitialization;
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// Zero
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context.RequestData.ReadUInt64();
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ulong nroHeapAddress = context.RequestData.ReadUInt64();
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ulong nroSize = context.RequestData.ReadUInt64();
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ulong bssHeapAddress = context.RequestData.ReadUInt64();
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ulong bssSize = context.RequestData.ReadUInt64();
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ulong nroMappedAddress = 0;
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if (_isInitialized)
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{
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NroInfo info;
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result = ParseNro(out info, context, nroHeapAddress, nroSize, bssHeapAddress, bssSize);
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if (result == 0)
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{
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result = MapNro(context, info, out nroMappedAddress);
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if (result == 0)
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{
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_nroInfos.Add(info);
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}
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}
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}
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context.ResponseData.Write(nroMappedAddress);
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return result;
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}
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[Command(1)]
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// UnloadNro(u64, u64, pid)
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public ResultCode UnloadNro(ServiceCtx context)
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{
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ResultCode result = ResultCode.BadInitialization;
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// Zero
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context.RequestData.ReadUInt64();
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ulong nroMappedAddress = context.RequestData.ReadUInt64();
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if (_isInitialized)
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{
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if ((nroMappedAddress & 0xFFF) != 0)
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{
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return ResultCode.UnalignedAddress;
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}
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result = RemoveNroInfo(context, nroMappedAddress);
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}
|
|
|
|
return result;
|
|
}
|
|
|
|
[Command(2)]
|
|
// LoadNrr(u64, u64, u64, pid)
|
|
public ResultCode LoadNrr(ServiceCtx context)
|
|
{
|
|
ResultCode result = ResultCode.BadInitialization;
|
|
|
|
// Zero
|
|
context.RequestData.ReadUInt64();
|
|
|
|
long nrrAddress = context.RequestData.ReadInt64();
|
|
long nrrSize = context.RequestData.ReadInt64();
|
|
|
|
if (_isInitialized)
|
|
{
|
|
NrrInfo info;
|
|
result = ParseNrr(out info, context, nrrAddress, nrrSize);
|
|
|
|
if (result == 0)
|
|
{
|
|
if (_nrrInfos.Count >= MaxNrr)
|
|
{
|
|
result = ResultCode.MaxNrr;
|
|
}
|
|
else
|
|
{
|
|
_nrrInfos.Add(info);
|
|
}
|
|
}
|
|
}
|
|
|
|
return result;
|
|
}
|
|
|
|
[Command(3)]
|
|
// UnloadNrr(u64, u64, pid)
|
|
public ResultCode UnloadNrr(ServiceCtx context)
|
|
{
|
|
ResultCode result = ResultCode.BadInitialization;
|
|
|
|
// Zero
|
|
context.RequestData.ReadUInt64();
|
|
|
|
long nrrHeapAddress = context.RequestData.ReadInt64();
|
|
|
|
if (_isInitialized)
|
|
{
|
|
if ((nrrHeapAddress & 0xFFF) != 0)
|
|
{
|
|
return ResultCode.UnalignedAddress;
|
|
}
|
|
|
|
result = RemoveNrrInfo(nrrHeapAddress);
|
|
}
|
|
|
|
return result;
|
|
}
|
|
|
|
[Command(4)]
|
|
// Initialize(u64, pid, KObject)
|
|
public ResultCode Initialize(ServiceCtx context)
|
|
{
|
|
// TODO: we actually ignore the pid and process handle receive, we will need to use them when we will have multi process support.
|
|
_isInitialized = true;
|
|
|
|
return ResultCode.Success;
|
|
}
|
|
}
|
|
} |