mirror of
https://github.com/Ryujinx/Ryujinx.git
synced 2024-08-17 14:18:44 +02:00
* Initial implementation of Render Target Scaling Works with most games I have. No GUI option right now, it is hardcoded. Missing handling for texelFetch operation. * Realtime Configuration, refactoring. * texelFetch scaling on fragment shader (WIP) * Improve Shader-Side changes. * Fix potential crash when no color/depth bound * Workaround random uses of textures in compute. This was blacklisting textures in a few games despite causing no bugs. Will eventually add full support so this doesn't break anything. * Fix scales oscillating when changing between non-native scales. * Scaled textures on compute, cleanup, lazier uniform update. * Cleanup. * Fix stupidity * Address Thog Feedback. * Cover most of GDK's feedback (two comments remain) * Fix bad rename * Move IsDepthStencil to FormatExtensions, add docs. * Fix default config, square texture detection. * Three final fixes: - Nearest copy when texture is integer format. - Texture2D -> Texture3D copy correctly blacklists the texture before trying an unscaled copy (caused driver error) - Discount small textures. * Remove scale threshold. Not needed right now - we'll see if we run into problems. * All CPU modification blacklists scale. * Fix comment.
289 lines
9.8 KiB
C#
289 lines
9.8 KiB
C#
using Ryujinx.Graphics.Shader.CodeGen.Glsl;
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using Ryujinx.Graphics.Shader.Decoders;
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using Ryujinx.Graphics.Shader.IntermediateRepresentation;
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using Ryujinx.Graphics.Shader.StructuredIr;
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using Ryujinx.Graphics.Shader.Translation.Optimizations;
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using System;
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using System.Collections.Generic;
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using static Ryujinx.Graphics.Shader.IntermediateRepresentation.OperandHelper;
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namespace Ryujinx.Graphics.Shader.Translation
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{
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public static class Translator
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{
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private const int HeaderSize = 0x50;
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public static ShaderProgram Translate(ulong address, IGpuAccessor gpuAccessor, TranslationFlags flags)
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{
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Operation[] ops = DecodeShader(address, gpuAccessor, flags, out ShaderConfig config, out int size, out FeatureFlags featureFlags);
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config.UsedFeatures = featureFlags;
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return Translate(ops, config, size);
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}
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public static ShaderProgram Translate(ulong addressA, ulong addressB, IGpuAccessor gpuAccessor, TranslationFlags flags)
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{
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Operation[] opsA = DecodeShader(addressA, gpuAccessor, flags | TranslationFlags.VertexA, out _, out int sizeA, out FeatureFlags featureFlagsA);
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Operation[] opsB = DecodeShader(addressB, gpuAccessor, flags, out ShaderConfig config, out int sizeB, out FeatureFlags featureFlagsB);
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config.UsedFeatures = featureFlagsA | featureFlagsB;
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return Translate(Combine(opsA, opsB), config, sizeB, sizeA);
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}
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private static ShaderProgram Translate(Operation[] ops, ShaderConfig config, int size, int sizeA = 0)
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{
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BasicBlock[] blocks = ControlFlowGraph.MakeCfg(ops);
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if (blocks.Length > 0)
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{
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Dominance.FindDominators(blocks[0], blocks.Length);
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Dominance.FindDominanceFrontiers(blocks);
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Ssa.Rename(blocks);
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Optimizer.RunPass(blocks, config);
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Lowering.RunPass(blocks, config);
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}
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StructuredProgramInfo sInfo = StructuredProgram.MakeStructuredProgram(blocks, config);
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GlslProgram program = GlslGenerator.Generate(sInfo, config);
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ShaderProgramInfo spInfo = new ShaderProgramInfo(
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program.CBufferDescriptors,
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program.SBufferDescriptors,
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program.TextureDescriptors,
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program.ImageDescriptors,
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sInfo.UsesInstanceId);
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string glslCode = program.Code;
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return new ShaderProgram(spInfo, config.Stage, glslCode, size, sizeA);
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}
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private static Operation[] DecodeShader(
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ulong address,
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IGpuAccessor gpuAccessor,
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TranslationFlags flags,
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out ShaderConfig config,
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out int size,
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out FeatureFlags featureFlags)
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{
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Block[] cfg;
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if ((flags & TranslationFlags.Compute) != 0)
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{
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config = new ShaderConfig(gpuAccessor, flags);
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cfg = Decoder.Decode(gpuAccessor, address);
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}
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else
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{
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config = new ShaderConfig(new ShaderHeader(gpuAccessor, address), gpuAccessor, flags);
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cfg = Decoder.Decode(gpuAccessor, address + HeaderSize);
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}
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if (cfg == null)
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{
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gpuAccessor.Log("Invalid branch detected, failed to build CFG.");
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size = 0;
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featureFlags = FeatureFlags.None;
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return Array.Empty<Operation>();
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}
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EmitterContext context = new EmitterContext(config);
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ulong maxEndAddress = 0;
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for (int blkIndex = 0; blkIndex < cfg.Length; blkIndex++)
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{
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Block block = cfg[blkIndex];
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if (maxEndAddress < block.EndAddress)
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{
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maxEndAddress = block.EndAddress;
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}
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context.CurrBlock = block;
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context.MarkLabel(context.GetLabel(block.Address));
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for (int opIndex = 0; opIndex < block.OpCodes.Count; opIndex++)
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{
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OpCode op = block.OpCodes[opIndex];
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if ((flags & TranslationFlags.DebugMode) != 0)
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{
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string instName;
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if (op.Emitter != null)
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{
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instName = op.Emitter.Method.Name;
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}
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else
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{
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instName = "???";
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gpuAccessor.Log($"Invalid instruction at 0x{op.Address:X6} (0x{op.RawOpCode:X16}).");
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}
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string dbgComment = $"0x{op.Address:X6}: 0x{op.RawOpCode:X16} {instName}";
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context.Add(new CommentNode(dbgComment));
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}
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if (op.NeverExecute)
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{
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continue;
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}
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Operand predSkipLbl = null;
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bool skipPredicateCheck = op is OpCodeBranch opBranch && !opBranch.PushTarget;
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if (op is OpCodeBranchPop opBranchPop)
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{
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// If the instruction is a SYNC or BRK instruction with only one
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// possible target address, then the instruction is basically
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// just a simple branch, we can generate code similar to branch
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// instructions, with the condition check on the branch itself.
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skipPredicateCheck = opBranchPop.Targets.Count < 2;
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}
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if (!(op.Predicate.IsPT || skipPredicateCheck))
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{
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Operand label;
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if (opIndex == block.OpCodes.Count - 1 && block.Next != null)
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{
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label = context.GetLabel(block.Next.Address);
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}
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else
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{
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label = Label();
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predSkipLbl = label;
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}
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Operand pred = Register(op.Predicate);
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if (op.InvertPredicate)
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{
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context.BranchIfTrue(label, pred);
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}
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else
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{
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context.BranchIfFalse(label, pred);
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}
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}
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context.CurrOp = op;
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op.Emitter?.Invoke(context);
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if (predSkipLbl != null)
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{
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context.MarkLabel(predSkipLbl);
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}
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}
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}
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size = (int)maxEndAddress + (((flags & TranslationFlags.Compute) != 0) ? 0 : HeaderSize);
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featureFlags = context.UsedFeatures;
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return context.GetOperations();
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}
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private static Operation[] Combine(Operation[] a, Operation[] b)
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{
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// Here we combine two shaders.
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// For shader A:
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// - All user attribute stores on shader A are turned into copies to a
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// temporary variable. It's assumed that shader B will consume them.
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// - All return instructions are turned into branch instructions, the
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// branch target being the start of the shader B code.
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// For shader B:
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// - All user attribute loads on shader B are turned into copies from a
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// temporary variable, as long that attribute is written by shader A.
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List<Operation> output = new List<Operation>(a.Length + b.Length);
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Operand[] temps = new Operand[AttributeConsts.UserAttributesCount * 4];
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Operand lblB = Label();
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for (int index = 0; index < a.Length; index++)
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{
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Operation operation = a[index];
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if (IsUserAttribute(operation.Dest))
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{
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int tIndex = (operation.Dest.Value - AttributeConsts.UserAttributeBase) / 4;
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Operand temp = temps[tIndex];
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if (temp == null)
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{
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temp = Local();
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temps[tIndex] = temp;
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}
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operation.Dest = temp;
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}
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if (operation.Inst == Instruction.Return)
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{
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output.Add(new Operation(Instruction.Branch, lblB));
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}
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else
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{
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output.Add(operation);
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}
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}
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output.Add(new Operation(Instruction.MarkLabel, lblB));
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for (int index = 0; index < b.Length; index++)
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{
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Operation operation = b[index];
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for (int srcIndex = 0; srcIndex < operation.SourcesCount; srcIndex++)
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{
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Operand src = operation.GetSource(srcIndex);
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if (IsUserAttribute(src))
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{
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Operand temp = temps[(src.Value - AttributeConsts.UserAttributeBase) / 4];
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if (temp != null)
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{
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operation.SetSource(srcIndex, temp);
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}
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}
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}
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output.Add(operation);
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}
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return output.ToArray();
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}
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private static bool IsUserAttribute(Operand operand)
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{
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return operand != null &&
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operand.Type == OperandType.Attribute &&
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operand.Value >= AttributeConsts.UserAttributeBase &&
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operand.Value < AttributeConsts.UserAttributeEnd;
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}
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}
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} |