mirror of
https://github.com/Ryujinx/Ryujinx.git
synced 2024-09-05 23:48:43 +02:00
437 lines
12 KiB
C#
437 lines
12 KiB
C#
using ChocolArm64.Decoder;
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using ChocolArm64.State;
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using ChocolArm64.Translation;
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using System;
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using System.Reflection;
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using System.Reflection.Emit;
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using static ChocolArm64.Instruction.AInstEmitSimdHelper;
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namespace ChocolArm64.Instruction
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{
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static partial class AInstEmit
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{
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public static void Add_V(AILEmitterCtx Context)
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{
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EmitVectorBinaryOpZx(Context, () => Context.Emit(OpCodes.Add));
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}
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public static void Addp_S(AILEmitterCtx Context)
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{
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AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
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EmitVectorExtractZx(Context, Op.Rn, 0, Op.Size);
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EmitVectorExtractZx(Context, Op.Rn, 1, Op.Size);
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Context.Emit(OpCodes.Add);
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EmitScalarSet(Context, Op.Rd, Op.Size);
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}
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public static void Addp_V(AILEmitterCtx Context)
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{
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AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
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int Bytes = Context.CurrOp.GetBitsCount() >> 3;
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int Elems = Bytes >> Op.Size;
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int Half = Elems >> 1;
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for (int Index = 0; Index < Elems; Index++)
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{
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int Elem = (Index & (Half - 1)) << 1;
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EmitVectorExtractZx(Context, Index < Half ? Op.Rn : Op.Rm, Elem + 0, Op.Size);
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EmitVectorExtractZx(Context, Index < Half ? Op.Rn : Op.Rm, Elem + 1, Op.Size);
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Context.Emit(OpCodes.Add);
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EmitVectorInsertTmp(Context, Index, Op.Size);
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}
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Context.EmitLdvectmp();
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Context.EmitStvec(Op.Rd);
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if (Op.RegisterSize == ARegisterSize.SIMD64)
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{
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EmitVectorZeroUpper(Context, Op.Rd);
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}
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}
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public static void Addv_V(AILEmitterCtx Context)
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{
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AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
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int Bytes = Context.CurrOp.GetBitsCount() >> 3;
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EmitVectorExtractZx(Context, Op.Rn, 0, Op.Size);
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for (int Index = 1; Index < (Bytes >> Op.Size); Index++)
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{
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EmitVectorExtractZx(Context, Op.Rn, Index, Op.Size);
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Context.Emit(OpCodes.Add);
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}
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EmitScalarSet(Context, Op.Rd, Op.Size);
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}
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public static void Cnt_V(AILEmitterCtx Context)
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{
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AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
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int Elems = Op.RegisterSize == ARegisterSize.SIMD128 ? 16 : 8;
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for (int Index = 0; Index < Elems; Index++)
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{
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EmitVectorExtractZx(Context, Op.Rn, Index, 0);
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Context.Emit(OpCodes.Conv_U1);
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ASoftFallback.EmitCall(Context, nameof(ASoftFallback.CountSetBits8));
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Context.Emit(OpCodes.Conv_U8);
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EmitVectorInsert(Context, Op.Rd, Index, 0);
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}
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if (Op.RegisterSize == ARegisterSize.SIMD64)
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{
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EmitVectorZeroUpper(Context, Op.Rd);
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}
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}
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public static void Fabd_S(AILEmitterCtx Context)
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{
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EmitScalarBinaryOpF(Context, () =>
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{
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Context.Emit(OpCodes.Sub);
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EmitUnaryMathCall(Context, nameof(Math.Abs));
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});
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}
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public static void Fabs_S(AILEmitterCtx Context)
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{
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EmitScalarUnaryOpF(Context, () =>
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{
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EmitUnaryMathCall(Context, nameof(Math.Abs));
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});
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}
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public static void Fadd_S(AILEmitterCtx Context)
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{
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EmitScalarBinaryOpF(Context, () => Context.Emit(OpCodes.Add));
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}
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public static void Fadd_V(AILEmitterCtx Context)
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{
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EmitVectorBinaryOpF(Context, () => Context.Emit(OpCodes.Add));
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}
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public static void Fdiv_S(AILEmitterCtx Context)
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{
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EmitScalarBinaryOpF(Context, () => Context.Emit(OpCodes.Div));
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}
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public static void Fdiv_V(AILEmitterCtx Context)
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{
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EmitVectorBinaryOpF(Context, () => Context.Emit(OpCodes.Div));
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}
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public static void Fmadd_S(AILEmitterCtx Context)
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{
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EmitScalarTernaryRaOpF(Context, () =>
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{
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Context.Emit(OpCodes.Mul);
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Context.Emit(OpCodes.Add);
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});
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}
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public static void Fmax_S(AILEmitterCtx Context)
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{
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EmitScalarBinaryOpF(Context, () =>
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{
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EmitBinaryMathCall(Context, nameof(Math.Max));
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});
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}
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public static void Fmin_S(AILEmitterCtx Context)
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{
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EmitScalarBinaryOpF(Context, () =>
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{
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EmitBinaryMathCall(Context, nameof(Math.Min));
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});
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}
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public static void Fmaxnm_S(AILEmitterCtx Context)
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{
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Fmax_S(Context);
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}
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public static void Fminnm_S(AILEmitterCtx Context)
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{
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Fmin_S(Context);
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}
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public static void Fmla_V(AILEmitterCtx Context)
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{
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EmitVectorTernaryOpF(Context, () =>
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{
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Context.Emit(OpCodes.Mul);
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Context.Emit(OpCodes.Add);
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});
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}
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public static void Fmla_Ve(AILEmitterCtx Context)
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{
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EmitVectorTernaryOpByElemF(Context, () =>
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{
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Context.Emit(OpCodes.Mul);
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Context.Emit(OpCodes.Add);
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});
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}
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public static void Fmsub_S(AILEmitterCtx Context)
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{
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EmitScalarTernaryRaOpF(Context, () =>
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{
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Context.Emit(OpCodes.Mul);
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Context.Emit(OpCodes.Sub);
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});
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}
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public static void Fmul_S(AILEmitterCtx Context)
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{
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EmitScalarBinaryOpF(Context, () => Context.Emit(OpCodes.Mul));
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}
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public static void Fmul_V(AILEmitterCtx Context)
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{
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EmitVectorBinaryOpF(Context, () => Context.Emit(OpCodes.Mul));
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}
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public static void Fmul_Ve(AILEmitterCtx Context)
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{
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EmitVectorBinaryOpByElemF(Context, () => Context.Emit(OpCodes.Mul));
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}
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public static void Fneg_S(AILEmitterCtx Context)
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{
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EmitScalarUnaryOpF(Context, () => Context.Emit(OpCodes.Neg));
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}
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public static void Fnmul_S(AILEmitterCtx Context)
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{
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EmitScalarBinaryOpF(Context, () =>
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{
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Context.Emit(OpCodes.Mul);
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Context.Emit(OpCodes.Neg);
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});
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}
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public static void Fnmsub_S(AILEmitterCtx Context)
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{
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AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
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int SizeF = Op.Size & 1;
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EmitVectorExtractF(Context, Op.Rn, 0, SizeF);
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EmitVectorExtractF(Context, Op.Rm, 0, SizeF);
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Context.Emit(OpCodes.Mul);
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EmitVectorExtractF(Context, Op.Ra, 0, SizeF);
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Context.Emit(OpCodes.Sub);
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EmitScalarSetF(Context, Op.Rd, SizeF);
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}
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public static void Frinta_S(AILEmitterCtx Context)
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{
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AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
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EmitVectorExtractF(Context, Op.Rn, 0, Op.Size);
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EmitRoundMathCall(Context, MidpointRounding.AwayFromZero);
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EmitScalarSetF(Context, Op.Rd, Op.Size);
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}
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public static void Frintm_S(AILEmitterCtx Context)
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{
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EmitScalarUnaryOpF(Context, () =>
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{
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EmitUnaryMathCall(Context, nameof(Math.Floor));
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});
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}
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public static void Frintm_V(AILEmitterCtx Context)
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{
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EmitVectorUnaryOpF(Context, () =>
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{
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EmitUnaryMathCall(Context, nameof(Math.Floor));
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});
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}
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public static void Frintp_S(AILEmitterCtx Context)
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{
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EmitScalarUnaryOpF(Context, () =>
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{
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EmitUnaryMathCall(Context, nameof(Math.Ceiling));
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});
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}
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public static void Frintx_S(AILEmitterCtx Context)
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{
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AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
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EmitScalarUnaryOpF(Context, () =>
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{
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Context.EmitLdarg(ATranslatedSub.StateArgIdx);
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Context.EmitCallPropGet(typeof(AThreadState), nameof(AThreadState.Fpcr));
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if (Op.Size == 0)
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{
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ASoftFallback.EmitCall(Context, nameof(ASoftFallback.RoundF));
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}
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else if (Op.Size == 1)
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{
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ASoftFallback.EmitCall(Context, nameof(ASoftFallback.Round));
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}
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else
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{
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throw new InvalidOperationException();
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}
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});
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}
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public static void Fsqrt_S(AILEmitterCtx Context)
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{
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EmitScalarUnaryOpF(Context, () =>
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{
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EmitUnaryMathCall(Context, nameof(Math.Sqrt));
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});
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}
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public static void Fsub_S(AILEmitterCtx Context)
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{
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EmitScalarBinaryOpF(Context, () => Context.Emit(OpCodes.Sub));
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}
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public static void Fsub_V(AILEmitterCtx Context)
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{
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EmitVectorBinaryOpF(Context, () => Context.Emit(OpCodes.Sub));
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}
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public static void Mla_V(AILEmitterCtx Context)
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{
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EmitVectorTernaryOpZx(Context, () =>
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{
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Context.Emit(OpCodes.Mul);
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Context.Emit(OpCodes.Add);
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});
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}
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public static void Mls_V(AILEmitterCtx Context)
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{
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EmitVectorTernaryOpZx(Context, () =>
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{
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Context.Emit(OpCodes.Mul);
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Context.Emit(OpCodes.Sub);
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});
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}
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public static void Mul_V(AILEmitterCtx Context)
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{
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EmitVectorBinaryOpZx(Context, () => Context.Emit(OpCodes.Mul));
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}
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public static void Mul_Ve(AILEmitterCtx Context)
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{
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EmitVectorBinaryOpByElemZx(Context, () => Context.Emit(OpCodes.Mul));
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}
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public static void Neg_V(AILEmitterCtx Context)
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{
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EmitVectorUnaryOpSx(Context, () => Context.Emit(OpCodes.Neg));
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}
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public static void Saddw_V(AILEmitterCtx Context)
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{
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EmitVectorWidenRmBinaryOpSx(Context, () => Context.Emit(OpCodes.Add));
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}
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public static void Smax_V(AILEmitterCtx Context)
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{
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Type[] Types = new Type[] { typeof(long), typeof(long) };
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MethodInfo MthdInfo = typeof(Math).GetMethod(nameof(Math.Max), Types);
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EmitVectorBinaryOpSx(Context, () => Context.EmitCall(MthdInfo));
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}
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public static void Smin_V(AILEmitterCtx Context)
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{
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Type[] Types = new Type[] { typeof(long), typeof(long) };
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MethodInfo MthdInfo = typeof(Math).GetMethod(nameof(Math.Min), Types);
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EmitVectorBinaryOpSx(Context, () => Context.EmitCall(MthdInfo));
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}
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public static void Smlal_V(AILEmitterCtx Context)
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{
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EmitVectorWidenRnRmTernaryOpSx(Context, () =>
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{
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Context.Emit(OpCodes.Mul);
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Context.Emit(OpCodes.Add);
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});
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}
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public static void Smull_V(AILEmitterCtx Context)
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{
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EmitVectorWidenRnRmBinaryOpSx(Context, () => Context.Emit(OpCodes.Mul));
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}
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public static void Sub_S(AILEmitterCtx Context)
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{
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EmitScalarBinaryOpZx(Context, () => Context.Emit(OpCodes.Sub));
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}
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public static void Sub_V(AILEmitterCtx Context)
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{
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EmitVectorBinaryOpZx(Context, () => Context.Emit(OpCodes.Sub));
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}
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public static void Uaddlv_V(AILEmitterCtx Context)
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{
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AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
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int Bytes = Context.CurrOp.GetBitsCount() >> 3;
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EmitVectorExtractZx(Context, Op.Rn, 0, Op.Size);
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for (int Index = 1; Index < (Bytes >> Op.Size); Index++)
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{
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EmitVectorExtractZx(Context, Op.Rn, Index, Op.Size);
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Context.Emit(OpCodes.Add);
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}
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EmitScalarSet(Context, Op.Rd, Op.Size + 1);
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}
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public static void Uaddw_V(AILEmitterCtx Context)
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{
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EmitVectorWidenRmBinaryOpZx(Context, () => Context.Emit(OpCodes.Add));
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}
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public static void Umull_V(AILEmitterCtx Context)
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{
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EmitVectorWidenRnRmBinaryOpZx(Context, () => Context.Emit(OpCodes.Mul));
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}
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}
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} |