mirror of
https://github.com/Ryujinx/Ryujinx.git
synced 2024-08-19 15:18:43 +02:00
* Turn `MemoryOperand` into a struct * Remove `IntrinsicOperation` * Remove `PhiNode` * Remove `Node` * Turn `Operand` into a struct * Turn `Operation` into a struct * Clean up pool management methods * Add `Arena` allocator * Move `OperationHelper` to `Operation.Factory` * Move `OperandHelper` to `Operand.Factory` * Optimize `Operation` a bit * Fix `Arena` initialization * Rename `NativeList<T>` to `ArenaList<T>` * Reduce `Operand` size from 88 to 56 bytes * Reduce `Operation` size from 56 to 40 bytes * Add optimistic interning of Register & Constant operands * Optimize `RegisterUsage` pass a bit * Optimize `RemoveUnusedNodes` pass a bit Iterating in reverse-order allows killing dependency chains in a single pass. * Fix PPTC symbols * Optimize `BasicBlock` a bit Reduce allocations from `_successor` & `DominanceFrontiers` * Fix `Operation` resize * Make `Arena` expandable Change the arena allocator to be expandable by allocating in pages, with some of them being pooled. Currently 32 pages are pooled. An LRU removal mechanism should probably be added to it. Apparently MHR can allocate bitmaps large enough to exceed the 16MB limit for the type. * Move `Arena` & `ArenaList` to `Common` * Remove `ThreadStaticPool` & co * Add `PhiOperation` * Reduce `Operand` size from 56 from 48 bytes * Add linear-probing to `Operand` intern table * Optimize `HybridAllocator` a bit * Add `Allocators` class * Tune `ArenaAllocator` sizes * Add page removal mechanism to `ArenaAllocator` Remove pages which have not been used for more than 5s after each reset. I am on fence if this would be better using a Gen2 callback object like the one in System.Buffers.ArrayPool<T>, to trim the pool. Because right now if a large translation happens, the pages will be freed only after a reset. This reset may not happen for a while because no new translation is hit, but the arena base sizes are rather small. * Fix `OOM` when allocating larger than page size in `ArenaAllocator` Tweak resizing mechanism for Operand.Uses and Assignemnts. * Optimize `Optimizer` a bit * Optimize `Operand.Add<T>/Remove<T>` a bit * Clean up `PreAllocator` * Fix phi insertion order Reduce codegen diffs. * Fix code alignment * Use new heuristics for degree of parallelism * Suppress warnings * Address gdkchan's feedback Renamed `GetValue()` to `GetValueUnsafe()` to make it more clear that `Operand.Value` should usually not be modified directly. * Add fast path to `ArenaAllocator` * Assembly for `ArenaAllocator.Allocate(ulong)`: .L0: mov rax, [rcx+0x18] lea r8, [rax+rdx] cmp r8, [rcx+0x10] ja short .L2 .L1: mov rdx, [rcx+8] add rax, [rdx+8] mov [rcx+0x18], r8 ret .L2: jmp ArenaAllocator.AllocateSlow(UInt64) A few variable/field had to be changed to ulong so that RyuJIT avoids emitting zero-extends. * Implement a new heuristic to free pooled pages. If an arena is used often, it is more likely that its pages will be needed, so the pages are kept for longer (e.g: during PPTC rebuild or burst sof compilations). If is not used often, then it is more likely that its pages will not be needed (e.g: after PPTC rebuild or bursts of compilations). * Address riperiperi's feedback * Use `EqualityComparer<T>` in `IntrusiveList<T>` Avoids a potential GC hole in `Equals(T, T)`.
341 lines
12 KiB
C#
341 lines
12 KiB
C#
using ARMeilleure.Decoders;
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using ARMeilleure.IntermediateRepresentation;
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using ARMeilleure.Translation;
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using System;
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using System.Diagnostics;
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using System.Reflection;
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using static ARMeilleure.Instructions.InstEmitHelper;
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using static ARMeilleure.Instructions.InstEmitSimdHelper;
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using static ARMeilleure.Instructions.InstEmitSimdHelper32;
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using static ARMeilleure.IntermediateRepresentation.Operand.Factory;
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namespace ARMeilleure.Instructions
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{
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static partial class InstEmit32
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{
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public static void Vqrshrn(ArmEmitterContext context)
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{
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OpCode32SimdShImm op = (OpCode32SimdShImm)context.CurrOp;
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EmitRoundShrImmSaturatingNarrowOp(context, op.U ? ShrImmSaturatingNarrowFlags.VectorZxZx : ShrImmSaturatingNarrowFlags.VectorSxSx);
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}
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public static void Vqrshrun(ArmEmitterContext context)
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{
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EmitRoundShrImmSaturatingNarrowOp(context, ShrImmSaturatingNarrowFlags.VectorSxZx);
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}
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public static void Vqshrn(ArmEmitterContext context)
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{
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OpCode32SimdShImm op = (OpCode32SimdShImm)context.CurrOp;
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EmitShrImmSaturatingNarrowOp(context, op.U ? ShrImmSaturatingNarrowFlags.VectorZxZx : ShrImmSaturatingNarrowFlags.VectorSxSx);
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}
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public static void Vrshr(ArmEmitterContext context)
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{
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OpCode32SimdShImm op = (OpCode32SimdShImm)context.CurrOp;
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int shift = GetImmShr(op);
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long roundConst = 1L << (shift - 1);
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if (op.U)
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{
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if (op.Size < 2)
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{
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EmitVectorUnaryOpZx32(context, (op1) =>
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{
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op1 = context.Add(op1, Const(op1.Type, roundConst));
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return context.ShiftRightUI(op1, Const(shift));
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});
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}
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else if (op.Size == 2)
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{
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EmitVectorUnaryOpZx32(context, (op1) =>
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{
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op1 = context.ZeroExtend32(OperandType.I64, op1);
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op1 = context.Add(op1, Const(op1.Type, roundConst));
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return context.ConvertI64ToI32(context.ShiftRightUI(op1, Const(shift)));
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});
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}
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else /* if (op.Size == 3) */
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{
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EmitVectorUnaryOpZx32(context, (op1) => EmitShrImm64(context, op1, signed: false, roundConst, shift));
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}
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}
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else
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{
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if (op.Size < 2)
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{
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EmitVectorUnaryOpSx32(context, (op1) =>
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{
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op1 = context.Add(op1, Const(op1.Type, roundConst));
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return context.ShiftRightSI(op1, Const(shift));
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});
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}
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else if (op.Size == 2)
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{
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EmitVectorUnaryOpSx32(context, (op1) =>
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{
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op1 = context.SignExtend32(OperandType.I64, op1);
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op1 = context.Add(op1, Const(op1.Type, roundConst));
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return context.ConvertI64ToI32(context.ShiftRightSI(op1, Const(shift)));
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});
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}
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else /* if (op.Size == 3) */
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{
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EmitVectorUnaryOpZx32(context, (op1) => EmitShrImm64(context, op1, signed: true, roundConst, shift));
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}
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}
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}
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public static void Vshl(ArmEmitterContext context)
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{
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OpCode32SimdShImm op = (OpCode32SimdShImm)context.CurrOp;
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EmitVectorUnaryOpZx32(context, (op1) => context.ShiftLeft(op1, Const(op.Shift)));
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}
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public static void Vshl_I(ArmEmitterContext context)
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{
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OpCode32SimdReg op = (OpCode32SimdReg)context.CurrOp;
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if (op.U)
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{
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EmitVectorBinaryOpZx32(context, (op1, op2) => EmitShlRegOp(context, op2, op1, op.Size, true));
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}
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else
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{
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EmitVectorBinaryOpSx32(context, (op1, op2) => EmitShlRegOp(context, op2, op1, op.Size, false));
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}
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}
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public static void Vshll(ArmEmitterContext context)
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{
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OpCode32SimdShImmLong op = (OpCode32SimdShImmLong)context.CurrOp;
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Operand res = context.VectorZero();
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int elems = op.GetBytesCount() >> op.Size;
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for (int index = 0; index < elems; index++)
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{
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Operand me = EmitVectorExtract32(context, op.Qm, op.Im + index, op.Size, !op.U);
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if (op.Size == 2)
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{
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if (op.U)
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{
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me = context.ZeroExtend32(OperandType.I64, me);
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}
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else
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{
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me = context.SignExtend32(OperandType.I64, me);
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}
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}
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me = context.ShiftLeft(me, Const(op.Shift));
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res = EmitVectorInsert(context, res, me, index, op.Size + 1);
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}
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context.Copy(GetVecA32(op.Qd), res);
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}
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public static void Vshr(ArmEmitterContext context)
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{
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OpCode32SimdShImm op = (OpCode32SimdShImm)context.CurrOp;
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int shift = GetImmShr(op);
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int maxShift = (8 << op.Size) - 1;
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if (op.U)
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{
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EmitVectorUnaryOpZx32(context, (op1) => (shift > maxShift) ? Const(op1.Type, 0) : context.ShiftRightUI(op1, Const(shift)));
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}
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else
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{
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EmitVectorUnaryOpSx32(context, (op1) => context.ShiftRightSI(op1, Const(Math.Min(maxShift, shift))));
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}
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}
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public static void Vshrn(ArmEmitterContext context)
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{
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OpCode32SimdShImm op = (OpCode32SimdShImm)context.CurrOp;
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int shift = GetImmShr(op);
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EmitVectorUnaryNarrowOp32(context, (op1) => context.ShiftRightUI(op1, Const(shift)));
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}
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public static void Vsra(ArmEmitterContext context)
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{
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OpCode32SimdShImm op = (OpCode32SimdShImm)context.CurrOp;
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int shift = GetImmShr(op);
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int maxShift = (8 << op.Size) - 1;
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if (op.U)
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{
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EmitVectorImmBinaryQdQmOpZx32(context, (op1, op2) =>
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{
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Operand shiftRes = shift > maxShift ? Const(op2.Type, 0) : context.ShiftRightUI(op2, Const(shift));
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return context.Add(op1, shiftRes);
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});
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}
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else
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{
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EmitVectorImmBinaryQdQmOpSx32(context, (op1, op2) => context.Add(op1, context.ShiftRightSI(op2, Const(Math.Min(maxShift, shift)))));
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}
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}
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private static Operand EmitShlRegOp(ArmEmitterContext context, Operand op, Operand shiftLsB, int size, bool unsigned)
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{
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if (shiftLsB.Type == OperandType.I64)
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{
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shiftLsB = context.ConvertI64ToI32(shiftLsB);
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}
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shiftLsB = context.SignExtend8(OperandType.I32, shiftLsB);
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Debug.Assert((uint)size < 4u);
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Operand negShiftLsB = context.Negate(shiftLsB);
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Operand isPositive = context.ICompareGreaterOrEqual(shiftLsB, Const(0));
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Operand shl = context.ShiftLeft(op, shiftLsB);
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Operand shr = unsigned ? context.ShiftRightUI(op, negShiftLsB) : context.ShiftRightSI(op, negShiftLsB);
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Operand res = context.ConditionalSelect(isPositive, shl, shr);
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if (unsigned)
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{
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Operand isOutOfRange = context.BitwiseOr(
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context.ICompareGreaterOrEqual(shiftLsB, Const(8 << size)),
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context.ICompareGreaterOrEqual(negShiftLsB, Const(8 << size)));
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return context.ConditionalSelect(isOutOfRange, Const(op.Type, 0), res);
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}
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else
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{
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Operand isOutOfRange0 = context.ICompareGreaterOrEqual(shiftLsB, Const(8 << size));
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Operand isOutOfRangeN = context.ICompareGreaterOrEqual(negShiftLsB, Const(8 << size));
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// Also zero if shift is too negative, but value was positive.
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isOutOfRange0 = context.BitwiseOr(isOutOfRange0, context.BitwiseAnd(isOutOfRangeN, context.ICompareGreaterOrEqual(op, Const(op.Type, 0))));
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Operand min = (op.Type == OperandType.I64) ? Const(-1L) : Const(-1);
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return context.ConditionalSelect(isOutOfRange0, Const(op.Type, 0), context.ConditionalSelect(isOutOfRangeN, min, res));
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}
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}
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[Flags]
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private enum ShrImmSaturatingNarrowFlags
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{
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Scalar = 1 << 0,
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SignedSrc = 1 << 1,
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SignedDst = 1 << 2,
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Round = 1 << 3,
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ScalarSxSx = Scalar | SignedSrc | SignedDst,
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ScalarSxZx = Scalar | SignedSrc,
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ScalarZxZx = Scalar,
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VectorSxSx = SignedSrc | SignedDst,
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VectorSxZx = SignedSrc,
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VectorZxZx = 0
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}
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private static void EmitRoundShrImmSaturatingNarrowOp(ArmEmitterContext context, ShrImmSaturatingNarrowFlags flags)
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{
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EmitShrImmSaturatingNarrowOp(context, ShrImmSaturatingNarrowFlags.Round | flags);
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}
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private static void EmitShrImmSaturatingNarrowOp(ArmEmitterContext context, ShrImmSaturatingNarrowFlags flags)
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{
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OpCode32SimdShImm op = (OpCode32SimdShImm)context.CurrOp;
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bool scalar = (flags & ShrImmSaturatingNarrowFlags.Scalar) != 0;
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bool signedSrc = (flags & ShrImmSaturatingNarrowFlags.SignedSrc) != 0;
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bool signedDst = (flags & ShrImmSaturatingNarrowFlags.SignedDst) != 0;
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bool round = (flags & ShrImmSaturatingNarrowFlags.Round) != 0;
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if (scalar)
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{
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// TODO: Support scalar operation.
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throw new NotImplementedException();
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}
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int shift = GetImmShr(op);
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long roundConst = 1L << (shift - 1);
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EmitVectorUnaryNarrowOp32(context, (op1) =>
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{
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if (op.Size <= 1 || !round)
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{
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if (round)
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{
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op1 = context.Add(op1, Const(op1.Type, roundConst));
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}
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op1 = signedSrc ? context.ShiftRightSI(op1, Const(shift)) : context.ShiftRightUI(op1, Const(shift));
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}
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else /* if (op.Size == 2 && round) */
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{
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op1 = EmitShrImm64(context, op1, signedSrc, roundConst, shift); // shift <= 32
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}
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return EmitSatQ(context, op1, 8 << op.Size, signedDst);
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}, signedSrc);
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}
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private static int GetImmShr(OpCode32SimdShImm op)
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{
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return (8 << op.Size) - op.Shift; // Shr amount is flipped.
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}
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// dst64 = (Int(src64, signed) + roundConst) >> shift;
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private static Operand EmitShrImm64(
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ArmEmitterContext context,
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Operand value,
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bool signed,
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long roundConst,
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int shift)
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{
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MethodInfo info = signed
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? typeof(SoftFallback).GetMethod(nameof(SoftFallback.SignedShrImm64))
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: typeof(SoftFallback).GetMethod(nameof(SoftFallback.UnsignedShrImm64));
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return context.Call(info, value, Const(roundConst), Const(shift));
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}
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private static Operand EmitSatQ(ArmEmitterContext context, Operand value, int eSize, bool signed)
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{
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Debug.Assert(eSize <= 32);
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long intMin = signed ? -(1L << (eSize - 1)) : 0;
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long intMax = signed ? (1L << (eSize - 1)) - 1 : (1L << eSize) - 1;
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Operand gt = context.ICompareGreater(value, Const(value.Type, intMax));
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Operand lt = context.ICompareLess(value, Const(value.Type, intMin));
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value = context.ConditionalSelect(gt, Const(value.Type, intMax), value);
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value = context.ConditionalSelect(lt, Const(value.Type, intMin), value);
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Operand lblNoSat = Label();
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context.BranchIfFalse(lblNoSat, context.BitwiseOr(gt, lt));
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context.Call(typeof(NativeInterface).GetMethod(nameof(NativeInterface.SetFpsrQc)));
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context.MarkLabel(lblNoSat);
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return value;
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}
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}
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}
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