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Ryujinx/ARMeilleure/Instructions
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LDj3SNuD 7baa08dcb4
Implemented in IR the managed methods of the Saturating region ... (#3665) 
* Implemented in IR the managed methods of the Saturating region ...

... of the SoftFallback class (the SatQ ones).

The need to natively manage the Fpcr and Fpsr system registers is still a fact.

Contributes to https://github.com/Ryujinx/Ryujinx/issues/2917 ; I will open another PR to implement in Intrinsics-branchless the methods of the Saturation region as well (the SatXXXToXXX ones).

All instructions involved have been tested locally in both release and debug modes, in both lowcq and highcq.

* Ptc.InternalVersion = 3665

* Addressed PR feedback.
2022-09-08 19:40:41 -03:00
..
CryptoHelper.cs Use ReadOnlySpan<byte> compiler optimization for static data (#3130) 2022-02-17 21:38:50 +01:00
InstEmitAlu.cs Reduce JIT GC allocations (#2515) 2021-08-17 15:08:34 -03:00
InstEmitAlu32.cs T32: Implement ALU (shifted register) instructions (#3135) 2022-02-22 19:11:28 -03:00
InstEmitAluHelper.cs A32: Fix ALU immediate instructions (#3179) 2022-03-05 15:23:10 -03:00
InstEmitBfm.cs Reduce JIT GC allocations (#2515) 2021-08-17 15:08:34 -03:00
InstEmitCcmp.cs Reduce JIT GC allocations (#2515) 2021-08-17 15:08:34 -03:00
InstEmitCsel.cs Reduce JIT GC allocations (#2515) 2021-08-17 15:08:34 -03:00
InstEmitDiv.cs Reduce JIT GC allocations (#2515) 2021-08-17 15:08:34 -03:00
InstEmitException.cs Decoder: Exit on trapping instructions, and resume execution at trapping instruction (#3153) 2022-03-04 23:16:58 +01:00
InstEmitException32.cs Removed unused usings. (#3593) 2022-08-18 18:04:54 +02:00
InstEmitFlow.cs Reduce JIT GC allocations (#2515) 2021-08-17 15:08:34 -03:00
InstEmitFlow32.cs Implement some 32-bit Thumb instructions (#3614) 2022-08-25 09:59:34 +00:00
InstEmitFlowHelper.cs Fix return type mismatch on 32-bit titles (#3000) 2022-01-16 08:39:43 -03:00
InstEmitHash.cs Add SSE4.2 Path for CRC32, add A32 variant, add tests for non-castagnoli variants. (#1328) 2020-07-13 20:48:14 +10:00
InstEmitHash32.cs Add SSE4.2 Path for CRC32, add A32 variant, add tests for non-castagnoli variants. (#1328) 2020-07-13 20:48:14 +10:00
InstEmitHashHelper.cs Reduce JIT GC allocations (#2515) 2021-08-17 15:08:34 -03:00
InstEmitHelper.cs T32: Implement B, B.cond, BL, BLX (#3155) 2022-03-04 23:05:08 +01:00
InstEmitMemory.cs Fix return type mismatch on 32-bit titles (#3000) 2022-01-16 08:39:43 -03:00
InstEmitMemory32.cs ARMeilleure: Thumb support (All T16 instructions) (#3105) 2022-02-17 19:39:45 -03:00
InstEmitMemoryEx.cs InstEmitMemoryEx: Barrier after write on ordered store (#3193) 2022-03-19 10:32:35 -03:00
InstEmitMemoryEx32.cs InstEmitMemoryEx: Barrier after write on ordered store (#3193) 2022-03-19 10:32:35 -03:00
InstEmitMemoryExHelper.cs Reduce JIT GC allocations (#2515) 2021-08-17 15:08:34 -03:00
InstEmitMemoryHelper.cs Implement some 32-bit Thumb instructions (#3614) 2022-08-25 09:59:34 +00:00
InstEmitMove.cs Reduce JIT GC allocations (#2515) 2021-08-17 15:08:34 -03:00
InstEmitMul.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
InstEmitMul32.cs ARMeilleure: Thumb support (All T16 instructions) (#3105) 2022-02-17 19:39:45 -03:00
InstEmitSimdArithmetic.cs Fix small precision error on CPU reciprocal estimate instructions (#3061) 2022-01-29 23:59:34 +01:00
InstEmitSimdArithmetic32.cs Removed unused usings. (#3593) 2022-08-18 18:04:54 +02:00
InstEmitSimdCmp.cs Reduce JIT GC allocations (#2515) 2021-08-17 15:08:34 -03:00
InstEmitSimdCmp32.cs Reduce JIT GC allocations (#2515) 2021-08-17 15:08:34 -03:00
InstEmitSimdCrypto.cs Add Profiled Persistent Translation Cache. (#769) 2020-06-16 20:28:02 +02:00
InstEmitSimdCrypto32.cs Add Profiled Persistent Translation Cache. (#769) 2020-06-16 20:28:02 +02:00
InstEmitSimdCvt.cs Implement CPU FCVT Half <-> Double conversion variants (#3439) 2022-07-06 13:40:31 +02:00
InstEmitSimdCvt32.cs Reduce JIT GC allocations (#2515) 2021-08-17 15:08:34 -03:00
InstEmitSimdHash.cs ARMeilleure: Hardware accelerate SHA256 (#3585) 2022-08-25 10:12:13 +00:00
InstEmitSimdHash32.cs ARMeilleure: Hardware accelerate SHA256 (#3585) 2022-08-25 10:12:13 +00:00
InstEmitSimdHashHelper.cs ARMeilleure: Hardware accelerate SHA256 (#3585) 2022-08-25 10:12:13 +00:00
InstEmitSimdHelper.cs Implemented in IR the managed methods of the Saturating region ... (#3665) 2022-09-08 19:40:41 -03:00
InstEmitSimdHelper32.cs Reduce JIT GC allocations (#2515) 2021-08-17 15:08:34 -03:00
InstEmitSimdLogical.cs Reduce JIT GC allocations (#2515) 2021-08-17 15:08:34 -03:00
InstEmitSimdLogical32.cs Reduce JIT GC allocations (#2515) 2021-08-17 15:08:34 -03:00
InstEmitSimdMemory.cs Reduce JIT GC allocations (#2515) 2021-08-17 15:08:34 -03:00
InstEmitSimdMemory32.cs Implement CSDB instruction (#2927) 2021-12-19 11:19:05 -03:00
InstEmitSimdMove.cs Reduce JIT GC allocations (#2515) 2021-08-17 15:08:34 -03:00
InstEmitSimdMove32.cs Reduce JIT GC allocations (#2515) 2021-08-17 15:08:34 -03:00
InstEmitSimdShift.cs Implemented in IR the managed methods of the Saturating region ... (#3665) 2022-09-08 19:40:41 -03:00
InstEmitSimdShift32.cs Reduce JIT GC allocations (#2515) 2021-08-17 15:08:34 -03:00
InstEmitSystem.cs Refactor CPU interface to allow the implementation of other CPU emulators (#3362) 2022-05-31 16:29:35 -03:00
InstEmitSystem32.cs Implement Arm32 Sha256 and MRS Rd, CPSR instructions (#3544) 2022-08-05 19:03:50 +02:00
InstName.cs ARMeilleure: Thumb support (All T16 instructions) (#3105) 2022-02-17 19:39:45 -03:00
NativeInterface.cs Removed unused usings. (#3593) 2022-08-18 18:04:54 +02:00
SoftFallback.cs Implemented in IR the managed methods of the Saturating region ... (#3665) 2022-09-08 19:40:41 -03:00
SoftFloat.cs Implement CPU FCVT Half <-> Double conversion variants (#3439) 2022-07-06 13:40:31 +02:00