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https://github.com/Ryujinx/Ryujinx.git
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* Turn `MemoryOperand` into a struct * Remove `IntrinsicOperation` * Remove `PhiNode` * Remove `Node` * Turn `Operand` into a struct * Turn `Operation` into a struct * Clean up pool management methods * Add `Arena` allocator * Move `OperationHelper` to `Operation.Factory` * Move `OperandHelper` to `Operand.Factory` * Optimize `Operation` a bit * Fix `Arena` initialization * Rename `NativeList<T>` to `ArenaList<T>` * Reduce `Operand` size from 88 to 56 bytes * Reduce `Operation` size from 56 to 40 bytes * Add optimistic interning of Register & Constant operands * Optimize `RegisterUsage` pass a bit * Optimize `RemoveUnusedNodes` pass a bit Iterating in reverse-order allows killing dependency chains in a single pass. * Fix PPTC symbols * Optimize `BasicBlock` a bit Reduce allocations from `_successor` & `DominanceFrontiers` * Fix `Operation` resize * Make `Arena` expandable Change the arena allocator to be expandable by allocating in pages, with some of them being pooled. Currently 32 pages are pooled. An LRU removal mechanism should probably be added to it. Apparently MHR can allocate bitmaps large enough to exceed the 16MB limit for the type. * Move `Arena` & `ArenaList` to `Common` * Remove `ThreadStaticPool` & co * Add `PhiOperation` * Reduce `Operand` size from 56 from 48 bytes * Add linear-probing to `Operand` intern table * Optimize `HybridAllocator` a bit * Add `Allocators` class * Tune `ArenaAllocator` sizes * Add page removal mechanism to `ArenaAllocator` Remove pages which have not been used for more than 5s after each reset. I am on fence if this would be better using a Gen2 callback object like the one in System.Buffers.ArrayPool<T>, to trim the pool. Because right now if a large translation happens, the pages will be freed only after a reset. This reset may not happen for a while because no new translation is hit, but the arena base sizes are rather small. * Fix `OOM` when allocating larger than page size in `ArenaAllocator` Tweak resizing mechanism for Operand.Uses and Assignemnts. * Optimize `Optimizer` a bit * Optimize `Operand.Add<T>/Remove<T>` a bit * Clean up `PreAllocator` * Fix phi insertion order Reduce codegen diffs. * Fix code alignment * Use new heuristics for degree of parallelism * Suppress warnings * Address gdkchan's feedback Renamed `GetValue()` to `GetValueUnsafe()` to make it more clear that `Operand.Value` should usually not be modified directly. * Add fast path to `ArenaAllocator` * Assembly for `ArenaAllocator.Allocate(ulong)`: .L0: mov rax, [rcx+0x18] lea r8, [rax+rdx] cmp r8, [rcx+0x10] ja short .L2 .L1: mov rdx, [rcx+8] add rax, [rdx+8] mov [rcx+0x18], r8 ret .L2: jmp ArenaAllocator.AllocateSlow(UInt64) A few variable/field had to be changed to ulong so that RyuJIT avoids emitting zero-extends. * Implement a new heuristic to free pooled pages. If an arena is used often, it is more likely that its pages will be needed, so the pages are kept for longer (e.g: during PPTC rebuild or burst sof compilations). If is not used often, then it is more likely that its pages will not be needed (e.g: after PPTC rebuild or bursts of compilations). * Address riperiperi's feedback * Use `EqualityComparer<T>` in `IntrusiveList<T>` Avoids a potential GC hole in `Equals(T, T)`.
120 lines
5.4 KiB
C#
120 lines
5.4 KiB
C#
// https://www.intel.com/content/dam/www/public/us/en/documents/white-papers/fast-crc-computation-generic-polynomials-pclmulqdq-paper.pdf
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using ARMeilleure.IntermediateRepresentation;
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using ARMeilleure.Translation;
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using System;
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using System.Diagnostics;
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using static ARMeilleure.IntermediateRepresentation.Operand.Factory;
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using static ARMeilleure.Instructions.InstEmitSimdHelper;
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namespace ARMeilleure.Instructions
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{
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static class InstEmitHashHelper
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{
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public const uint Crc32RevPoly = 0xedb88320;
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public const uint Crc32cRevPoly = 0x82f63b78;
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public static Operand EmitCrc32(ArmEmitterContext context, Operand crc, Operand value, int size, bool castagnoli)
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{
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Debug.Assert(crc.Type.IsInteger() && value.Type.IsInteger());
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Debug.Assert(size >= 0 && size < 4);
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Debug.Assert((size < 3) || (value.Type == OperandType.I64));
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if (castagnoli && Optimizations.UseSse42)
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{
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// The CRC32 instruction does not have an immediate variant, so ensure both inputs are in registers.
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value = (value.Kind == OperandKind.Constant) ? context.Copy(value) : value;
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crc = (crc.Kind == OperandKind.Constant) ? context.Copy(crc) : crc;
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Intrinsic op = size switch
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{
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0 => Intrinsic.X86Crc32_8,
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1 => Intrinsic.X86Crc32_16,
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_ => Intrinsic.X86Crc32,
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};
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return (size == 3) ? context.ConvertI64ToI32(context.AddIntrinsicLong(op, crc, value)) : context.AddIntrinsicInt(op, crc, value);
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}
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else if (Optimizations.UsePclmulqdq)
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{
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return size switch
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{
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3 => EmitCrc32Optimized64(context, crc, value, castagnoli),
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_ => EmitCrc32Optimized(context, crc, value, castagnoli, size),
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};
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}
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else
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{
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string name = (size, castagnoli) switch
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{
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(0, false) => nameof(SoftFallback.Crc32b),
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(1, false) => nameof(SoftFallback.Crc32h),
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(2, false) => nameof(SoftFallback.Crc32w),
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(3, false) => nameof(SoftFallback.Crc32x),
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(0, true) => nameof(SoftFallback.Crc32cb),
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(1, true) => nameof(SoftFallback.Crc32ch),
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(2, true) => nameof(SoftFallback.Crc32cw),
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(3, true) => nameof(SoftFallback.Crc32cx),
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_ => throw new ArgumentOutOfRangeException(nameof(size))
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};
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return context.Call(typeof(SoftFallback).GetMethod(name), crc, value);
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}
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}
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private static Operand EmitCrc32Optimized(ArmEmitterContext context, Operand crc, Operand data, bool castagnoli, int size)
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{
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long mu = castagnoli ? 0x0DEA713F1 : 0x1F7011641; // mu' = floor(x^64/P(x))'
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long polynomial = castagnoli ? 0x105EC76F0 : 0x1DB710641; // P'(x) << 1
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crc = context.VectorInsert(context.VectorZero(), crc, 0);
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switch (size)
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{
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case 0: data = context.VectorInsert8(context.VectorZero(), data, 0); break;
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case 1: data = context.VectorInsert16(context.VectorZero(), data, 0); break;
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case 2: data = context.VectorInsert(context.VectorZero(), data, 0); break;
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}
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int bitsize = 8 << size;
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Operand tmp = context.AddIntrinsic(Intrinsic.X86Pxor, crc, data);
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tmp = context.AddIntrinsic(Intrinsic.X86Psllq, tmp, Const(64 - bitsize));
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tmp = context.AddIntrinsic(Intrinsic.X86Pclmulqdq, tmp, X86GetScalar(context, mu), Const(0));
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tmp = context.AddIntrinsic(Intrinsic.X86Pclmulqdq, tmp, X86GetScalar(context, polynomial), Const(0));
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if (bitsize < 32)
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{
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crc = context.AddIntrinsic(Intrinsic.X86Pslldq, crc, Const((64 - bitsize) / 8));
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tmp = context.AddIntrinsic(Intrinsic.X86Pxor, tmp, crc);
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}
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return context.VectorExtract(OperandType.I32, tmp, 2);
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}
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private static Operand EmitCrc32Optimized64(ArmEmitterContext context, Operand crc, Operand data, bool castagnoli)
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{
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long mu = castagnoli ? 0x0DEA713F1 : 0x1F7011641; // mu' = floor(x^64/P(x))'
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long polynomial = castagnoli ? 0x105EC76F0 : 0x1DB710641; // P'(x) << 1
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crc = context.VectorInsert(context.VectorZero(), crc, 0);
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data = context.VectorInsert(context.VectorZero(), data, 0);
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Operand tmp = context.AddIntrinsic(Intrinsic.X86Pxor, crc, data);
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Operand res = context.AddIntrinsic(Intrinsic.X86Pslldq, tmp, Const(4));
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tmp = context.AddIntrinsic(Intrinsic.X86Pclmulqdq, res, X86GetScalar(context, mu), Const(0));
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tmp = context.AddIntrinsic(Intrinsic.X86Pclmulqdq, tmp, X86GetScalar(context, polynomial), Const(0));
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tmp = context.AddIntrinsic(Intrinsic.X86Pxor, tmp, res);
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tmp = context.AddIntrinsic(Intrinsic.X86Psllq, tmp, Const(32));
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tmp = context.AddIntrinsic(Intrinsic.X86Pclmulqdq, tmp, X86GetScalar(context, mu), Const(1));
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tmp = context.AddIntrinsic(Intrinsic.X86Pclmulqdq, tmp, X86GetScalar(context, polynomial), Const(0));
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return context.VectorExtract(OperandType.I32, tmp, 2);
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}
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}
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}
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