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* ARMeilleure: Move TPIDR_EL0 and TPIDRRO_EL0 to NativeContext Some games access these system registers several tens of thousands of times in a second from many different threads. While this isn't really crippling, it is a lot of wasted time spent in a reverse pinvoke transition. Example games are Pokemon Scarlet/Violet and BOTW. These games have a lot of different potential bottlenecks so it's unlikely you will see a consistent improvement, but it definitely disappears from the cpu profile. * Remove unreachable code. * Add ulong conversion for offsets * Nit
249 lines
9.3 KiB
C#
249 lines
9.3 KiB
C#
using ARMeilleure.Decoders;
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using ARMeilleure.IntermediateRepresentation;
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using ARMeilleure.State;
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using ARMeilleure.Translation;
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using System;
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using System.Reflection;
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using static ARMeilleure.Instructions.InstEmitHelper;
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using static ARMeilleure.IntermediateRepresentation.Operand.Factory;
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namespace ARMeilleure.Instructions
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{
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static partial class InstEmit
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{
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private const int DczSizeLog2 = 4; // Log2 size in words
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public const int DczSizeInBytes = 4 << DczSizeLog2;
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public static void Isb(ArmEmitterContext context)
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{
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// Execute as no-op.
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}
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public static void Mrs(ArmEmitterContext context)
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{
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OpCodeSystem op = (OpCodeSystem)context.CurrOp;
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MethodInfo info;
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switch (GetPackedId(op))
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{
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case 0b11_011_0000_0000_001: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.GetCtrEl0)); break;
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case 0b11_011_0000_0000_111: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.GetDczidEl0)); break;
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case 0b11_011_0100_0010_000: EmitGetNzcv(context); return;
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case 0b11_011_0100_0100_000: EmitGetFpcr(context); return;
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case 0b11_011_0100_0100_001: EmitGetFpsr(context); return;
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case 0b11_011_1101_0000_010: EmitGetTpidrEl0(context); return;
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case 0b11_011_1101_0000_011: EmitGetTpidrroEl0(context); return;
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case 0b11_011_1110_0000_000: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.GetCntfrqEl0)); break;
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case 0b11_011_1110_0000_001: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.GetCntpctEl0)); break;
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case 0b11_011_1110_0000_010: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.GetCntvctEl0)); break;
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default: throw new NotImplementedException($"Unknown MRS 0x{op.RawOpCode:X8} at 0x{op.Address:X16}.");
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}
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SetIntOrZR(context, op.Rt, context.Call(info));
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}
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public static void Msr(ArmEmitterContext context)
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{
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OpCodeSystem op = (OpCodeSystem)context.CurrOp;
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switch (GetPackedId(op))
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{
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case 0b11_011_0100_0010_000: EmitSetNzcv(context); return;
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case 0b11_011_0100_0100_000: EmitSetFpcr(context); return;
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case 0b11_011_0100_0100_001: EmitSetFpsr(context); return;
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case 0b11_011_1101_0000_010: EmitSetTpidrEl0(context); return;
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default: throw new NotImplementedException($"Unknown MSR 0x{op.RawOpCode:X8} at 0x{op.Address:X16}.");
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}
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}
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public static void Nop(ArmEmitterContext context)
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{
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// Do nothing.
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}
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public static void Sys(ArmEmitterContext context)
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{
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// This instruction is used to do some operations on the CPU like cache invalidation,
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// address translation and the like.
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// We treat it as no-op here since we don't have any cache being emulated anyway.
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OpCodeSystem op = (OpCodeSystem)context.CurrOp;
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switch (GetPackedId(op))
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{
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case 0b11_011_0111_0100_001:
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{
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// DC ZVA
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Operand t = GetIntOrZR(context, op.Rt);
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for (long offset = 0; offset < DczSizeInBytes; offset += 8)
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{
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Operand address = context.Add(t, Const(offset));
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InstEmitMemoryHelper.EmitStore(context, address, RegisterConsts.ZeroIndex, 3);
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}
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break;
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}
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// No-op
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case 0b11_011_0111_1110_001: // DC CIVAC
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break;
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case 0b11_011_0111_0101_001: // IC IVAU
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Operand target = Register(op.Rt, RegisterType.Integer, OperandType.I64);
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context.Call(typeof(NativeInterface).GetMethod(nameof(NativeInterface.InvalidateCacheLine)), target);
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break;
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}
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}
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private static int GetPackedId(OpCodeSystem op)
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{
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int id;
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id = op.Op2 << 0;
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id |= op.CRm << 3;
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id |= op.CRn << 7;
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id |= op.Op1 << 11;
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id |= op.Op0 << 14;
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return id;
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}
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private static void EmitGetNzcv(ArmEmitterContext context)
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{
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OpCodeSystem op = (OpCodeSystem)context.CurrOp;
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Operand nzcv = context.ShiftLeft(GetFlag(PState.VFlag), Const((int)PState.VFlag));
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nzcv = context.BitwiseOr(nzcv, context.ShiftLeft(GetFlag(PState.CFlag), Const((int)PState.CFlag)));
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nzcv = context.BitwiseOr(nzcv, context.ShiftLeft(GetFlag(PState.ZFlag), Const((int)PState.ZFlag)));
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nzcv = context.BitwiseOr(nzcv, context.ShiftLeft(GetFlag(PState.NFlag), Const((int)PState.NFlag)));
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SetIntOrZR(context, op.Rt, nzcv);
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}
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private static void EmitGetFpcr(ArmEmitterContext context)
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{
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OpCodeSystem op = (OpCodeSystem)context.CurrOp;
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Operand fpcr = Const(0);
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for (int flag = 0; flag < RegisterConsts.FpFlagsCount; flag++)
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{
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if (FPCR.Mask.HasFlag((FPCR)(1u << flag)))
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{
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fpcr = context.BitwiseOr(fpcr, context.ShiftLeft(GetFpFlag((FPState)flag), Const(flag)));
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}
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}
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SetIntOrZR(context, op.Rt, fpcr);
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}
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private static void EmitGetFpsr(ArmEmitterContext context)
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{
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OpCodeSystem op = (OpCodeSystem)context.CurrOp;
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context.SyncQcFlag();
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Operand fpsr = Const(0);
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for (int flag = 0; flag < RegisterConsts.FpFlagsCount; flag++)
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{
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if (FPSR.Mask.HasFlag((FPSR)(1u << flag)))
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{
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fpsr = context.BitwiseOr(fpsr, context.ShiftLeft(GetFpFlag((FPState)flag), Const(flag)));
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}
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}
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SetIntOrZR(context, op.Rt, fpsr);
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}
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private static void EmitGetTpidrEl0(ArmEmitterContext context)
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{
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OpCodeSystem op = (OpCodeSystem)context.CurrOp;
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Operand nativeContext = context.LoadArgument(OperandType.I64, 0);
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Operand result = context.Load(OperandType.I64, context.Add(nativeContext, Const((ulong)NativeContext.GetTpidrEl0Offset())));
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SetIntOrZR(context, op.Rt, result);
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}
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private static void EmitGetTpidrroEl0(ArmEmitterContext context)
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{
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OpCodeSystem op = (OpCodeSystem)context.CurrOp;
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Operand nativeContext = context.LoadArgument(OperandType.I64, 0);
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Operand result = context.Load(OperandType.I64, context.Add(nativeContext, Const((ulong)NativeContext.GetTpidrroEl0Offset())));
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SetIntOrZR(context, op.Rt, result);
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}
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private static void EmitSetNzcv(ArmEmitterContext context)
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{
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OpCodeSystem op = (OpCodeSystem)context.CurrOp;
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Operand nzcv = GetIntOrZR(context, op.Rt);
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nzcv = context.ConvertI64ToI32(nzcv);
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SetFlag(context, PState.VFlag, context.BitwiseAnd(context.ShiftRightUI(nzcv, Const((int)PState.VFlag)), Const(1)));
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SetFlag(context, PState.CFlag, context.BitwiseAnd(context.ShiftRightUI(nzcv, Const((int)PState.CFlag)), Const(1)));
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SetFlag(context, PState.ZFlag, context.BitwiseAnd(context.ShiftRightUI(nzcv, Const((int)PState.ZFlag)), Const(1)));
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SetFlag(context, PState.NFlag, context.BitwiseAnd(context.ShiftRightUI(nzcv, Const((int)PState.NFlag)), Const(1)));
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}
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private static void EmitSetFpcr(ArmEmitterContext context)
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{
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OpCodeSystem op = (OpCodeSystem)context.CurrOp;
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Operand fpcr = GetIntOrZR(context, op.Rt);
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fpcr = context.ConvertI64ToI32(fpcr);
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for (int flag = 0; flag < RegisterConsts.FpFlagsCount; flag++)
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{
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if (FPCR.Mask.HasFlag((FPCR)(1u << flag)))
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{
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SetFpFlag(context, (FPState)flag, context.BitwiseAnd(context.ShiftRightUI(fpcr, Const(flag)), Const(1)));
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}
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}
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context.UpdateArmFpMode();
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}
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private static void EmitSetFpsr(ArmEmitterContext context)
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{
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OpCodeSystem op = (OpCodeSystem)context.CurrOp;
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context.ClearQcFlagIfModified();
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Operand fpsr = GetIntOrZR(context, op.Rt);
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fpsr = context.ConvertI64ToI32(fpsr);
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for (int flag = 0; flag < RegisterConsts.FpFlagsCount; flag++)
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{
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if (FPSR.Mask.HasFlag((FPSR)(1u << flag)))
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{
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SetFpFlag(context, (FPState)flag, context.BitwiseAnd(context.ShiftRightUI(fpsr, Const(flag)), Const(1)));
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}
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}
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context.UpdateArmFpMode();
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}
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private static void EmitSetTpidrEl0(ArmEmitterContext context)
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{
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OpCodeSystem op = (OpCodeSystem)context.CurrOp;
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Operand value = GetIntOrZR(context, op.Rt);
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Operand nativeContext = context.LoadArgument(OperandType.I64, 0);
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context.Store(context.Add(nativeContext, Const((ulong)NativeContext.GetTpidrEl0Offset())), value);
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}
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}
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}
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