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* Refactor CPU interface * Use IExecutionContext interface on SVC handler, change how CPU interrupts invokes the handlers * Make CpuEngine take a ITickSource rather than returning one The previous implementation had the scenario where the CPU engine had to implement the tick source in mind, like for example, when we have a hypervisor and the game can read CNTPCT on the host directly. However given that we need to do conversion due to different frequencies anyway, it's not worth it. It's better to just let the user pass the tick source and redirect any reads to CNTPCT to the user tick source * XML docs for the public interfaces * PPTC invalidation due to NativeInterface function name changes * Fix build of the CPU tests * PR feedback
65 lines
2.9 KiB
C#
65 lines
2.9 KiB
C#
namespace Ryujinx.Cpu
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{
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/// <summary>
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/// Exception callback without any additional arguments.
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/// </summary>
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/// <param name="context">Context for the thread where the exception was triggered</param>
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public delegate void ExceptionCallbackNoArgs(IExecutionContext context);
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/// <summary>
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/// Exception callback.
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/// </summary>
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/// <param name="context">Context for the thread where the exception was triggered</param>
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/// <param name="address">Address of the instruction that caused the exception</param>
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/// <param name="imm">Immediate value of the instruction that caused the exception, or for undefined instruction, the instruction itself</param>
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public delegate void ExceptionCallback(IExecutionContext context, ulong address, int imm);
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/// <summary>
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/// Stores handlers for the various CPU exceptions.
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/// </summary>
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public struct ExceptionCallbacks
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{
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/// <summary>
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/// Handler for CPU interrupts triggered using <see cref="IExecutionContext.RequestInterrupt"/>.
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/// </summary>
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public readonly ExceptionCallbackNoArgs InterruptCallback;
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/// <summary>
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/// Handler for CPU software interrupts caused by the Arm BRK instruction.
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/// </summary>
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public readonly ExceptionCallback BreakCallback;
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/// <summary>
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/// Handler for CPU software interrupts caused by the Arm SVC instruction.
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/// </summary>
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public readonly ExceptionCallback SupervisorCallback;
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/// <summary>
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/// Handler for CPU software interrupts caused by any undefined Arm instruction.
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/// </summary>
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public readonly ExceptionCallback UndefinedCallback;
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/// <summary>
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/// Creates a new exception callbacks structure.
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/// </summary>
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/// <remarks>
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/// All handlers are optional, and if null, the CPU will just continue executing as if nothing happened.
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/// </remarks>
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/// <param name="interruptCallback">Handler for CPU interrupts triggered using <see cref="IExecutionContext.RequestInterrupt"/></param>
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/// <param name="breakCallback">Handler for CPU software interrupts caused by the Arm BRK instruction</param>
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/// <param name="supervisorCallback">Handler for CPU software interrupts caused by the Arm SVC instruction</param>
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/// <param name="undefinedCallback">Handler for CPU software interrupts caused by any undefined Arm instruction</param>
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public ExceptionCallbacks(
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ExceptionCallbackNoArgs interruptCallback = null,
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ExceptionCallback breakCallback = null,
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ExceptionCallback supervisorCallback = null,
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ExceptionCallback undefinedCallback = null)
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{
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InterruptCallback = interruptCallback;
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BreakCallback = breakCallback;
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SupervisorCallback = supervisorCallback;
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UndefinedCallback = undefinedCallback;
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}
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}
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}
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