mirror of
https://github.com/Ryujinx/Ryujinx.git
synced 2024-08-19 23:28:42 +02:00
* Implement support for page sizes > 4KB * Check and work around more alignment issues * Was not meant to change this * Use MemoryBlock.GetPageSize() value for signal handler code * Do not take the path for private allocations if host supports 4KB pages * Add Flags attribute on MemoryMapFlags * Fix dirty region size with 16kb pages Would accidentally report a size that was too high (generally 16k instead of 4k, uploading 4x as much data) Co-authored-by: riperiperi <rhy3756547@hotmail.com>
471 lines
14 KiB
C#
471 lines
14 KiB
C#
using Ryujinx.Memory.Range;
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using System;
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using System.Collections.Generic;
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using System.Linq;
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using System.Runtime.CompilerServices;
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using System.Runtime.InteropServices;
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namespace Ryujinx.Memory
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{
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/// <summary>
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/// Represents a address space manager.
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/// Supports virtual memory region mapping, address translation and read/write access to mapped regions.
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/// </summary>
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public sealed class AddressSpaceManager : IVirtualMemoryManager, IWritableBlock
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{
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public const int PageBits = PageTable<nuint>.PageBits;
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public const int PageSize = PageTable<nuint>.PageSize;
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public const int PageMask = PageTable<nuint>.PageMask;
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/// <inheritdoc/>
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public bool Supports4KBPages => true;
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/// <summary>
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/// Address space width in bits.
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/// </summary>
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public int AddressSpaceBits { get; }
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private readonly ulong _addressSpaceSize;
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private readonly MemoryBlock _backingMemory;
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private readonly PageTable<nuint> _pageTable;
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/// <summary>
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/// Creates a new instance of the memory manager.
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/// </summary>
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/// <param name="backingMemory">Physical backing memory where virtual memory will be mapped to</param>
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/// <param name="addressSpaceSize">Size of the address space</param>
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public AddressSpaceManager(MemoryBlock backingMemory, ulong addressSpaceSize)
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{
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ulong asSize = PageSize;
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int asBits = PageBits;
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while (asSize < addressSpaceSize)
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{
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asSize <<= 1;
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asBits++;
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}
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AddressSpaceBits = asBits;
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_addressSpaceSize = asSize;
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_backingMemory = backingMemory;
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_pageTable = new PageTable<nuint>();
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}
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/// <inheritdoc/>
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public void Map(ulong va, ulong pa, ulong size, MemoryMapFlags flags)
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{
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AssertValidAddressAndSize(va, size);
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while (size != 0)
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{
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_pageTable.Map(va, (nuint)(ulong)_backingMemory.GetPointer(pa, PageSize));
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va += PageSize;
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pa += PageSize;
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size -= PageSize;
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}
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}
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/// <inheritdoc/>
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public void MapForeign(ulong va, nuint hostPointer, ulong size)
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{
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AssertValidAddressAndSize(va, size);
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while (size != 0)
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{
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_pageTable.Map(va, hostPointer);
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va += PageSize;
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hostPointer += PageSize;
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size -= PageSize;
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}
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}
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/// <inheritdoc/>
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public void Unmap(ulong va, ulong size)
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{
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AssertValidAddressAndSize(va, size);
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while (size != 0)
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{
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_pageTable.Unmap(va);
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va += PageSize;
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size -= PageSize;
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}
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}
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/// <inheritdoc/>
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public T Read<T>(ulong va) where T : unmanaged
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{
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return MemoryMarshal.Cast<byte, T>(GetSpan(va, Unsafe.SizeOf<T>()))[0];
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}
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/// <inheritdoc/>
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public void Read(ulong va, Span<byte> data)
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{
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ReadImpl(va, data);
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}
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/// <inheritdoc/>
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public void Write<T>(ulong va, T value) where T : unmanaged
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{
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Write(va, MemoryMarshal.Cast<T, byte>(MemoryMarshal.CreateSpan(ref value, 1)));
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}
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/// <inheritdoc/>
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public void Write(ulong va, ReadOnlySpan<byte> data)
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{
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if (data.Length == 0)
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{
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return;
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}
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AssertValidAddressAndSize(va, (ulong)data.Length);
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if (IsContiguousAndMapped(va, data.Length))
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{
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data.CopyTo(GetHostSpanContiguous(va, data.Length));
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}
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else
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{
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int offset = 0, size;
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if ((va & PageMask) != 0)
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{
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size = Math.Min(data.Length, PageSize - (int)(va & PageMask));
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data.Slice(0, size).CopyTo(GetHostSpanContiguous(va, size));
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offset += size;
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}
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for (; offset < data.Length; offset += size)
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{
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size = Math.Min(data.Length - offset, PageSize);
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data.Slice(offset, size).CopyTo(GetHostSpanContiguous(va + (ulong)offset, size));
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}
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}
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}
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/// <inheritdoc/>
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public bool WriteWithRedundancyCheck(ulong va, ReadOnlySpan<byte> data)
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{
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Write(va, data);
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return true;
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}
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/// <inheritdoc/>
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public ReadOnlySpan<byte> GetSpan(ulong va, int size, bool tracked = false)
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{
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if (size == 0)
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{
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return ReadOnlySpan<byte>.Empty;
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}
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if (IsContiguousAndMapped(va, size))
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{
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return GetHostSpanContiguous(va, size);
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}
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else
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{
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Span<byte> data = new byte[size];
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ReadImpl(va, data);
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return data;
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}
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}
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/// <inheritdoc/>
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public unsafe WritableRegion GetWritableRegion(ulong va, int size, bool tracked = false)
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{
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if (size == 0)
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{
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return new WritableRegion(null, va, Memory<byte>.Empty);
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}
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if (IsContiguousAndMapped(va, size))
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{
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return new WritableRegion(null, va, new NativeMemoryManager<byte>((byte*)GetHostAddress(va), size).Memory);
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}
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else
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{
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Memory<byte> memory = new byte[size];
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GetSpan(va, size).CopyTo(memory.Span);
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return new WritableRegion(this, va, memory);
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}
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}
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/// <inheritdoc/>
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public unsafe ref T GetRef<T>(ulong va) where T : unmanaged
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{
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if (!IsContiguous(va, Unsafe.SizeOf<T>()))
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{
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ThrowMemoryNotContiguous();
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}
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return ref *(T*)GetHostAddress(va);
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}
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/// <inheritdoc/>
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[MethodImpl(MethodImplOptions.AggressiveInlining)]
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private int GetPagesCount(ulong va, uint size, out ulong startVa)
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{
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// WARNING: Always check if ulong does not overflow during the operations.
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startVa = va & ~(ulong)PageMask;
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ulong vaSpan = (va - startVa + size + PageMask) & ~(ulong)PageMask;
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return (int)(vaSpan / PageSize);
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}
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private void ThrowMemoryNotContiguous() => throw new MemoryNotContiguousException();
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[MethodImpl(MethodImplOptions.AggressiveInlining)]
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private bool IsContiguousAndMapped(ulong va, int size) => IsContiguous(va, size) && IsMapped(va);
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[MethodImpl(MethodImplOptions.AggressiveInlining)]
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private bool IsContiguous(ulong va, int size)
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{
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if (!ValidateAddress(va) || !ValidateAddressAndSize(va, (ulong)size))
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{
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return false;
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}
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int pages = GetPagesCount(va, (uint)size, out va);
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for (int page = 0; page < pages - 1; page++)
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{
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if (!ValidateAddress(va + PageSize))
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{
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return false;
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}
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if (GetHostAddress(va) + PageSize != GetHostAddress(va + PageSize))
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{
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return false;
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}
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va += PageSize;
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}
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return true;
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}
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/// <inheritdoc/>
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public IEnumerable<HostMemoryRange> GetHostRegions(ulong va, ulong size)
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{
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if (size == 0)
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{
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return Enumerable.Empty<HostMemoryRange>();
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}
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return GetHostRegionsImpl(va, size);
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}
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/// <inheritdoc/>
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public IEnumerable<MemoryRange> GetPhysicalRegions(ulong va, ulong size)
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{
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if (size == 0)
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{
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return Enumerable.Empty<MemoryRange>();
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}
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var hostRegions = GetHostRegionsImpl(va, size);
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if (hostRegions == null)
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{
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return null;
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}
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var regions = new MemoryRange[hostRegions.Count];
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ulong backingStart = (ulong)_backingMemory.Pointer;
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ulong backingEnd = backingStart + _backingMemory.Size;
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int count = 0;
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for (int i = 0; i < regions.Length; i++)
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{
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var hostRegion = hostRegions[i];
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if ((ulong)hostRegion.Address >= backingStart && (ulong)hostRegion.Address < backingEnd)
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{
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regions[count++] = new MemoryRange((ulong)hostRegion.Address - backingStart, hostRegion.Size);
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}
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}
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if (count != regions.Length)
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{
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return new ArraySegment<MemoryRange>(regions, 0, count);
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}
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return regions;
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}
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private List<HostMemoryRange> GetHostRegionsImpl(ulong va, ulong size)
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{
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if (!ValidateAddress(va) || !ValidateAddressAndSize(va, size))
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{
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return null;
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}
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int pages = GetPagesCount(va, (uint)size, out va);
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var regions = new List<HostMemoryRange>();
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nuint regionStart = GetHostAddress(va);
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ulong regionSize = PageSize;
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for (int page = 0; page < pages - 1; page++)
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{
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if (!ValidateAddress(va + PageSize))
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{
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return null;
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}
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nuint newHostAddress = GetHostAddress(va + PageSize);
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if (GetHostAddress(va) + PageSize != newHostAddress)
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{
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regions.Add(new HostMemoryRange(regionStart, regionSize));
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regionStart = newHostAddress;
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regionSize = 0;
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}
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va += PageSize;
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regionSize += PageSize;
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}
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regions.Add(new HostMemoryRange(regionStart, regionSize));
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return regions;
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}
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private void ReadImpl(ulong va, Span<byte> data)
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{
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if (data.Length == 0)
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{
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return;
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}
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AssertValidAddressAndSize(va, (ulong)data.Length);
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int offset = 0, size;
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if ((va & PageMask) != 0)
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{
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size = Math.Min(data.Length, PageSize - (int)(va & PageMask));
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GetHostSpanContiguous(va, size).CopyTo(data.Slice(0, size));
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offset += size;
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}
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for (; offset < data.Length; offset += size)
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{
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size = Math.Min(data.Length - offset, PageSize);
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GetHostSpanContiguous(va + (ulong)offset, size).CopyTo(data.Slice(offset, size));
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}
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}
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/// <inheritdoc/>
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[MethodImpl(MethodImplOptions.AggressiveInlining)]
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public bool IsMapped(ulong va)
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{
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if (!ValidateAddress(va))
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{
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return false;
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}
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return _pageTable.Read(va) != 0;
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}
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/// <inheritdoc/>
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public bool IsRangeMapped(ulong va, ulong size)
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{
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if (size == 0UL)
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{
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return true;
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}
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if (!ValidateAddressAndSize(va, size))
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{
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return false;
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}
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int pages = GetPagesCount(va, (uint)size, out va);
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for (int page = 0; page < pages; page++)
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{
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if (!IsMapped(va))
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{
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return false;
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}
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va += PageSize;
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}
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return true;
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}
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private bool ValidateAddress(ulong va)
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{
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return va < _addressSpaceSize;
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}
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/// <summary>
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/// Checks if the combination of virtual address and size is part of the addressable space.
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/// </summary>
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/// <param name="va">Virtual address of the range</param>
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/// <param name="size">Size of the range in bytes</param>
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/// <returns>True if the combination of virtual address and size is part of the addressable space</returns>
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private bool ValidateAddressAndSize(ulong va, ulong size)
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{
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ulong endVa = va + size;
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return endVa >= va && endVa >= size && endVa <= _addressSpaceSize;
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}
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/// <summary>
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/// Ensures the combination of virtual address and size is part of the addressable space.
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/// </summary>
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/// <param name="va">Virtual address of the range</param>
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/// <param name="size">Size of the range in bytes</param>
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/// <exception cref="InvalidMemoryRegionException">Throw when the memory region specified outside the addressable space</exception>
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private void AssertValidAddressAndSize(ulong va, ulong size)
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{
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if (!ValidateAddressAndSize(va, size))
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{
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throw new InvalidMemoryRegionException($"va=0x{va:X16}, size=0x{size:X16}");
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}
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}
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private unsafe Span<byte> GetHostSpanContiguous(ulong va, int size)
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{
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return new Span<byte>((void*)GetHostAddress(va), size);
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}
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private nuint GetHostAddress(ulong va)
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{
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return _pageTable.Read(va) + (nuint)(va & PageMask);
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}
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/// <inheritdoc/>
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public void TrackingReprotect(ulong va, ulong size, MemoryPermission protection)
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{
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throw new NotImplementedException();
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}
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/// <inheritdoc/>
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public void SignalMemoryTracking(ulong va, ulong size, bool write, bool precise = false)
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{
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// Only the ARM Memory Manager has tracking for now.
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}
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}
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}
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