mirror of
https://github.com/Ryujinx/Ryujinx.git
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302c1d2861
* Update AOpCodeTable.cs * Update Pseudocode.cs * Update Instructions.cs * Update CpuTestSimd.cs * Update CpuTestSimdReg.cs * Update Instructions.cs * Revert "Started to work in improving the sync primitives"
1112 lines
33 KiB
C#
1112 lines
33 KiB
C#
// https://github.com/LDj3SNuD/ARM_v8-A_AArch64_Instructions_Tester/blob/master/Tester/Pseudocode.cs
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// https://meriac.github.io/archex/A64_v83A_ISA/shared_pseudocode.xml
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// https://alastairreid.github.io/asl-lexical-syntax/
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// | ------------------------|----------------------------------- |
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// | ASL | C# |
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// | ------------------------|----------------------------------- |
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// | bit, bits(1); boolean | bool |
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// | bits | Bits |
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// | integer | BigInteger, int |
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// | real | decimal |
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// | ------------------------|----------------------------------- |
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// | '0'; FALSE | false |
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// | '1'; TRUE | true |
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// | '010' | "010" |
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// | bitsX IN {bitsY, bitsZ} | (bitsX == bitsY || bitsX == bitsZ) |
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// | DIV | / |
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// | MOD | % |
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// | ------------------------|----------------------------------- |
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using System;
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using System.Numerics;
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namespace Ryujinx.Tests.Cpu.Tester
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{
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using Types;
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using static Shared;
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internal static class AArch64
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{
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#region "exceptions/exceptions/"
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/* #AArch64.ResetControlRegisters.1 */
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public static void ResetControlRegisters(bool cold_reset)
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{
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PSTATE.N = cold_reset;
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PSTATE.Z = cold_reset;
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PSTATE.C = cold_reset;
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PSTATE.V = cold_reset;
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}
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/* */
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public static void TakeReset(bool cold_reset)
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{
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/* assert !HighestELUsingAArch32(); */
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// Enter the highest implemented Exception level in AArch64 state
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if (HaveEL(EL3))
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{
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PSTATE.EL = EL3;
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}
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else if (HaveEL(EL2))
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{
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PSTATE.EL = EL2;
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}
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else
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{
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PSTATE.EL = EL1;
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}
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// Reset the system registers and other system components
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AArch64.ResetControlRegisters(cold_reset);
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// Reset all other PSTATE fields
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PSTATE.SP = true; // Select stack pointer
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// All registers, bits and fields not reset by the above pseudocode or by the BranchTo() call
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// below are UNKNOWN bitstrings after reset. In particular, the return information registers
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// ELR_ELx and SPSR_ELx have UNKNOWN values, so that it
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// is impossible to return from a reset in an architecturally defined way.
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AArch64.ResetGeneralRegisters();
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AArch64.ResetSIMDFPRegisters();
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AArch64.ResetSpecialRegisters();
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}
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#endregion
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#region "functions/registers/"
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/* #AArch64.ResetGeneralRegisters.0 */
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public static void ResetGeneralRegisters()
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{
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for (int i = 0; i <= 30; i++)
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{
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/* X[i] = bits(64) UNKNOWN; */
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_R[i].SetAll(false);
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}
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}
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/* #AArch64.ResetSIMDFPRegisters.0 */
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public static void ResetSIMDFPRegisters()
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{
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for (int i = 0; i <= 31; i++)
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{
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/* V[i] = bits(128) UNKNOWN; */
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_V[i].SetAll(false);
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}
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}
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/* #AArch64.ResetSpecialRegisters.0 */
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public static void ResetSpecialRegisters()
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{
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// AArch64 special registers
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/* SP_EL0 = bits(64) UNKNOWN; */
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SP_EL0.SetAll(false);
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/* SP_EL1 = bits(64) UNKNOWN; */
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SP_EL1.SetAll(false);
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}
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// #impl-aarch64.SP.write.0
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public static void SP(Bits value)
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{
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/* int width = value.Count; */
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/* assert width IN {32,64}; */
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if (!PSTATE.SP)
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{
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SP_EL0 = ZeroExtend(64, value);
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}
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else
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{
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switch (PSTATE.EL)
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{
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case Bits bits when bits == EL0:
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SP_EL0 = ZeroExtend(64, value);
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break;
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default:
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case Bits bits when bits == EL1:
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SP_EL1 = ZeroExtend(64, value);
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break;/*
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case Bits bits when bits == EL2:
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SP_EL2 = ZeroExtend(64, value);
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break;
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case Bits bits when bits == EL3:
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SP_EL3 = ZeroExtend(64, value);
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break;*/
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}
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}
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}
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// #impl-aarch64.SP.read.0
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public static Bits SP(int width)
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{
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/* assert width IN {8,16,32,64}; */
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if (!PSTATE.SP)
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{
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return SP_EL0[width - 1, 0];
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}
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else
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{
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switch (PSTATE.EL)
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{
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case Bits bits when bits == EL0:
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return SP_EL0[width - 1, 0];
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default:
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case Bits bits when bits == EL1:
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return SP_EL1[width - 1, 0];/*
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case Bits bits when bits == EL2:
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return SP_EL2[width - 1, 0];
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case Bits bits when bits == EL3:
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return SP_EL3[width - 1, 0];*/
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}
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}
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}
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// #impl-aarch64.V.write.1
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public static void V(int n, Bits value)
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{
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/* int width = value.Count; */
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/* assert n >= 0 && n <= 31; */
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/* assert width IN {8,16,32,64,128}; */
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_V[n] = ZeroExtend(128, value);
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}
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/* #impl-aarch64.V.read.1 */
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public static Bits V(int width, int n)
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{
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/* assert n >= 0 && n <= 31; */
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/* assert width IN {8,16,32,64,128}; */
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return _V[n][width - 1, 0];
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}
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/* #impl-aarch64.Vpart.read.2 */
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public static Bits Vpart(int width, int n, int part)
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{
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/* assert n >= 0 && n <= 31; */
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/* assert part IN {0, 1}; */
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if (part == 0)
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{
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/* assert width IN {8,16,32,64}; */
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return _V[n][width - 1, 0];
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}
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else
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{
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/* assert width == 64; */
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return _V[n][(width * 2) - 1, width];
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}
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}
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// #impl-aarch64.Vpart.write.2
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public static void Vpart(int n, int part, Bits value)
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{
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int width = value.Count;
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/* assert n >= 0 && n <= 31; */
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/* assert part IN {0, 1}; */
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if (part == 0)
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{
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/* assert width IN {8,16,32,64}; */
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_V[n] = ZeroExtend(128, value);
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}
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else
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{
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/* assert width == 64; */
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_V[n][(width * 2) - 1, width] = value[width - 1, 0];
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}
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}
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// #impl-aarch64.X.write.1
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public static void X(int n, Bits value)
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{
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/* int width = value.Count; */
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/* assert n >= 0 && n <= 31; */
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/* assert width IN {32,64}; */
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if (n != 31)
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{
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_R[n] = ZeroExtend(64, value);
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}
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}
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/* #impl-aarch64.X.read.1 */
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public static Bits X(int width, int n)
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{
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/* assert n >= 0 && n <= 31; */
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/* assert width IN {8,16,32,64}; */
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if (n != 31)
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{
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return _R[n][width - 1, 0];
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}
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else
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{
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return Zeros(width);
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}
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}
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#endregion
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#region "instrs/extendreg/"
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/* #impl-aarch64.DecodeRegExtend.1 */
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public static ExtendType DecodeRegExtend(Bits op)
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{
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switch (op)
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{
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default:
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case Bits bits when bits == "000":
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return ExtendType.ExtendType_UXTB;
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case Bits bits when bits == "001":
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return ExtendType.ExtendType_UXTH;
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case Bits bits when bits == "010":
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return ExtendType.ExtendType_UXTW;
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case Bits bits when bits == "011":
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return ExtendType.ExtendType_UXTX;
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case Bits bits when bits == "100":
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return ExtendType.ExtendType_SXTB;
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case Bits bits when bits == "101":
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return ExtendType.ExtendType_SXTH;
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case Bits bits when bits == "110":
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return ExtendType.ExtendType_SXTW;
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case Bits bits when bits == "111":
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return ExtendType.ExtendType_SXTX;
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}
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}
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/* #impl-aarch64.ExtendReg.3 */
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public static Bits ExtendReg(int N, int reg, ExtendType type, int shift)
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{
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/* assert shift >= 0 && shift <= 4; */
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Bits val = X(N, reg);
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bool unsigned;
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int len;
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switch (type)
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{
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default:
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case ExtendType.ExtendType_SXTB:
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unsigned = false; len = 8;
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break;
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case ExtendType.ExtendType_SXTH:
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unsigned = false; len = 16;
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break;
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case ExtendType.ExtendType_SXTW:
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unsigned = false; len = 32;
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break;
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case ExtendType.ExtendType_SXTX:
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unsigned = false; len = 64;
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break;
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case ExtendType.ExtendType_UXTB:
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unsigned = true; len = 8;
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break;
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case ExtendType.ExtendType_UXTH:
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unsigned = true; len = 16;
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break;
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case ExtendType.ExtendType_UXTW:
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unsigned = true; len = 32;
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break;
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case ExtendType.ExtendType_UXTX:
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unsigned = true; len = 64;
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break;
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}
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// Note the extended width of the intermediate value and
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// that sign extension occurs from bit <len+shift-1>, not
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// from bit <len-1>. This is equivalent to the instruction
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// [SU]BFIZ Rtmp, Rreg, #shift, #len
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// It may also be seen as a sign/zero extend followed by a shift:
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// LSL(Extend(val<len-1:0>, N, unsigned), shift);
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len = Min(len, N - shift);
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return Extend(Bits.Concat(val[len - 1, 0], Zeros(shift)), N, unsigned);
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}
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// #ExtendType
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public enum ExtendType {ExtendType_SXTB, ExtendType_SXTH, ExtendType_SXTW, ExtendType_SXTX,
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ExtendType_UXTB, ExtendType_UXTH, ExtendType_UXTW, ExtendType_UXTX};
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#endregion
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#region "instrs/integer/bitmasks/"
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/* #impl-aarch64.DecodeBitMasks.4 */
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public static (Bits, Bits) DecodeBitMasks(int M, bool immN, Bits imms, Bits immr, bool immediate)
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{
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Bits tmask, wmask;
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Bits tmask_and, wmask_and;
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Bits tmask_or, wmask_or;
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Bits levels;
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// Compute log2 of element size
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// 2^len must be in range [2, M]
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int len = HighestSetBit(Bits.Concat(immN, NOT(imms)));
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/* if len < 1 then ReservedValue(); */
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/* assert M >= (1 << len); */
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// Determine S, R and S - R parameters
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levels = ZeroExtend(Ones(len), 6);
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// For logical immediates an all-ones value of S is reserved
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// since it would generate a useless all-ones result (many times)
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/* if immediate && (imms AND levels) == levels then ReservedValue(); */
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BigInteger S = UInt(AND(imms, levels));
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BigInteger R = UInt(AND(immr, levels));
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BigInteger diff = S - R; // 6-bit subtract with borrow
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// Compute "top mask"
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tmask_and = OR(diff.SubBigInteger(5, 0), NOT(levels));
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tmask_or = AND(diff.SubBigInteger(5, 0), levels);
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tmask = Ones(64);
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tmask = OR(AND(tmask, Replicate(Bits.Concat(Replicate(tmask_and[0], 1), Ones( 1)), 32)), Replicate(Bits.Concat(Zeros( 1), Replicate(tmask_or[0], 1)), 32));
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tmask = OR(AND(tmask, Replicate(Bits.Concat(Replicate(tmask_and[1], 2), Ones( 2)), 16)), Replicate(Bits.Concat(Zeros( 2), Replicate(tmask_or[1], 2)), 16));
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tmask = OR(AND(tmask, Replicate(Bits.Concat(Replicate(tmask_and[2], 4), Ones( 4)), 8)), Replicate(Bits.Concat(Zeros( 4), Replicate(tmask_or[2], 4)), 8));
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tmask = OR(AND(tmask, Replicate(Bits.Concat(Replicate(tmask_and[3], 8), Ones( 8)), 4)), Replicate(Bits.Concat(Zeros( 8), Replicate(tmask_or[3], 8)), 4));
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tmask = OR(AND(tmask, Replicate(Bits.Concat(Replicate(tmask_and[4], 16), Ones(16)), 2)), Replicate(Bits.Concat(Zeros(16), Replicate(tmask_or[4], 16)), 2));
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tmask = OR(AND(tmask, Replicate(Bits.Concat(Replicate(tmask_and[5], 32), Ones(32)), 1)), Replicate(Bits.Concat(Zeros(32), Replicate(tmask_or[5], 32)), 1));
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// Compute "wraparound mask"
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wmask_and = OR(immr, NOT(levels));
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wmask_or = AND(immr, levels);
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wmask = Zeros(64);
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wmask = OR(AND(wmask, Replicate(Bits.Concat(Ones( 1), Replicate(wmask_and[0], 1)), 32)), Replicate(Bits.Concat(Replicate(wmask_or[0], 1), Zeros( 1)), 32));
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wmask = OR(AND(wmask, Replicate(Bits.Concat(Ones( 2), Replicate(wmask_and[1], 2)), 16)), Replicate(Bits.Concat(Replicate(wmask_or[1], 2), Zeros( 2)), 16));
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wmask = OR(AND(wmask, Replicate(Bits.Concat(Ones( 4), Replicate(wmask_and[2], 4)), 8)), Replicate(Bits.Concat(Replicate(wmask_or[2], 4), Zeros( 4)), 8));
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wmask = OR(AND(wmask, Replicate(Bits.Concat(Ones( 8), Replicate(wmask_and[3], 8)), 4)), Replicate(Bits.Concat(Replicate(wmask_or[3], 8), Zeros( 8)), 4));
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wmask = OR(AND(wmask, Replicate(Bits.Concat(Ones(16), Replicate(wmask_and[4], 16)), 2)), Replicate(Bits.Concat(Replicate(wmask_or[4], 16), Zeros(16)), 2));
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wmask = OR(AND(wmask, Replicate(Bits.Concat(Ones(32), Replicate(wmask_and[5], 32)), 1)), Replicate(Bits.Concat(Replicate(wmask_or[5], 32), Zeros(32)), 1));
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if (diff.SubBigInteger(6)) // borrow from S - R
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{
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wmask = AND(wmask, tmask);
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}
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else
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{
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wmask = OR(wmask, tmask);
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}
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return (wmask[M - 1, 0], tmask[M - 1, 0]);
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}
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#endregion
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#region "instrs/integer/shiftreg/"
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/* #impl-aarch64.DecodeShift.1 */
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public static ShiftType DecodeShift(Bits op)
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{
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switch (op)
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{
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default:
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case Bits bits when bits == "00":
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return ShiftType.ShiftType_LSL;
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case Bits bits when bits == "01":
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return ShiftType.ShiftType_LSR;
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case Bits bits when bits == "10":
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return ShiftType.ShiftType_ASR;
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case Bits bits when bits == "11":
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return ShiftType.ShiftType_ROR;
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}
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}
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/* #impl-aarch64.ShiftReg.3 */
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public static Bits ShiftReg(int N, int reg, ShiftType type, int amount)
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{
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Bits result = X(N, reg);
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switch (type)
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{
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default:
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case ShiftType.ShiftType_LSL:
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result = LSL(result, amount);
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break;
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case ShiftType.ShiftType_LSR:
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result = LSR(result, amount);
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break;
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case ShiftType.ShiftType_ASR:
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result = ASR(result, amount);
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break;
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case ShiftType.ShiftType_ROR:
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result = ROR(result, amount);
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break;
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}
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return result;
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}
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// #ShiftType
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public enum ShiftType {ShiftType_LSL, ShiftType_LSR, ShiftType_ASR, ShiftType_ROR};
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#endregion
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#region "instrs/vector/reduce/reduceop/"
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public static Bits Reduce(ReduceOp op, Bits input, int esize)
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{
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int N = input.Count;
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int half;
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Bits hi;
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Bits lo;
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Bits result = new Bits(esize);
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if (N == esize)
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{
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return new Bits(input);
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}
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half = N / 2;
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hi = Reduce(op, input[N - 1, half], esize);
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lo = Reduce(op, input[half - 1, 0], esize);
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switch (op)
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{
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case ReduceOp.ReduceOp_FMINNUM:
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/* result = FPMinNum(lo, hi, FPCR); */
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break;
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case ReduceOp.ReduceOp_FMAXNUM:
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/* result = FPMaxNum(lo, hi, FPCR); */
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break;
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case ReduceOp.ReduceOp_FMIN:
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/* result = FPMin(lo, hi, FPCR); */
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break;
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case ReduceOp.ReduceOp_FMAX:
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/* result = FPMax(lo, hi, FPCR); */
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break;
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case ReduceOp.ReduceOp_FADD:
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/* result = FPAdd(lo, hi, FPCR); */
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break;
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default:
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case ReduceOp.ReduceOp_ADD:
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result = lo + hi;
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break;
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}
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return result;
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}
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public enum ReduceOp {ReduceOp_FMINNUM, ReduceOp_FMAXNUM,
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ReduceOp_FMIN, ReduceOp_FMAX,
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ReduceOp_FADD, ReduceOp_ADD};
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#endregion
|
|
}
|
|
|
|
internal static class Shared
|
|
{
|
|
static Shared()
|
|
{
|
|
_R = new Bits[31];
|
|
for (int i = 0; i <= 30; i++)
|
|
{
|
|
_R[i] = new Bits(64, false);
|
|
}
|
|
|
|
_V = new Bits[32];
|
|
for (int i = 0; i <= 31; i++)
|
|
{
|
|
_V[i] = new Bits(128, false);
|
|
}
|
|
|
|
SP_EL0 = new Bits(64, false);
|
|
SP_EL1 = new Bits(64, false);
|
|
|
|
PSTATE.N = false;
|
|
PSTATE.Z = false;
|
|
PSTATE.C = false;
|
|
PSTATE.V = false;
|
|
PSTATE.EL = EL1;
|
|
PSTATE.SP = true;
|
|
}
|
|
|
|
#region "functions/common/"
|
|
/* */
|
|
public static Bits AND(Bits x, Bits y)
|
|
{
|
|
return x.And(y);
|
|
}
|
|
|
|
// #impl-shared.ASR.2
|
|
public static Bits ASR(Bits x, int shift)
|
|
{
|
|
int N = x.Count;
|
|
|
|
/* assert shift >= 0; */
|
|
|
|
Bits result;
|
|
|
|
if (shift == 0)
|
|
{
|
|
result = new Bits(x);
|
|
}
|
|
else
|
|
{
|
|
(result, _) = ASR_C(x, shift);
|
|
}
|
|
|
|
return result;
|
|
}
|
|
|
|
// #impl-shared.ASR_C.2
|
|
public static (Bits, bool) ASR_C(Bits x, int shift)
|
|
{
|
|
int N = x.Count;
|
|
|
|
/* assert shift > 0; */
|
|
|
|
Bits extended_x = SignExtend(x, shift + N);
|
|
Bits result = extended_x[shift + N - 1, shift];
|
|
bool carry_out = extended_x[shift - 1];
|
|
|
|
return (result, carry_out);
|
|
}
|
|
|
|
// #impl-shared.Abs.1
|
|
public static BigInteger Abs(BigInteger x)
|
|
{
|
|
return (x >= 0 ? x : -x);
|
|
}
|
|
|
|
// #impl-shared.CountLeadingSignBits.1
|
|
public static int CountLeadingSignBits(Bits x)
|
|
{
|
|
int N = x.Count;
|
|
|
|
return CountLeadingZeroBits(EOR(x[N - 1, 1], x[N - 2, 0]));
|
|
}
|
|
|
|
// #impl-shared.CountLeadingZeroBits.1
|
|
public static int CountLeadingZeroBits(Bits x)
|
|
{
|
|
int N = x.Count;
|
|
|
|
return (N - 1 - HighestSetBit(x));
|
|
}
|
|
|
|
// #impl-shared.Elem.read.3
|
|
public static Bits Elem(/*in */Bits vector, int e, int size)
|
|
{
|
|
/* int N = vector.Count; */
|
|
|
|
/* assert e >= 0 && (e+1)*size <= N; */
|
|
|
|
return vector[e * size + size - 1, e * size];
|
|
}
|
|
|
|
// #impl-shared.Elem.write.3
|
|
public static void Elem(/*out */Bits vector, int e, int size, Bits value)
|
|
{
|
|
/* int N = vector.Count; */
|
|
|
|
/* assert e >= 0 && (e+1)*size <= N; */
|
|
|
|
vector[(e + 1) * size - 1, e * size] = value;
|
|
}
|
|
|
|
/* */
|
|
public static Bits EOR(Bits x, Bits y)
|
|
{
|
|
return x.Xor(y);
|
|
}
|
|
|
|
// #impl-shared.Extend.3
|
|
public static Bits Extend(Bits x, int N, bool unsigned)
|
|
{
|
|
if (unsigned)
|
|
{
|
|
return ZeroExtend(x, N);
|
|
}
|
|
else
|
|
{
|
|
return SignExtend(x, N);
|
|
}
|
|
}
|
|
|
|
/* #impl-shared.Extend.2 */
|
|
public static Bits Extend(int N, Bits x, bool unsigned)
|
|
{
|
|
return Extend(x, N, unsigned);
|
|
}
|
|
|
|
// #impl-shared.HighestSetBit.1
|
|
public static int HighestSetBit(Bits x)
|
|
{
|
|
int N = x.Count;
|
|
|
|
for (int i = N - 1; i >= 0; i--)
|
|
{
|
|
if (x[i])
|
|
{
|
|
return i;
|
|
}
|
|
}
|
|
|
|
return -1;
|
|
}
|
|
|
|
// #impl-shared.Int.2
|
|
public static BigInteger Int(Bits x, bool unsigned)
|
|
{
|
|
return (unsigned ? UInt(x) : SInt(x));
|
|
}
|
|
|
|
// #impl-shared.IsOnes.1
|
|
public static bool IsOnes(Bits x)
|
|
{
|
|
int N = x.Count;
|
|
|
|
return (x == Ones(N));
|
|
}
|
|
|
|
// #impl-shared.IsZero.1
|
|
public static bool IsZero(Bits x)
|
|
{
|
|
int N = x.Count;
|
|
|
|
return (x == Zeros(N));
|
|
}
|
|
|
|
// #impl-shared.IsZeroBit.1
|
|
public static bool IsZeroBit(Bits x)
|
|
{
|
|
return IsZero(x);
|
|
}
|
|
|
|
// #impl-shared.LSL.2
|
|
public static Bits LSL(Bits x, int shift)
|
|
{
|
|
int N = x.Count;
|
|
|
|
/* assert shift >= 0; */
|
|
|
|
Bits result;
|
|
|
|
if (shift == 0)
|
|
{
|
|
result = new Bits(x);
|
|
}
|
|
else
|
|
{
|
|
(result, _) = LSL_C(x, shift);
|
|
}
|
|
|
|
return result;
|
|
}
|
|
|
|
// #impl-shared.LSL_C.2
|
|
public static (Bits, bool) LSL_C(Bits x, int shift)
|
|
{
|
|
int N = x.Count;
|
|
|
|
/* assert shift > 0; */
|
|
|
|
Bits extended_x = Bits.Concat(x, Zeros(shift));
|
|
Bits result = extended_x[N - 1, 0];
|
|
bool carry_out = extended_x[N];
|
|
|
|
return (result, carry_out);
|
|
}
|
|
|
|
// #impl-shared.LSR.2
|
|
public static Bits LSR(Bits x, int shift)
|
|
{
|
|
int N = x.Count;
|
|
|
|
/* assert shift >= 0; */
|
|
|
|
Bits result;
|
|
|
|
if (shift == 0)
|
|
{
|
|
result = new Bits(x);
|
|
}
|
|
else
|
|
{
|
|
(result, _) = LSR_C(x, shift);
|
|
}
|
|
|
|
return result;
|
|
}
|
|
|
|
// #impl-shared.LSR_C.2
|
|
public static (Bits, bool) LSR_C(Bits x, int shift)
|
|
{
|
|
int N = x.Count;
|
|
|
|
/* assert shift > 0; */
|
|
|
|
Bits extended_x = ZeroExtend(x, shift + N);
|
|
Bits result = extended_x[shift + N - 1, shift];
|
|
bool carry_out = extended_x[shift - 1];
|
|
|
|
return (result, carry_out);
|
|
}
|
|
|
|
// #impl-shared.Min.2
|
|
public static int Min(int a, int b)
|
|
{
|
|
if (a <= b)
|
|
{
|
|
return a;
|
|
}
|
|
else
|
|
{
|
|
return b;
|
|
}
|
|
}
|
|
|
|
/* #impl-shared.NOT.1 */
|
|
public static Bits NOT(Bits x)
|
|
{
|
|
return x.Not();
|
|
}
|
|
|
|
// #impl-shared.Ones.1
|
|
public static Bits Ones(int N)
|
|
{
|
|
return Replicate(true, N);
|
|
}
|
|
|
|
/* */
|
|
public static Bits OR(Bits x, Bits y)
|
|
{
|
|
return x.Or(y);
|
|
}
|
|
|
|
/* */
|
|
public static decimal Real(BigInteger value)
|
|
{
|
|
return (decimal)value;
|
|
}
|
|
|
|
// #impl-shared.ROR.2
|
|
public static Bits ROR(Bits x, int shift)
|
|
{
|
|
/* assert shift >= 0; */
|
|
|
|
Bits result;
|
|
|
|
if (shift == 0)
|
|
{
|
|
result = new Bits(x);
|
|
}
|
|
else
|
|
{
|
|
(result, _) = ROR_C(x, shift);
|
|
}
|
|
|
|
return result;
|
|
}
|
|
|
|
// #impl-shared.ROR_C.2
|
|
public static (Bits, bool) ROR_C(Bits x, int shift)
|
|
{
|
|
int N = x.Count;
|
|
|
|
/* assert shift != 0; */
|
|
|
|
int m = shift % N;
|
|
Bits result = OR(LSR(x, m), LSL(x, N - m));
|
|
bool carry_out = result[N - 1];
|
|
|
|
return (result, carry_out);
|
|
}
|
|
|
|
/* #impl-shared.Replicate.1 */
|
|
public static Bits Replicate(int N, Bits x)
|
|
{
|
|
int M = x.Count;
|
|
|
|
/* assert N MOD M == 0; */
|
|
|
|
return Replicate(x, N / M);
|
|
}
|
|
|
|
/* #impl-shared.Replicate.2 */
|
|
public static Bits Replicate(Bits x, int N)
|
|
{
|
|
int M = x.Count;
|
|
|
|
bool[] dst = new bool[M * N];
|
|
|
|
for (int i = 0; i < N; i++)
|
|
{
|
|
x.CopyTo(dst, i * M);
|
|
}
|
|
|
|
return new Bits(dst);
|
|
}
|
|
|
|
/* #impl-shared.RoundDown.1 */
|
|
public static BigInteger RoundDown(decimal x)
|
|
{
|
|
return (BigInteger)Decimal.Floor(x);
|
|
}
|
|
|
|
// #impl-shared.RoundTowardsZero.1
|
|
public static BigInteger RoundTowardsZero(decimal x)
|
|
{
|
|
if (x == 0.0m)
|
|
{
|
|
return (BigInteger)0m;
|
|
}
|
|
else if (x >= 0.0m)
|
|
{
|
|
return RoundDown(x);
|
|
}
|
|
else
|
|
{
|
|
return RoundUp(x);
|
|
}
|
|
}
|
|
|
|
/* #impl-shared.RoundUp.1 */
|
|
public static BigInteger RoundUp(decimal x)
|
|
{
|
|
return (BigInteger)Decimal.Ceiling(x);
|
|
}
|
|
|
|
// #impl-shared.SInt.1
|
|
public static BigInteger SInt(Bits x)
|
|
{
|
|
int N = x.Count;
|
|
|
|
BigInteger result = 0;
|
|
|
|
for (int i = 0; i <= N - 1; i++)
|
|
{
|
|
if (x[i])
|
|
{
|
|
result = result + BigInteger.Pow(2, i);
|
|
}
|
|
}
|
|
|
|
if (x[N - 1])
|
|
{
|
|
result = result - BigInteger.Pow(2, N);
|
|
}
|
|
|
|
return result;
|
|
}
|
|
|
|
// #impl-shared.SignExtend.2
|
|
public static Bits SignExtend(Bits x, int N)
|
|
{
|
|
int M = x.Count;
|
|
|
|
/* assert N >= M; */
|
|
|
|
return Bits.Concat(Replicate(x[M - 1], N - M), x);
|
|
}
|
|
|
|
/* #impl-shared.SignExtend.1 */
|
|
public static Bits SignExtend(int N, Bits x)
|
|
{
|
|
return SignExtend(x, N);
|
|
}
|
|
|
|
// #impl-shared.UInt.1
|
|
public static BigInteger UInt(Bits x)
|
|
{
|
|
int N = x.Count;
|
|
|
|
BigInteger result = 0;
|
|
|
|
for (int i = 0; i <= N - 1; i++)
|
|
{
|
|
if (x[i])
|
|
{
|
|
result = result + BigInteger.Pow(2, i);
|
|
}
|
|
}
|
|
|
|
return result;
|
|
}
|
|
|
|
// #impl-shared.ZeroExtend.2
|
|
public static Bits ZeroExtend(Bits x, int N)
|
|
{
|
|
int M = x.Count;
|
|
|
|
/* assert N >= M; */
|
|
|
|
return Bits.Concat(Zeros(N - M), x);
|
|
}
|
|
|
|
/* #impl-shared.ZeroExtend.1 */
|
|
public static Bits ZeroExtend(int N, Bits x)
|
|
{
|
|
return ZeroExtend(x, N);
|
|
}
|
|
|
|
// #impl-shared.Zeros.1
|
|
/* #impl-shared.Zeros.0 */
|
|
public static Bits Zeros(int N)
|
|
{
|
|
return Replicate(false, N);
|
|
}
|
|
#endregion
|
|
|
|
#region "functions/crc/"
|
|
// #impl-shared.BitReverse.1
|
|
public static Bits BitReverse(Bits data)
|
|
{
|
|
int N = data.Count;
|
|
|
|
Bits result = new Bits(N);
|
|
|
|
for (int i = 0; i <= N - 1; i++)
|
|
{
|
|
result[N - i - 1] = data[i];
|
|
}
|
|
|
|
return result;
|
|
}
|
|
|
|
// #impl-shared.Poly32Mod2.2
|
|
public static Bits Poly32Mod2(Bits _data, Bits poly)
|
|
{
|
|
int N = _data.Count;
|
|
|
|
/* assert N > 32; */
|
|
|
|
Bits data = new Bits(_data);
|
|
|
|
for (int i = N - 1; i >= 32; i--)
|
|
{
|
|
if (data[i])
|
|
{
|
|
data[i - 1, 0] = EOR(data[i - 1, 0], Bits.Concat(poly, Zeros(i - 32)));
|
|
}
|
|
}
|
|
|
|
return data[31, 0];
|
|
}
|
|
#endregion
|
|
|
|
#region "functions/integer/"
|
|
/* #impl-shared.AddWithCarry.3 */
|
|
public static (Bits, Bits) AddWithCarry(int N, Bits x, Bits y, bool carry_in)
|
|
{
|
|
BigInteger unsigned_sum = UInt(x) + UInt(y) + UInt(carry_in);
|
|
BigInteger signed_sum = SInt(x) + SInt(y) + UInt(carry_in);
|
|
|
|
Bits result = unsigned_sum.SubBigInteger(N - 1, 0); // same value as signed_sum<N-1:0>
|
|
|
|
bool n = result[N - 1];
|
|
bool z = IsZero(result);
|
|
bool c = !(UInt(result) == unsigned_sum);
|
|
bool v = !(SInt(result) == signed_sum);
|
|
|
|
return (result, Bits.Concat(n, z, c, v));
|
|
}
|
|
#endregion
|
|
|
|
#region "functions/registers/"
|
|
public static readonly Bits[] _R;
|
|
|
|
public static readonly Bits[] _V;
|
|
|
|
public static Bits SP_EL0;
|
|
public static Bits SP_EL1;
|
|
#endregion
|
|
|
|
#region "functions/system/"
|
|
// #impl-shared.ConditionHolds.1
|
|
public static bool ConditionHolds(Bits cond)
|
|
{
|
|
bool result;
|
|
|
|
// Evaluate base condition.
|
|
switch (cond[3, 1])
|
|
{
|
|
case Bits bits when bits == "000":
|
|
result = (PSTATE.Z == true); // EQ or NE
|
|
break;
|
|
case Bits bits when bits == "001":
|
|
result = (PSTATE.C == true); // CS or CC
|
|
break;
|
|
case Bits bits when bits == "010":
|
|
result = (PSTATE.N == true); // MI or PL
|
|
break;
|
|
case Bits bits when bits == "011":
|
|
result = (PSTATE.V == true); // VS or VC
|
|
break;
|
|
case Bits bits when bits == "100":
|
|
result = (PSTATE.C == true && PSTATE.Z == false); // HI or LS
|
|
break;
|
|
case Bits bits when bits == "101":
|
|
result = (PSTATE.N == PSTATE.V); // GE or LT
|
|
break;
|
|
case Bits bits when bits == "110":
|
|
result = (PSTATE.N == PSTATE.V && PSTATE.Z == false); // GT or LE
|
|
break;
|
|
default:
|
|
case Bits bits when bits == "111":
|
|
result = true; // AL
|
|
break;
|
|
}
|
|
|
|
// Condition flag values in the set '111x' indicate always true
|
|
// Otherwise, invert condition if necessary.
|
|
if (cond[0] == true && cond != "1111")
|
|
{
|
|
result = !result;
|
|
}
|
|
|
|
return result;
|
|
}
|
|
|
|
// #EL3
|
|
public static readonly Bits EL3 = "11";
|
|
// #EL2
|
|
public static readonly Bits EL2 = "10";
|
|
// #EL1
|
|
public static readonly Bits EL1 = "01";
|
|
// #EL0
|
|
public static readonly Bits EL0 = "00";
|
|
|
|
/* #impl-shared.HaveEL.1 */
|
|
public static bool HaveEL(Bits el)
|
|
{
|
|
if (el == EL1 || el == EL0)
|
|
{
|
|
return true; // EL1 and EL0 must exist
|
|
}
|
|
|
|
return false;
|
|
}
|
|
|
|
public static ProcState PSTATE;
|
|
|
|
/* #ProcState */
|
|
internal struct ProcState
|
|
{
|
|
public void NZCV(Bits nzcv) // ASL: ".<,,,>".
|
|
{
|
|
N = nzcv[3];
|
|
Z = nzcv[2];
|
|
C = nzcv[1];
|
|
V = nzcv[0];
|
|
}
|
|
|
|
public void NZCV(bool n, bool z, bool c, bool v) // ASL: ".<,,,>".
|
|
{
|
|
N = n;
|
|
Z = z;
|
|
C = c;
|
|
V = v;
|
|
}
|
|
|
|
public bool N; // Negative condition flag
|
|
public bool Z; // Zero condition flag
|
|
public bool C; // Carry condition flag
|
|
public bool V; // oVerflow condition flag
|
|
public Bits EL; // Exception Level
|
|
public bool SP; // Stack pointer select: 0=SP0, 1=SPx [AArch64 only]
|
|
}
|
|
#endregion
|
|
}
|
|
}
|