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https://github.com/Ryujinx/Ryujinx.git
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* Nvservices cleanup and attempt to fix remap * Unmap if remap handle is 0 * Remove mapped pool add from Remap
218 lines
7.5 KiB
C#
218 lines
7.5 KiB
C#
using Ryujinx.Memory;
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using System;
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using System.Runtime.CompilerServices;
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using System.Runtime.InteropServices;
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namespace Ryujinx.Graphics.Gpu.Memory
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{
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/// <summary>
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/// GPU memory manager.
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/// </summary>
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public class MemoryManager
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{
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private const int PtLvl0Bits = 14;
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private const int PtLvl1Bits = 14;
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public const int PtPageBits = 12;
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private const ulong PtLvl0Size = 1UL << PtLvl0Bits;
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private const ulong PtLvl1Size = 1UL << PtLvl1Bits;
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public const ulong PageSize = 1UL << PtPageBits;
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private const ulong PtLvl0Mask = PtLvl0Size - 1;
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private const ulong PtLvl1Mask = PtLvl1Size - 1;
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public const ulong PageMask = PageSize - 1;
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private const int PtLvl0Bit = PtPageBits + PtLvl1Bits;
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private const int PtLvl1Bit = PtPageBits;
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public const ulong PteUnmapped = 0xffffffff_ffffffff;
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private readonly ulong[][] _pageTable;
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public event EventHandler<UnmapEventArgs> MemoryUnmapped;
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private GpuContext _context;
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/// <summary>
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/// Creates a new instance of the GPU memory manager.
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/// </summary>
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public MemoryManager(GpuContext context)
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{
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_context = context;
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_pageTable = new ulong[PtLvl0Size][];
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}
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/// <summary>
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/// Reads data from GPU mapped memory.
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/// </summary>
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/// <typeparam name="T">Type of the data</typeparam>
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/// <param name="gpuVa">GPU virtual address where the data is located</param>
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/// <returns>The data at the specified memory location</returns>
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public T Read<T>(ulong gpuVa) where T : unmanaged
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{
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ulong processVa = Translate(gpuVa);
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return MemoryMarshal.Cast<byte, T>(_context.PhysicalMemory.GetSpan(processVa, Unsafe.SizeOf<T>()))[0];
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}
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/// <summary>
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/// Gets a read-only span of data from GPU mapped memory.
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/// </summary>
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/// <param name="gpuVa">GPU virtual address where the data is located</param>
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/// <param name="size">Size of the data</param>
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/// <returns>The span of the data at the specified memory location</returns>
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public ReadOnlySpan<byte> GetSpan(ulong gpuVa, int size)
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{
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ulong processVa = Translate(gpuVa);
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return _context.PhysicalMemory.GetSpan(processVa, size);
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}
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/// <summary>
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/// Gets a writable region from GPU mapped memory.
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/// </summary>
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/// <param name="address">Start address of the range</param>
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/// <param name="size">Size in bytes to be range</param>
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/// <returns>A writable region with the data at the specified memory location</returns>
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public WritableRegion GetWritableRegion(ulong gpuVa, int size)
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{
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ulong processVa = Translate(gpuVa);
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return _context.PhysicalMemory.GetWritableRegion(processVa, size);
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}
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/// <summary>
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/// Writes data to GPU mapped memory.
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/// </summary>
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/// <typeparam name="T">Type of the data</typeparam>
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/// <param name="gpuVa">GPU virtual address to write the value into</param>
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/// <param name="value">The value to be written</param>
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public void Write<T>(ulong gpuVa, T value) where T : unmanaged
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{
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ulong processVa = Translate(gpuVa);
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_context.PhysicalMemory.Write(processVa, MemoryMarshal.Cast<T, byte>(MemoryMarshal.CreateSpan(ref value, 1)));
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}
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/// <summary>
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/// Writes data to GPU mapped memory.
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/// </summary>
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/// <param name="gpuVa">GPU virtual address to write the data into</param>
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/// <param name="data">The data to be written</param>
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public void Write(ulong gpuVa, ReadOnlySpan<byte> data)
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{
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ulong processVa = Translate(gpuVa);
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_context.PhysicalMemory.Write(processVa, data);
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}
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/// <summary>
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/// Maps a given range of pages to the specified CPU virtual address.
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/// </summary>
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/// <remarks>
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/// All addresses and sizes must be page aligned.
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/// </remarks>
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/// <param name="pa">CPU virtual address to map into</param>
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/// <param name="va">GPU virtual address to be mapped</param>
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/// <param name="size">Size in bytes of the mapping</param>
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public void Map(ulong pa, ulong va, ulong size)
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{
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lock (_pageTable)
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{
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MemoryUnmapped?.Invoke(this, new UnmapEventArgs(va, size));
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for (ulong offset = 0; offset < size; offset += PageSize)
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{
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SetPte(va + offset, pa + offset);
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}
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}
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}
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/// <summary>
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/// Unmaps a given range of pages at the specified GPU virtual memory region.
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/// </summary>
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/// <param name="va">GPU virtual address to unmap</param>
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/// <param name="size">Size in bytes of the region being unmapped</param>
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public void Unmap(ulong va, ulong size)
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{
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lock (_pageTable)
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{
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// Event handlers are not expected to be thread safe.
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MemoryUnmapped?.Invoke(this, new UnmapEventArgs(va, size));
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for (ulong offset = 0; offset < size; offset += PageSize)
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{
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SetPte(va + offset, PteUnmapped);
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}
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}
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}
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/// <summary>
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/// Checks if a given page is mapped.
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/// </summary>
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/// <param name="gpuVa">GPU virtual address of the page to check</param>
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/// <returns>True if the page is mapped, false otherwise</returns>
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public bool IsMapped(ulong gpuVa)
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{
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return Translate(gpuVa) != PteUnmapped;
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}
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/// <summary>
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/// Translates a GPU virtual address to a CPU virtual address.
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/// </summary>
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/// <param name="gpuVa">GPU virtual address to be translated</param>
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/// <returns>CPU virtual address</returns>
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public ulong Translate(ulong gpuVa)
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{
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ulong baseAddress = GetPte(gpuVa);
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if (baseAddress == PteUnmapped)
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{
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return PteUnmapped;
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}
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return baseAddress + (gpuVa & PageMask);
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}
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/// <summary>
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/// Gets the Page Table entry for a given GPU virtual address.
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/// </summary>
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/// <param name="gpuVa">GPU virtual address</param>
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/// <returns>Page table entry (CPU virtual address)</returns>
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private ulong GetPte(ulong gpuVa)
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{
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ulong l0 = (gpuVa >> PtLvl0Bit) & PtLvl0Mask;
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ulong l1 = (gpuVa >> PtLvl1Bit) & PtLvl1Mask;
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if (_pageTable[l0] == null)
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{
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return PteUnmapped;
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}
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return _pageTable[l0][l1];
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}
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/// <summary>
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/// Sets a Page Table entry at a given GPU virtual address.
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/// </summary>
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/// <param name="gpuVa">GPU virtual address</param>
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/// <param name="pte">Page table entry (CPU virtual address)</param>
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private void SetPte(ulong gpuVa, ulong pte)
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{
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ulong l0 = (gpuVa >> PtLvl0Bit) & PtLvl0Mask;
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ulong l1 = (gpuVa >> PtLvl1Bit) & PtLvl1Mask;
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if (_pageTable[l0] == null)
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{
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_pageTable[l0] = new ulong[PtLvl1Size];
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for (ulong index = 0; index < PtLvl1Size; index++)
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{
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_pageTable[l0][index] = PteUnmapped;
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}
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}
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_pageTable[l0][l1] = pte;
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}
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}
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} |