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https://github.com/Ryujinx/Ryujinx.git
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e603b7afbc
* Update CpuTest.cs * Update CpuTestSimd.cs * Update CpuTestSimdReg.cs * Update InstEmitSimdCmp.cs * Update SoftFloat.cs * Update InstEmitAluHelper.cs * Update InstEmitSimdArithmetic.cs * Update InstEmitSimdHelper.cs * Update VectorHelper.cs * Update InstEmitSimdCvt.cs * Update InstEmitSimdArithmetic.cs * Update CpuTestSimd.cs * Update InstEmitSimdArithmetic.cs * Update OpCodeTable.cs * Update InstEmitSimdArithmetic.cs * Update InstEmitSimdCmp.cs * Update InstEmitSimdCvt.cs * Update CpuTestSimd.cs * Update CpuTestSimdReg.cs * Create CpuTestSimdFcond.cs * Update OpCodeTable.cs * Update InstEmitSimdMove.cs * Update CpuTestSimdIns.cs * Create CpuTestSimdExt.cs * Nit. * Update PackageReference.
74 lines
2.5 KiB
C#
74 lines
2.5 KiB
C#
#define SimdExt
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using NUnit.Framework;
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using System.Runtime.Intrinsics;
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namespace Ryujinx.Tests.Cpu
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{
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[Category("SimdExt")]
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public sealed class CpuTestSimdExt : CpuTest
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{
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#if SimdExt
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#region "ValueSource"
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private static ulong[] _8B_()
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{
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return new ulong[] { 0x0000000000000000ul, 0x7F7F7F7F7F7F7F7Ful,
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0x8080808080808080ul, 0xFFFFFFFFFFFFFFFFul };
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}
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#endregion
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private const int RndCnt = 2;
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[Test, Pairwise, Description("EXT <Vd>.8B, <Vn>.8B, <Vm>.8B, #<index>")]
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public void Ext_V_8B([Values(0u)] uint rd,
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[Values(1u, 0u)] uint rn,
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[Values(2u, 0u)] uint rm,
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[ValueSource("_8B_")] [Random(RndCnt)] ulong z,
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[ValueSource("_8B_")] [Random(RndCnt)] ulong a,
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[ValueSource("_8B_")] [Random(RndCnt)] ulong b,
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[Range(0u, 7u)] uint index)
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{
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uint imm4 = index & 0x7u;
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uint opcode = 0x2E000000; // EXT V0.8B, V0.8B, V0.8B, #0
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opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
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opcode |= (imm4 << 11);
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Vector128<float> v0 = MakeVectorE0E1(z, z);
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Vector128<float> v1 = MakeVectorE0(a);
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Vector128<float> v2 = MakeVectorE0(b);
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SingleOpcode(opcode, v0: v0, v1: v1, v2: v2);
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CompareAgainstUnicorn();
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}
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[Test, Pairwise, Description("EXT <Vd>.16B, <Vn>.16B, <Vm>.16B, #<index>")]
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public void Ext_V_16B([Values(0u)] uint rd,
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[Values(1u, 0u)] uint rn,
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[Values(2u, 0u)] uint rm,
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[ValueSource("_8B_")] [Random(RndCnt)] ulong z,
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[ValueSource("_8B_")] [Random(RndCnt)] ulong a,
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[ValueSource("_8B_")] [Random(RndCnt)] ulong b,
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[Range(0u, 15u)] uint index)
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{
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uint imm4 = index & 0xFu;
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uint opcode = 0x6E000000; // EXT V0.16B, V0.16B, V0.16B, #0
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opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
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opcode |= (imm4 << 11);
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Vector128<float> v0 = MakeVectorE0E1(z, z);
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Vector128<float> v1 = MakeVectorE0E1(a, a);
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Vector128<float> v2 = MakeVectorE0E1(b, b);
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SingleOpcode(opcode, v0: v0, v1: v1, v2: v2);
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CompareAgainstUnicorn();
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}
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#endif
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}
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}
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