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* Replace CacheResourceWrite with more general "precise" write The goal of CacheResourceWrite was to notify GPU resources when they were modified directly, by looking up the modified address/size in a structure and calling a method on each resource. The downside of this is that each resource cache has to be queried individually, they all have to implement their own way to do this, and it can only signal to resources using the same PhysicalMemory instance. This PR adds the ability to signal a write as "precise" on the tracking, which signals a special handler (if present) which can be used to avoid unnecessary flush actions, or maybe even more. For buffers, precise writes specifically do not flush, and instead punch a hole in the modified range list to indicate that the data on GPU has been replaced. The downside is that precise actions must ignore the page protection bits and always signal - as they need to notify the target resource to ignore the sequence number optimization. I had to reintroduce the sequence number increment after I2M, as removing it was causing issues in rabbids kingdom battle. However - all resources modified by I2M are notified directly to lower their sequence number, so the problem is likely that another unrelated resource is not being properly updated. Thankfully, doing this does not affect performance in the games I tested. This should fix regressions from #2624. Test any games that were broken by that. (RF4, rabbids kingdom battle) I've also added a sequence number increment to ThreedClass.IncrementSyncpoint, as it seems to fix buffer corruption in OpenGL homebrew. (this was a regression from removing sequence number increment from constant buffer update - another unrelated resource thing) * Add tests. * Add XML docs for GpuRegionHandle * Skip UpdateProtection if only precise actions were called This allows precise actions to skip reprotection costs.
76 lines
3.1 KiB
C#
76 lines
3.1 KiB
C#
using System;
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namespace ARMeilleure.Memory
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{
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public interface IMemoryManager
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{
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int AddressSpaceBits { get; }
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IntPtr PageTablePointer { get; }
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MemoryManagerType Type { get; }
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event Action<ulong, ulong> UnmapEvent;
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/// <summary>
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/// Reads data from CPU mapped memory.
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/// </summary>
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/// <typeparam name="T">Type of the data being read</typeparam>
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/// <param name="va">Virtual address of the data in memory</param>
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/// <returns>The data</returns>
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T Read<T>(ulong va) where T : unmanaged;
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/// <summary>
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/// Reads data from CPU mapped memory, with read tracking
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/// </summary>
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/// <typeparam name="T">Type of the data being read</typeparam>
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/// <param name="va">Virtual address of the data in memory</param>
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/// <returns>The data</returns>
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T ReadTracked<T>(ulong va) where T : unmanaged;
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/// <summary>
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/// Writes data to CPU mapped memory.
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/// </summary>
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/// <typeparam name="T">Type of the data being written</typeparam>
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/// <param name="va">Virtual address to write the data into</param>
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/// <param name="value">Data to be written</param>
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void Write<T>(ulong va, T value) where T : unmanaged;
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/// <summary>
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/// Gets a read-only span of data from CPU mapped memory.
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/// </summary>
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/// <param name="va">Virtual address of the data</param>
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/// <param name="size">Size of the data</param>
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/// <param name="tracked">True if read tracking is triggered on the span</param>
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/// <returns>A read-only span of the data</returns>
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ReadOnlySpan<byte> GetSpan(ulong va, int size, bool tracked = false);
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/// <summary>
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/// Gets a reference for the given type at the specified virtual memory address.
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/// </summary>
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/// <remarks>
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/// The data must be located at a contiguous memory region.
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/// </remarks>
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/// <typeparam name="T">Type of the data to get the reference</typeparam>
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/// <param name="va">Virtual address of the data</param>
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/// <returns>A reference to the data in memory</returns>
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ref T GetRef<T>(ulong va) where T : unmanaged;
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/// <summary>
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/// Checks if the page at a given CPU virtual address is mapped.
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/// </summary>
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/// <param name="va">Virtual address to check</param>
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/// <returns>True if the address is mapped, false otherwise</returns>
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bool IsMapped(ulong va);
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/// <summary>
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/// Alerts the memory tracking that a given region has been read from or written to.
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/// This should be called before read/write is performed.
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/// </summary>
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/// <param name="va">Virtual address of the region</param>
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/// <param name="size">Size of the region</param>
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/// <param name="write">True if the region was written, false if read</param>
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/// <param name="precise">True if the access is precise, false otherwise</param>
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void SignalMemoryTracking(ulong va, ulong size, bool write, bool precise = false);
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}
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} |