Merge pull request #1 from neobrain/master

Cleanup GPU headers and add a GPU debugger with command list parsing capability.
This commit is contained in:
bunnei 2014-06-05 10:15:41 -04:00
commit 4a0430d5eb
28 changed files with 1001 additions and 85 deletions

View file

@ -2,6 +2,8 @@ set(SRCS
bootmanager.cpp
debugger/callstack.cpp
debugger/disassembler.cpp
debugger/graphics.cpp
debugger/graphics_cmdlists.cpp
debugger/ramview.cpp
debugger/registers.cpp
hotkeys.cpp
@ -38,6 +40,8 @@ qt4_wrap_cpp(MOC_SRCS
bootmanager.hxx
debugger/callstack.hxx
debugger/disassembler.hxx
debugger/graphics.hxx
debugger/graphics_cmdlists.hxx
debugger/registers.hxx
debugger/ramview.hxx
hotkeys.hxx

View file

@ -130,6 +130,8 @@
<ClCompile Include="config\controller_config.cpp" />
<ClCompile Include="config\controller_config_util.cpp" />
<ClCompile Include="debugger\callstack.cpp" />
<ClCompile Include="debugger\graphics.cpp" />
<ClCompile Include="debugger\graphics_cmdlists.cpp" />
<ClCompile Include="debugger\registers.cpp" />
<ClCompile Include="debugger\disassembler.cpp" />
<ClCompile Include="debugger\ramview.cpp" />
@ -143,9 +145,11 @@
<MOC Include="..\..\externals\qhexedit\qhexedit_p.h" />
<MOC Include="..\..\externals\qhexedit\xbytearray.h" />
<MOC Include="debugger\callstack.hxx" />
<MOC Include="debugger\registers.hxx" />
<MOC Include="debugger\disassembler.hxx" />
<MOC Include="debugger\graphics.hxx" />
<MOC Include="debugger\graphics_cmdlists.hxx" />
<MOC Include="debugger\ramview.hxx" />
<MOC Include="debugger\registers.hxx" />
<MOC Include="bootmanager.hxx" />
<MOC Include="hotkeys.hxx" />
<MOC Include="main.hxx" />
@ -182,4 +186,4 @@
<ImportGroup Label="ExtensionTargets">
<Import Project="qt-build.targets" />
</ImportGroup>
</Project>
</Project>

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@ -36,10 +36,16 @@
<ClCompile Include="debugger\callstack.cpp">
<Filter>debugger</Filter>
</ClCompile>
<ClCompile Include="debugger\ramview.cpp">
<ClCompile Include="debugger\disassembler.cpp">
<Filter>debugger</Filter>
</ClCompile>
<ClCompile Include="debugger\disassembler.cpp">
<ClCompile Include="debugger\graphics.cpp">
<Filter>debugger</Filter>
</ClCompile>
<ClCompile Include="debugger\graphics_cmdlists.cpp">
<Filter>debugger</Filter>
</ClCompile>
<ClCompile Include="debugger\ramview.cpp">
<Filter>debugger</Filter>
</ClCompile>
<ClCompile Include="debugger\registers.cpp">
@ -65,10 +71,16 @@
<MOC Include="debugger\callstack.hxx">
<Filter>debugger</Filter>
</MOC>
<MOC Include="debugger\ramview.hxx">
<MOC Include="debugger\disassembler.hxx">
<Filter>debugger</Filter>
</MOC>
<MOC Include="debugger\disassembler.hxx">
<MOC Include="debugger\graphics.hxx">
<Filter>debugger</Filter>
</MOC>
<MOC Include="debugger\graphics_cmdlists.hxx">
<Filter>debugger</Filter>
</MOC>
<MOC Include="debugger\ramview.hxx">
<Filter>debugger</Filter>
</MOC>
<MOC Include="debugger\registers.hxx">
@ -106,4 +118,4 @@
<ItemGroup>
<Text Include="CMakeLists.txt" />
</ItemGroup>
</Project>
</Project>

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@ -0,0 +1,83 @@
// Copyright 2014 Citra Emulator Project
// Licensed under GPLv2
// Refer to the license.txt file included.
#include "graphics.hxx"
#include <QListView>
#include <QVBoxLayout>
#include <QDebug>
extern GraphicsDebugger g_debugger;
GPUCommandStreamItemModel::GPUCommandStreamItemModel(QObject* parent) : QAbstractListModel(parent), command_count(0)
{
connect(this, SIGNAL(GXCommandFinished(int)), this, SLOT(OnGXCommandFinishedInternal(int)));
}
int GPUCommandStreamItemModel::rowCount(const QModelIndex& parent) const
{
return command_count;
}
QVariant GPUCommandStreamItemModel::data(const QModelIndex& index, int role) const
{
if (!index.isValid())
return QVariant();
int command_index = index.row();
const GSP_GPU::GXCommand& command = GetDebugger()->ReadGXCommandHistory(command_index);
if (role == Qt::DisplayRole)
{
std::map<GSP_GPU::GXCommandId, const char*> command_names;
command_names[GSP_GPU::GXCommandId::REQUEST_DMA] = "REQUEST_DMA";
command_names[GSP_GPU::GXCommandId::SET_COMMAND_LIST_FIRST] = "SET_COMMAND_LIST_FIRST";
command_names[GSP_GPU::GXCommandId::SET_MEMORY_FILL] = "SET_MEMORY_FILL";
command_names[GSP_GPU::GXCommandId::SET_DISPLAY_TRANSFER] = "SET_DISPLAY_TRANSFER";
command_names[GSP_GPU::GXCommandId::SET_TEXTURE_COPY] = "SET_TEXTURE_COPY";
command_names[GSP_GPU::GXCommandId::SET_COMMAND_LIST_LAST] = "SET_COMMAND_LIST_LAST";
QString str = QString("%1 %2 %3 %4 %5 %6 %7 %8 %9").arg(command_names[static_cast<GSP_GPU::GXCommandId>(command.id)])
.arg(command.data[0], 8, 16, QLatin1Char('0'))
.arg(command.data[1], 8, 16, QLatin1Char('0'))
.arg(command.data[2], 8, 16, QLatin1Char('0'))
.arg(command.data[3], 8, 16, QLatin1Char('0'))
.arg(command.data[4], 8, 16, QLatin1Char('0'))
.arg(command.data[5], 8, 16, QLatin1Char('0'))
.arg(command.data[6], 8, 16, QLatin1Char('0'))
.arg(command.data[7], 8, 16, QLatin1Char('0'));
return QVariant(str);
}
else
{
return QVariant();
}
}
void GPUCommandStreamItemModel::GXCommandProcessed(int total_command_count)
{
emit GXCommandFinished(total_command_count);
}
void GPUCommandStreamItemModel::OnGXCommandFinishedInternal(int total_command_count)
{
if (total_command_count == 0)
return;
int prev_command_count = command_count;
command_count = total_command_count;
emit dataChanged(index(prev_command_count,0), index(total_command_count-1,0));
}
GPUCommandStreamWidget::GPUCommandStreamWidget(QWidget* parent) : QDockWidget(tr("Graphics Debugger"), parent)
{
// TODO: set objectName!
GPUCommandStreamItemModel* command_model = new GPUCommandStreamItemModel(this);
g_debugger.RegisterObserver(command_model);
QListView* command_list = new QListView;
command_list->setModel(command_model);
command_list->setFont(QFont("monospace"));
setWidget(command_list);
}

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@ -0,0 +1,43 @@
// Copyright 2014 Citra Emulator Project
// Licensed under GPLv2
// Refer to the license.txt file included.
#pragma once
#include <QAbstractListModel>
#include <QDockWidget>
#include "video_core/gpu_debugger.h"
class GPUCommandStreamItemModel : public QAbstractListModel, public GraphicsDebugger::DebuggerObserver
{
Q_OBJECT
public:
GPUCommandStreamItemModel(QObject* parent);
int rowCount(const QModelIndex& parent = QModelIndex()) const override;
QVariant data(const QModelIndex& index, int role = Qt::DisplayRole) const override;
public:
void GXCommandProcessed(int total_command_count) override;
public slots:
void OnGXCommandFinishedInternal(int total_command_count);
signals:
void GXCommandFinished(int total_command_count);
private:
int command_count;
};
class GPUCommandStreamWidget : public QDockWidget
{
Q_OBJECT
public:
GPUCommandStreamWidget(QWidget* parent = 0);
private:
};

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@ -0,0 +1,139 @@
// Copyright 2014 Citra Emulator Project
// Licensed under GPLv2
// Refer to the license.txt file included.
#include "graphics_cmdlists.hxx"
#include <QTreeView>
extern GraphicsDebugger g_debugger;
GPUCommandListModel::GPUCommandListModel(QObject* parent) : QAbstractItemModel(parent)
{
root_item = new TreeItem(TreeItem::ROOT, 0, NULL, this);
connect(this, SIGNAL(CommandListCalled()), this, SLOT(OnCommandListCalledInternal()), Qt::UniqueConnection);
}
QModelIndex GPUCommandListModel::index(int row, int column, const QModelIndex& parent) const
{
TreeItem* item;
if (!parent.isValid()) {
item = root_item;
} else {
item = (TreeItem*)parent.internalPointer();
}
return createIndex(row, column, item->children[row]);
}
QModelIndex GPUCommandListModel::parent(const QModelIndex& child) const
{
if (!child.isValid())
return QModelIndex();
TreeItem* item = (TreeItem*)child.internalPointer();
if (item->parent == NULL)
return QModelIndex();
return createIndex(item->parent->index, 0, item->parent);
}
int GPUCommandListModel::rowCount(const QModelIndex& parent) const
{
TreeItem* item;
if (!parent.isValid()) {
item = root_item;
} else {
item = (TreeItem*)parent.internalPointer();
}
return item->children.size();
}
int GPUCommandListModel::columnCount(const QModelIndex& parent) const
{
return 2;
}
QVariant GPUCommandListModel::data(const QModelIndex& index, int role) const
{
if (!index.isValid())
return QVariant();
const TreeItem* item = (const TreeItem*)index.internalPointer();
if (item->type == TreeItem::COMMAND_LIST)
{
const GraphicsDebugger::PicaCommandList& cmdlist = command_lists[item->index].second;
u32 address = command_lists[item->index].first;
if (role == Qt::DisplayRole && index.column() == 0)
{
return QVariant(QString("0x%1 bytes at 0x%2").arg(cmdlist.size(), 0, 16).arg(address, 8, 16, QLatin1Char('0')));
}
}
else
{
// index refers to a specific command
const GraphicsDebugger::PicaCommandList& cmdlist = command_lists[item->parent->index].second;
const GraphicsDebugger::PicaCommand& cmd = cmdlist[item->index];
const Pica::CommandHeader& header = cmd.GetHeader();
if (role == Qt::DisplayRole) {
QString content;
if (index.column() == 0) {
content = Pica::command_names[header.cmd_id];
content.append(" ");
} else if (index.column() == 1) {
for (int j = 0; j < cmd.size(); ++j)
content.append(QString("%1 ").arg(cmd[j], 8, 16, QLatin1Char('0')));
}
return QVariant(content);
}
}
return QVariant();
}
void GPUCommandListModel::OnCommandListCalled(const GraphicsDebugger::PicaCommandList& lst, bool is_new)
{
emit CommandListCalled();
}
void GPUCommandListModel::OnCommandListCalledInternal()
{
beginResetModel();
command_lists = GetDebugger()->GetCommandLists();
// delete root item and rebuild tree
delete root_item;
root_item = new TreeItem(TreeItem::ROOT, 0, NULL, this);
for (int command_list_idx = 0; command_list_idx < command_lists.size(); ++command_list_idx) {
TreeItem* command_list_item = new TreeItem(TreeItem::COMMAND_LIST, command_list_idx, root_item, root_item);
root_item->children.push_back(command_list_item);
const GraphicsDebugger::PicaCommandList& command_list = command_lists[command_list_idx].second;
for (int command_idx = 0; command_idx < command_list.size(); ++command_idx) {
TreeItem* command_item = new TreeItem(TreeItem::COMMAND, command_idx, command_list_item, command_list_item);
command_list_item->children.push_back(command_item);
}
}
endResetModel();
}
GPUCommandListWidget::GPUCommandListWidget(QWidget* parent) : QDockWidget(tr("Pica Command List"), parent)
{
GPUCommandListModel* model = new GPUCommandListModel(this);
g_debugger.RegisterObserver(model);
QTreeView* tree_widget = new QTreeView;
tree_widget->setModel(model);
tree_widget->setFont(QFont("monospace"));
setWidget(tree_widget);
}

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@ -0,0 +1,64 @@
// Copyright 2014 Citra Emulator Project
// Licensed under GPLv2
// Refer to the license.txt file included.
#pragma once
#include <QAbstractItemModel>
#include <QDockWidget>
#include "video_core/gpu_debugger.h"
// TODO: Rename class, since it's not actually a list model anymore...
class GPUCommandListModel : public QAbstractItemModel, public GraphicsDebugger::DebuggerObserver
{
Q_OBJECT
public:
GPUCommandListModel(QObject* parent);
QModelIndex index(int row, int column, const QModelIndex& parent = QModelIndex()) const;
QModelIndex parent(const QModelIndex& child) const;
int columnCount(const QModelIndex& parent = QModelIndex()) const;
int rowCount(const QModelIndex& parent = QModelIndex()) const override;
QVariant data(const QModelIndex& index, int role = Qt::DisplayRole) const override;
public:
void OnCommandListCalled(const GraphicsDebugger::PicaCommandList& lst, bool is_new) override;
public slots:
void OnCommandListCalledInternal();
signals:
void CommandListCalled();
private:
struct TreeItem : public QObject
{
enum Type {
ROOT,
COMMAND_LIST,
COMMAND
};
TreeItem(Type type, int index, TreeItem* item_parent, QObject* parent) : QObject(parent), type(type), index(index), parent(item_parent) {}
Type type;
int index;
std::vector<TreeItem*> children;
TreeItem* parent;
};
std::vector<std::pair<u32,GraphicsDebugger::PicaCommandList>> command_lists;
TreeItem* root_item;
};
class GPUCommandListWidget : public QDockWidget
{
Q_OBJECT
public:
GPUCommandListWidget(QWidget* parent = 0);
private:
};

View file

@ -19,6 +19,8 @@
#include "debugger/registers.hxx"
#include "debugger/callstack.hxx"
#include "debugger/ramview.hxx"
#include "debugger/graphics.hxx"
#include "debugger/graphics_cmdlists.hxx"
#include "core/system.h"
#include "core/loader.h"
@ -47,10 +49,20 @@ GMainWindow::GMainWindow()
addDockWidget(Qt::RightDockWidgetArea, callstackWidget);
callstackWidget->hide();
graphicsWidget = new GPUCommandStreamWidget(this);
addDockWidget(Qt::RightDockWidgetArea, graphicsWidget);
callstackWidget->hide();
graphicsCommandsWidget = new GPUCommandListWidget(this);
addDockWidget(Qt::RightDockWidgetArea, graphicsCommandsWidget);
callstackWidget->hide();
QMenu* debug_menu = ui.menu_View->addMenu(tr("Debugging"));
debug_menu->addAction(disasmWidget->toggleViewAction());
debug_menu->addAction(registersWidget->toggleViewAction());
debug_menu->addAction(callstackWidget->toggleViewAction());
debug_menu->addAction(graphicsWidget->toggleViewAction());
debug_menu->addAction(graphicsCommandsWidget->toggleViewAction());
// Set default UI state
// geometry: 55% of the window contents are in the upper screen half, 45% in the lower half

View file

@ -10,6 +10,8 @@ class GRenderWindow;
class DisassemblerWidget;
class RegistersWidget;
class CallstackWidget;
class GPUCommandStreamWidget;
class GPUCommandListWidget;
class GMainWindow : public QMainWindow
{
@ -50,6 +52,8 @@ private:
DisassemblerWidget* disasmWidget;
RegistersWidget* registersWidget;
CallstackWidget* callstackWidget;
GPUCommandStreamWidget* graphicsWidget;
GPUCommandListWidget* graphicsCommandsWidget;
};
#endif // _CITRA_QT_MAIN_HXX_

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@ -182,6 +182,7 @@
<ClInclude Include="mem_arena.h" />
<ClInclude Include="msg_handler.h" />
<ClInclude Include="platform.h" />
<ClInclude Include="register_set.h" />
<ClInclude Include="scm_rev.h" />
<ClInclude Include="std_condition_variable.h" />
<ClInclude Include="std_mutex.h" />
@ -221,4 +222,4 @@
<Import Project="$(VCTargetsPath)\Microsoft.Cpp.targets" />
<ImportGroup Label="ExtensionTargets">
</ImportGroup>
</Project>
</Project>

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@ -4,6 +4,7 @@
<ClInclude Include="atomic.h" />
<ClInclude Include="atomic_gcc.h" />
<ClInclude Include="atomic_win32.h" />
<ClInclude Include="bit_field.h" />
<ClInclude Include="break_points.h" />
<ClInclude Include="chunk_file.h" />
<ClInclude Include="common.h" />
@ -28,6 +29,7 @@
<ClInclude Include="memory_util.h" />
<ClInclude Include="msg_handler.h" />
<ClInclude Include="platform.h" />
<ClInclude Include="register_set.h" />
<ClInclude Include="std_condition_variable.h" />
<ClInclude Include="std_mutex.h" />
<ClInclude Include="std_thread.h" />
@ -39,7 +41,6 @@
<ClInclude Include="utf8.h" />
<ClInclude Include="symbols.h" />
<ClInclude Include="scm_rev.h" />
<ClInclude Include="bit_field.h" />
<ClInclude Include="thread_queue_list.h" />
</ItemGroup>
<ItemGroup>
@ -65,4 +66,4 @@
<ItemGroup>
<Text Include="CMakeLists.txt" />
</ItemGroup>
</Project>
</Project>

View file

@ -60,7 +60,7 @@ enum LOG_TYPE {
NDMA,
HLE,
RENDER,
LCD,
GPU,
HW,
TIME,
NETPLAY,

View file

@ -65,7 +65,7 @@ LogManager::LogManager()
m_Log[LogTypes::WII_IPC_ES] = new LogContainer("WII_IPC_ES", "WII IPC ES");
m_Log[LogTypes::WII_IPC_FILEIO] = new LogContainer("WII_IPC_FILEIO", "WII IPC FILEIO");
m_Log[LogTypes::RENDER] = new LogContainer("RENDER", "RENDER");
m_Log[LogTypes::LCD] = new LogContainer("LCD", "LCD");
m_Log[LogTypes::GPU] = new LogContainer("GPU", "GPU");
m_Log[LogTypes::SVC] = new LogContainer("SVC", "Supervisor Call HLE");
m_Log[LogTypes::NDMA] = new LogContainer("NDMA", "NDMA");
m_Log[LogTypes::HLE] = new LogContainer("HLE", "High Level Emulation");

161
src/common/register_set.h Normal file
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@ -0,0 +1,161 @@
// Copyright 2014 Citra Emulator Project
// Licensed under GPLv2
// Refer to the license.txt file included.
#pragma once
// Copyright 2014 Tony Wasserka
// All rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are met:
//
// * Redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer.
// * Redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution.
// * Neither the name of the owner nor the names of its contributors may
// be used to endorse or promote products derived from this software
// without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
/*
* Standardized way to define a group of registers and corresponding data structures. To define
* a new register set, first define struct containing an enumeration called "Id" containing
* all register IDs and a template union called "Struct". Specialize the Struct union for any
* register ID which needs to be accessed in a specialized way. You can then declare the object
* containing all register values using the RegisterSet<BaseType, DefiningStruct> type, where
* BaseType is the underlying type of each register (e.g. u32).
* Of course, you'll usually want to implement the Struct template such that they are of the same
* size as BaseType. However, it's also possible to make it larger, e.g. when you want to describe
* multiple registers with the same structure.
*
* Example:
*
* struct Regs {
* enum Id : u32 {
* Value1 = 0,
* Value2 = 1,
* Value3 = 2,
* NumIds = 3
* };
*
* // declare register definition structures
* template<Id id>
* union Struct;
* };
*
* // Define register set object
* RegisterSet<u32, CommandIds> registers;
*
* // define register definition structures
* template<>
* union Regs::Struct<Regs::Value1> {
* BitField<0, 4, u32> some_field;
* BitField<4, 3, u32> some_other_field;
* };
*
* Usage in external code (within SomeNamespace scope):
*
* For a register which maps to a single index:
* registers.Get<Regs::Value1>().some_field = some_value;
*
* For a register which maps to different indices, e.g. a group of similar registers
* registers.Get<Regs::Value1>(index).some_field = some_value;
*
*
* @tparam BaseType Base type used for storing individual registers, e.g. u32
* @tparam RegDefinition Class defining an enumeration called "Id" and a template<Id id> union, as described above.
* @note RegDefinition::Id needs to have an enum value called NumIds defining the number of registers to be allocated.
*/
template<typename BaseType, typename RegDefinition>
struct RegisterSet {
// Register IDs
using Id = typename RegDefinition::Id;
// type used for *this
using ThisType = RegisterSet<BaseType, RegDefinition>;
// Register definition structs, defined in RegDefinition
template<Id id>
using Struct = typename RegDefinition::template Struct<id>;
/*
* Lookup register with the given id and return it as the corresponding structure type.
* @note This just forwards the arguments to Get(Id).
*/
template<Id id>
const Struct<id>& Get() const {
return Get<id>(id);
}
/*
* Lookup register with the given id and return it as the corresponding structure type.
* @note This just forwards the arguments to Get(Id).
*/
template<Id id>
Struct<id>& Get() {
return Get<id>(id);
}
/*
* Lookup register with the given index and return it as the corresponding structure type.
* @todo Is this portable with regards to structures larger than BaseType?
* @note if index==id, you don't need to specify the function parameter.
*/
template<Id id>
const Struct<id>& Get(const Id& index) const {
const int idx = static_cast<size_t>(index);
return *reinterpret_cast<const Struct<id>*>(&raw[idx]);
}
/*
* Lookup register with the given index and return it as the corresponding structure type.
* @note This just forwards the arguments to the const version of Get(Id).
* @note if index==id, you don't need to specify the function parameter.
*/
template<Id id>
Struct<id>& Get(const Id& index) {
return const_cast<Struct<id>&>(GetThis().Get<id>(index));
}
/*
* Plain array access.
* @note If you want to have this casted to a register defininition struct, use Get() instead.
*/
const BaseType& operator[] (const Id& id) const {
return raw[static_cast<size_t>(id)];
}
/*
* Plain array access.
* @note If you want to have this casted to a register defininition struct, use Get() instead.
* @note This operator just forwards its argument to the const version.
*/
BaseType& operator[] (const Id& id) {
return const_cast<BaseType&>(GetThis()[id]);
}
private:
/*
* Returns a const reference to "this".
*/
const ThisType& GetThis() const {
return static_cast<const ThisType&>(*this);
}
BaseType raw[Id::NumIds];
};

View file

@ -42,8 +42,8 @@ set(SRCS core.cpp
hle/service/hid.cpp
hle/service/service.cpp
hle/service/srv.cpp
hw/gpu.cpp
hw/hw.cpp
hw/lcd.cpp
hw/ndma.cpp)
set(HEADERS core.h
@ -88,8 +88,8 @@ set(HEADERS core.h
hle/service/hid.h
hle/service/service.h
hle/service/srv.h
hw/gpu.h
hw/hw.h
hw/lcd.h
hw/ndma.h)
add_library(core STATIC ${SRCS} ${HEADERS})

View file

@ -177,8 +177,8 @@
<ClCompile Include="hle\service\service.cpp" />
<ClCompile Include="hle\service\srv.cpp" />
<ClCompile Include="hle\svc.cpp" />
<ClCompile Include="hw\gpu.cpp" />
<ClCompile Include="hw\hw.cpp" />
<ClCompile Include="hw\lcd.cpp" />
<ClCompile Include="hw\ndma.cpp" />
<ClCompile Include="loader.cpp" />
<ClCompile Include="mem_map.cpp" />
@ -226,8 +226,8 @@
<ClInclude Include="hle\service\service.h" />
<ClInclude Include="hle\service\srv.h" />
<ClInclude Include="hle\svc.h" />
<ClInclude Include="hw\gpu.h" />
<ClInclude Include="hw\hw.h" />
<ClInclude Include="hw\lcd.h" />
<ClInclude Include="hw\ndma.h" />
<ClInclude Include="loader.h" />
<ClInclude Include="mem_map.h" />
@ -239,4 +239,4 @@
<Import Project="$(VCTargetsPath)\Microsoft.Cpp.targets" />
<ImportGroup Label="ExtensionTargets">
</ImportGroup>
</Project>
</Project>

View file

@ -102,7 +102,7 @@
<ClCompile Include="hw\ndma.cpp">
<Filter>hw</Filter>
</ClCompile>
<ClCompile Include="hw\lcd.cpp">
<ClCompile Include="hw\gpu.cpp">
<Filter>hw</Filter>
</ClCompile>
<ClCompile Include="arm\disassembler\load_symbol_map.cpp">
@ -244,7 +244,7 @@
<ClInclude Include="hw\ndma.h">
<Filter>hw</Filter>
</ClInclude>
<ClInclude Include="hw\lcd.h">
<ClInclude Include="hw\gpu.h">
<Filter>hw</Filter>
</ClInclude>
<ClInclude Include="arm\disassembler\load_symbol_map.h">
@ -299,4 +299,4 @@
<ItemGroup>
<Text Include="CMakeLists.txt" />
</ItemGroup>
</Project>
</Project>

View file

@ -10,25 +10,29 @@
#include "core/hle/hle.h"
#include "core/hle/service/gsp.h"
#include "core/hw/lcd.h"
#include "core/hw/gpu.h"
#include "video_core/gpu_debugger.h"
////////////////////////////////////////////////////////////////////////////////////////////////////
// Main graphics debugger object - TODO: Here is probably not the best place for this
GraphicsDebugger g_debugger;
/// GSP shared memory GX command buffer header
union GX_CmdBufferHeader {
u32 hex;
// Current command index. This index is updated by GSP module after loading the command data,
// right before the command is processed. When this index is updated by GSP module, the total
// Current command index. This index is updated by GSP module after loading the command data,
// right before the command is processed. When this index is updated by GSP module, the total
// commands field is decreased by one as well.
BitField<0,8,u32> index;
// Total commands to process, must not be value 0 when GSP module handles commands. This must be
// <=15 when writing a command to shared memory. This is incremented by the application when
// writing a command to shared memory, after increasing this value TriggerCmdReqQueue is only
// <=15 when writing a command to shared memory. This is incremented by the application when
// writing a command to shared memory, after increasing this value TriggerCmdReqQueue is only
// used if this field is value 1.
BitField<8,8,u32> number_commands;
};
/// Gets the address of the start (header) of a command buffer in GSP shared memory
@ -44,7 +48,11 @@ static inline u8* GX_GetCmdBufferPointer(u32 thread_id, u32 offset=0) {
/// Finishes execution of a GSP command
void GX_FinishCommand(u32 thread_id) {
GX_CmdBufferHeader* header = (GX_CmdBufferHeader*)GX_GetCmdBufferPointer(thread_id);
g_debugger.GXCommandProcessed(GX_GetCmdBufferPointer(thread_id, 0x20 + (header->index * 0x20)));
header->number_commands = header->number_commands - 1;
// TODO: Increment header->index?
}
////////////////////////////////////////////////////////////////////////////////////////////////////
@ -54,10 +62,6 @@ namespace GSP_GPU {
u32 g_thread_id = 0;
enum {
CMD_GX_REQUEST_DMA = 0x00000000,
};
enum {
REG_FRAMEBUFFER_1 = 0x00400468,
REG_FRAMEBUFFER_2 = 0x00400494,
@ -65,14 +69,14 @@ enum {
/// Read a GSP GPU hardware register
void ReadHWRegs(Service::Interface* self) {
static const u32 framebuffer_1[] = {LCD::PADDR_VRAM_TOP_LEFT_FRAME1, LCD::PADDR_VRAM_TOP_RIGHT_FRAME1};
static const u32 framebuffer_2[] = {LCD::PADDR_VRAM_TOP_LEFT_FRAME2, LCD::PADDR_VRAM_TOP_RIGHT_FRAME2};
static const u32 framebuffer_1[] = {GPU::PADDR_VRAM_TOP_LEFT_FRAME1, GPU::PADDR_VRAM_TOP_RIGHT_FRAME1};
static const u32 framebuffer_2[] = {GPU::PADDR_VRAM_TOP_LEFT_FRAME2, GPU::PADDR_VRAM_TOP_RIGHT_FRAME2};
u32* cmd_buff = Service::GetCommandBuffer();
u32 reg_addr = cmd_buff[1];
u32 size = cmd_buff[2];
u32* dst = (u32*)Memory::GetPointer(cmd_buff[0x41]);
switch (reg_addr) {
// NOTE: Calling SetFramebufferLocation here is a hack... Not sure the correct way yet to set
@ -81,13 +85,13 @@ void ReadHWRegs(Service::Interface* self) {
// Top framebuffer 1 addresses
case REG_FRAMEBUFFER_1:
LCD::SetFramebufferLocation(LCD::FRAMEBUFFER_LOCATION_VRAM);
GPU::SetFramebufferLocation(GPU::FRAMEBUFFER_LOCATION_VRAM);
memcpy(dst, framebuffer_1, size);
break;
// Top framebuffer 2 addresses
case REG_FRAMEBUFFER_2:
LCD::SetFramebufferLocation(LCD::FRAMEBUFFER_LOCATION_VRAM);
GPU::SetFramebufferLocation(GPU::FRAMEBUFFER_LOCATION_VRAM);
memcpy(dst, framebuffer_2, size);
break;
@ -101,25 +105,54 @@ void RegisterInterruptRelayQueue(Service::Interface* self) {
u32* cmd_buff = Service::GetCommandBuffer();
u32 flags = cmd_buff[1];
u32 event_handle = cmd_buff[3]; // TODO(bunnei): Implement event handling
cmd_buff[2] = g_thread_id; // ThreadID
}
/// This triggers handling of the GX command written to the command buffer in shared memory.
void TriggerCmdReqQueue(Service::Interface* self) {
GX_CmdBufferHeader* header = (GX_CmdBufferHeader*)GX_GetCmdBufferPointer(g_thread_id);
u32* cmd_buff = (u32*)GX_GetCmdBufferPointer(g_thread_id, 0x20 + (header->index * 0x20));
switch (cmd_buff[0]) {
switch (static_cast<GXCommandId>(cmd_buff[0])) {
// GX request DMA - typically used for copying memory from GSP heap to VRAM
case CMD_GX_REQUEST_DMA:
case GXCommandId::REQUEST_DMA:
memcpy(Memory::GetPointer(cmd_buff[2]), Memory::GetPointer(cmd_buff[1]), cmd_buff[3]);
break;
case GXCommandId::SET_COMMAND_LIST_LAST:
GPU::Write<u32>(GPU::Registers::CommandListAddress, cmd_buff[1] >> 3);
GPU::Write<u32>(GPU::Registers::CommandListSize, cmd_buff[2] >> 3);
GPU::Write<u32>(GPU::Registers::ProcessCommandList, 1); // TODO: Not sure if we are supposed to always write this
// TODO: Move this to GPU
// TODO: Not sure what units the size is measured in
g_debugger.CommandListCalled(cmd_buff[1], (u32*)Memory::GetPointer(cmd_buff[1]), cmd_buff[2]);
break;
case GXCommandId::SET_MEMORY_FILL:
break;
case GXCommandId::SET_DISPLAY_TRANSFER:
break;
case GXCommandId::SET_TEXTURE_COPY:
break;
case GXCommandId::SET_COMMAND_LIST_FIRST:
{
//u32* buf0_data = (u32*)Memory::GetPointer(cmd_buff[1]);
//u32* buf1_data = (u32*)Memory::GetPointer(cmd_buff[3]);
//u32* buf2_data = (u32*)Memory::GetPointer(cmd_buff[5]);
break;
}
default:
ERROR_LOG(GSP, "TriggerCmdReqQueue unknown command 0x%08X", cmd_buff[0]);
}
GX_FinishCommand(g_thread_id);
}

View file

@ -11,6 +11,23 @@
namespace GSP_GPU {
enum class GXCommandId : u32 {
REQUEST_DMA = 0x00000000,
SET_COMMAND_LIST_LAST = 0x00000001,
SET_MEMORY_FILL = 0x00000002, // TODO: Confirm? (lictru uses 0x01000102)
SET_DISPLAY_TRANSFER = 0x00000003,
SET_TEXTURE_COPY = 0x00000004,
SET_COMMAND_LIST_FIRST = 0x00000005,
};
union GXCommand {
struct {
GXCommandId id;
};
u32 data[0x20];
};
/// Interface to "srv:" service
class Interface : public Service::Interface {
public:

View file

@ -7,13 +7,13 @@
#include "core/core.h"
#include "core/mem_map.h"
#include "core/hw/lcd.h"
#include "core/hle/kernel/thread.h"
#include "core/hw/gpu.h"
#include "video_core/video_core.h"
#include "core/hle/kernel/thread.h"
namespace LCD {
namespace GPU {
Registers g_regs;
@ -61,7 +61,7 @@ const FramebufferLocation GetFramebufferLocation() {
} else if ((g_regs.framebuffer_top_right_1 & ~Memory::FCRAM_MASK) == Memory::FCRAM_PADDR) {
return FRAMEBUFFER_LOCATION_FCRAM;
} else {
ERROR_LOG(LCD, "unknown framebuffer location!");
ERROR_LOG(GPU, "unknown framebuffer location!");
}
return FRAMEBUFFER_LOCATION_UNKNOWN;
}
@ -78,7 +78,7 @@ const u8* GetFramebufferPointer(const u32 address) {
case FRAMEBUFFER_LOCATION_VRAM:
return (const u8*)Memory::GetPointer(Memory::VirtualAddressFromPhysical_VRAM(address));
default:
ERROR_LOG(LCD, "unknown framebuffer location");
ERROR_LOG(GPU, "unknown framebuffer location");
}
return NULL;
}
@ -86,34 +86,73 @@ const u8* GetFramebufferPointer(const u32 address) {
template <typename T>
inline void Read(T &var, const u32 addr) {
switch (addr) {
case REG_FRAMEBUFFER_TOP_LEFT_1:
case Registers::FramebufferTopLeft1:
var = g_regs.framebuffer_top_left_1;
break;
case REG_FRAMEBUFFER_TOP_LEFT_2:
case Registers::FramebufferTopLeft2:
var = g_regs.framebuffer_top_left_2;
break;
case REG_FRAMEBUFFER_TOP_RIGHT_1:
case Registers::FramebufferTopRight1:
var = g_regs.framebuffer_top_right_1;
break;
case REG_FRAMEBUFFER_TOP_RIGHT_2:
case Registers::FramebufferTopRight2:
var = g_regs.framebuffer_top_right_2;
break;
case REG_FRAMEBUFFER_SUB_LEFT_1:
case Registers::FramebufferSubLeft1:
var = g_regs.framebuffer_sub_left_1;
break;
case REG_FRAMEBUFFER_SUB_RIGHT_1:
case Registers::FramebufferSubRight1:
var = g_regs.framebuffer_sub_right_1;
break;
case Registers::CommandListSize:
var = g_regs.command_list_size;
break;
case Registers::CommandListAddress:
var = g_regs.command_list_address;
break;
case Registers::ProcessCommandList:
var = g_regs.command_processing_enabled;
break;
default:
ERROR_LOG(LCD, "unknown Read%d @ 0x%08X", sizeof(var) * 8, addr);
ERROR_LOG(GPU, "unknown Read%d @ 0x%08X", sizeof(var) * 8, addr);
break;
}
}
template <typename T>
inline void Write(u32 addr, const T data) {
ERROR_LOG(LCD, "unknown Write%d 0x%08X @ 0x%08X", sizeof(data) * 8, data, addr);
switch (static_cast<Registers::Id>(addr)) {
case Registers::CommandListSize:
g_regs.command_list_size = data;
break;
case Registers::CommandListAddress:
g_regs.command_list_address = data;
break;
case Registers::ProcessCommandList:
g_regs.command_processing_enabled = data;
if (g_regs.command_processing_enabled & 1)
{
// u32* buffer = (u32*)Memory::GetPointer(g_regs.command_list_address << 3);
ERROR_LOG(GPU, "Beginning %x bytes of commands from address %x", g_regs.command_list_size, g_regs.command_list_address << 3);
// TODO: Process command list!
}
break;
default:
ERROR_LOG(GPU, "unknown Write%d 0x%08X @ 0x%08X", sizeof(data) * 8, data, addr);
break;
}
}
// Explicitly instantiate template functions because we aren't defining this in the header:
@ -144,12 +183,12 @@ void Update() {
void Init() {
g_last_ticks = Core::g_app_core->GetTicks();
SetFramebufferLocation(FRAMEBUFFER_LOCATION_FCRAM);
NOTICE_LOG(LCD, "initialized OK");
NOTICE_LOG(GPU, "initialized OK");
}
/// Shutdown hardware
void Shutdown() {
NOTICE_LOG(LCD, "shutdown OK");
NOTICE_LOG(GPU, "shutdown OK");
}
} // namespace

View file

@ -6,9 +6,24 @@
#include "common/common_types.h"
namespace LCD {
namespace GPU {
struct Registers {
enum Id : u32 {
FramebufferTopLeft1 = 0x1EF00468, // Main LCD, first framebuffer for 3D left
FramebufferTopLeft2 = 0x1EF0046C, // Main LCD, second framebuffer for 3D left
FramebufferTopRight1 = 0x1EF00494, // Main LCD, first framebuffer for 3D right
FramebufferTopRight2 = 0x1EF00498, // Main LCD, second framebuffer for 3D right
FramebufferSubLeft1 = 0x1EF00568, // Sub LCD, first framebuffer
FramebufferSubLeft2 = 0x1EF0056C, // Sub LCD, second framebuffer
FramebufferSubRight1 = 0x1EF00594, // Sub LCD, unused first framebuffer
FramebufferSubRight2 = 0x1EF00598, // Sub LCD, unused second framebuffer
CommandListSize = 0x1EF018E0,
CommandListAddress = 0x1EF018E8,
ProcessCommandList = 0x1EF018F0,
};
u32 framebuffer_top_left_1;
u32 framebuffer_top_left_2;
u32 framebuffer_top_right_1;
@ -17,6 +32,10 @@ struct Registers {
u32 framebuffer_sub_left_2;
u32 framebuffer_sub_right_1;
u32 framebuffer_sub_right_2;
u32 command_list_size;
u32 command_list_address;
u32 command_processing_enabled;
};
extern Registers g_regs;
@ -24,7 +43,7 @@ extern Registers g_regs;
enum {
TOP_ASPECT_X = 0x5,
TOP_ASPECT_Y = 0x3,
TOP_HEIGHT = 240,
TOP_WIDTH = 400,
BOTTOM_WIDTH = 320,
@ -48,21 +67,10 @@ enum {
PADDR_VRAM_SUB_FRAME2 = 0x18249CF0,
};
enum {
REG_FRAMEBUFFER_TOP_LEFT_1 = 0x1EF00468, // Main LCD, first framebuffer for 3D left
REG_FRAMEBUFFER_TOP_LEFT_2 = 0x1EF0046C, // Main LCD, second framebuffer for 3D left
REG_FRAMEBUFFER_TOP_RIGHT_1 = 0x1EF00494, // Main LCD, first framebuffer for 3D right
REG_FRAMEBUFFER_TOP_RIGHT_2 = 0x1EF00498, // Main LCD, second framebuffer for 3D right
REG_FRAMEBUFFER_SUB_LEFT_1 = 0x1EF00568, // Sub LCD, first framebuffer
REG_FRAMEBUFFER_SUB_LEFT_2 = 0x1EF0056C, // Sub LCD, second framebuffer
REG_FRAMEBUFFER_SUB_RIGHT_1 = 0x1EF00594, // Sub LCD, unused first framebuffer
REG_FRAMEBUFFER_SUB_RIGHT_2 = 0x1EF00598, // Sub LCD, unused second framebuffer
};
/// Framebuffer location
enum FramebufferLocation {
FRAMEBUFFER_LOCATION_UNKNOWN, ///< Framebuffer location is unknown
FRAMEBUFFER_LOCATION_FCRAM, ///< Framebuffer is in the GSP heap
FRAMEBUFFER_LOCATION_FCRAM, ///< Framebuffer is in the GSP heap
FRAMEBUFFER_LOCATION_VRAM, ///< Framebuffer is in VRAM
};

View file

@ -6,7 +6,7 @@
#include "common/log.h"
#include "core/hw/hw.h"
#include "core/hw/lcd.h"
#include "core/hw/gpu.h"
#include "core/hw/ndma.h"
namespace HW {
@ -34,7 +34,7 @@ enum {
VADDR_CDMA = 0xFFFDA000, // CoreLink DMA-330? Info
VADDR_DSP_2 = 0x1ED03000,
VADDR_HASH_2 = 0x1EE01000,
VADDR_LCD = 0x1EF00000,
VADDR_GPU = 0x1EF00000,
};
template <typename T>
@ -46,8 +46,8 @@ inline void Read(T &var, const u32 addr) {
// NDMA::Read(var, addr);
// break;
case VADDR_LCD:
LCD::Read(var, addr);
case VADDR_GPU:
GPU::Read(var, addr);
break;
default:
@ -64,8 +64,8 @@ inline void Write(u32 addr, const T data) {
// NDMA::Write(addr, data);
// break;
case VADDR_LCD:
LCD::Write(addr, data);
case VADDR_GPU:
GPU::Write(addr, data);
break;
default:
@ -87,13 +87,13 @@ template void Write<u8>(u32 addr, const u8 data);
/// Update hardware
void Update() {
LCD::Update();
GPU::Update();
NDMA::Update();
}
/// Initialize hardware
void Init() {
LCD::Init();
GPU::Init();
NDMA::Init();
NOTICE_LOG(HW, "initialized OK");
}

View file

@ -37,12 +37,12 @@ void Update() {
/// Initialize hardware
void Init() {
NOTICE_LOG(LCD, "initialized OK");
NOTICE_LOG(GPU, "initialized OK");
}
/// Shutdown hardware
void Shutdown() {
NOTICE_LOG(LCD, "shutdown OK");
NOTICE_LOG(GPU, "shutdown OK");
}
} // namespace

View file

@ -0,0 +1,157 @@
// Copyright 2014 Citra Emulator Project
// Licensed under GPLv2
// Refer to the license.txt file included.
#pragma once
#include <algorithm>
#include <functional>
#include <vector>
#include "common/log.h"
#include "core/hle/service/gsp.h"
#include "pica.h"
class GraphicsDebugger
{
public:
// A few utility structs used to expose data
// A vector of commands represented by their raw byte sequence
struct PicaCommand : public std::vector<u32>
{
Pica::CommandHeader& GetHeader()
{
u32& val = at(1);
return *(Pica::CommandHeader*)&val;
}
};
typedef std::vector<PicaCommand> PicaCommandList;
// Base class for all objects which need to be notified about GPU events
class DebuggerObserver
{
public:
DebuggerObserver() : observed(nullptr) { }
virtual ~DebuggerObserver()
{
if (observed)
observed->UnregisterObserver(this);
}
/**
* Called when a GX command has been processed and is ready for being
* read via GraphicsDebugger::ReadGXCommandHistory.
* @param total_command_count Total number of commands in the GX history
* @note All methods in this class are called from the GSP thread
*/
virtual void GXCommandProcessed(int total_command_count)
{
const GSP_GPU::GXCommand& cmd = observed->ReadGXCommandHistory(total_command_count-1);
ERROR_LOG(GSP, "Received command: id=%x", cmd.id);
}
/**
* @param lst command list which triggered this call
* @param is_new true if the command list was called for the first time
* @todo figure out how to make sure called functions don't keep references around beyond their life time
*/
virtual void OnCommandListCalled(const PicaCommandList& lst, bool is_new)
{
ERROR_LOG(GSP, "Command list called: %d", (int)is_new);
}
protected:
GraphicsDebugger* GetDebugger()
{
return observed;
}
private:
GraphicsDebugger* observed;
bool in_destruction;
friend class GraphicsDebugger;
};
void GXCommandProcessed(u8* command_data)
{
gx_command_history.push_back(GSP_GPU::GXCommand());
GSP_GPU::GXCommand& cmd = gx_command_history[gx_command_history.size()-1];
const int cmd_length = sizeof(GSP_GPU::GXCommand);
memcpy(cmd.data, command_data, cmd_length);
ForEachObserver([this](DebuggerObserver* observer) {
observer->GXCommandProcessed(this->gx_command_history.size());
} );
}
void CommandListCalled(u32 address, u32* command_list, u32 size_in_words)
{
PicaCommandList cmdlist;
for (u32* parse_pointer = command_list; parse_pointer < command_list + size_in_words;)
{
const Pica::CommandHeader header = static_cast<Pica::CommandHeader>(parse_pointer[1]);
cmdlist.push_back(PicaCommand());
auto& cmd = cmdlist.back();
size_t size = 2 + header.extra_data_length;
size = (size + 1) / 2 * 2; // align to 8 bytes
cmd.reserve(size);
std::copy(parse_pointer, parse_pointer + size, std::back_inserter(cmd));
parse_pointer += size;
}
auto obj = std::pair<u32,PicaCommandList>(address, cmdlist);
auto it = std::find(command_lists.begin(), command_lists.end(), obj);
bool is_new = (it == command_lists.end());
if (is_new)
command_lists.push_back(obj);
ForEachObserver([&](DebuggerObserver* observer) {
observer->OnCommandListCalled(obj.second, is_new);
} );
}
const GSP_GPU::GXCommand& ReadGXCommandHistory(int index) const
{
// TODO: Is this thread-safe?
return gx_command_history[index];
}
const std::vector<std::pair<u32,PicaCommandList>>& GetCommandLists() const
{
return command_lists;
}
void RegisterObserver(DebuggerObserver* observer)
{
// TODO: Check for duplicates
observers.push_back(observer);
observer->observed = this;
}
void UnregisterObserver(DebuggerObserver* observer)
{
std::remove(observers.begin(), observers.end(), observer);
observer->observed = nullptr;
}
private:
void ForEachObserver(std::function<void (DebuggerObserver*)> func)
{
std::for_each(observers.begin(),observers.end(), func);
}
std::vector<DebuggerObserver*> observers;
std::vector<GSP_GPU::GXCommand> gx_command_history;
// vector of pairs of command lists and their storage address
std::vector<std::pair<u32,PicaCommandList>> command_lists;
};

130
src/video_core/pica.h Normal file
View file

@ -0,0 +1,130 @@
// Copyright 2014 Citra Emulator Project
// Licensed under GPLv2
// Refer to the license.txt file included.
#pragma once
#include <initializer_list>
#include <map>
#include "common/bit_field.h"
#include "common/common_types.h"
#include "common/register_set.h"
namespace Pica {
struct Regs {
enum Id : u32 {
ViewportSizeX = 0x41,
ViewportInvSizeX = 0x42,
ViewportSizeY = 0x43,
ViewportInvSizeY = 0x44,
ViewportCorner = 0x68,
DepthBufferFormat = 0x116,
ColorBufferFormat = 0x117,
DepthBufferAddress = 0x11C,
ColorBufferAddress = 0x11D,
ColorBufferSize = 0x11E,
VertexArrayBaseAddr = 0x200,
VertexDescriptor = 0x201, // 0x202
VertexAttributeOffset = 0x203, // 0x206,0x209,0x20C,0x20F,0x212,0x215,0x218,0x21B,0x21E,0x221,0x224
VertexAttributeInfo0 = 0x204, // 0x207,0x20A,0x20D,0x210,0x213,0x216,0x219,0x21C,0x21F,0x222,0x225
VertexAttributeInfo1 = 0x205, // 0x208,0x20B,0x20E,0x211,0x214,0x217,0x21A,0x21D,0x220,0x223,0x226
NumIds = 0x300,
};
template<Id id>
union Struct;
};
static inline Regs::Id VertexAttributeOffset(int n)
{
return static_cast<Regs::Id>(0x203 + 3*n);
}
static inline Regs::Id VertexAttributeInfo0(int n)
{
return static_cast<Regs::Id>(0x204 + 3*n);
}
static inline Regs::Id VertexAttributeInfo1(int n)
{
return static_cast<Regs::Id>(0x205 + 3*n);
}
union CommandHeader {
CommandHeader(u32 h) : hex(h) {}
u32 hex;
BitField< 0, 16, Regs::Id> cmd_id;
BitField<16, 4, u32> parameter_mask;
BitField<20, 11, u32> extra_data_length;
BitField<31, 1, u32> group_commands;
};
static std::map<Regs::Id, const char*> command_names = {
{Regs::ViewportSizeX, "ViewportSizeX" },
{Regs::ViewportInvSizeX, "ViewportInvSizeX" },
{Regs::ViewportSizeY, "ViewportSizeY" },
{Regs::ViewportInvSizeY, "ViewportInvSizeY" },
{Regs::ViewportCorner, "ViewportCorner" },
{Regs::DepthBufferFormat, "DepthBufferFormat" },
{Regs::ColorBufferFormat, "ColorBufferFormat" },
{Regs::DepthBufferAddress, "DepthBufferAddress" },
{Regs::ColorBufferAddress, "ColorBufferAddress" },
{Regs::ColorBufferSize, "ColorBufferSize" },
};
template<>
union Regs::Struct<Regs::ViewportSizeX> {
BitField<0, 24, u32> value;
};
template<>
union Regs::Struct<Regs::ViewportSizeY> {
BitField<0, 24, u32> value;
};
template<>
union Regs::Struct<Regs::VertexDescriptor> {
enum class Format : u64 {
BYTE = 0,
UBYTE = 1,
SHORT = 2,
FLOAT = 3,
};
BitField< 0, 2, Format> format0;
BitField< 2, 2, u64> size0; // number of elements minus 1
BitField< 4, 2, Format> format1;
BitField< 6, 2, u64> size1;
BitField< 8, 2, Format> format2;
BitField<10, 2, u64> size2;
BitField<12, 2, Format> format3;
BitField<14, 2, u64> size3;
BitField<16, 2, Format> format4;
BitField<18, 2, u64> size4;
BitField<20, 2, Format> format5;
BitField<22, 2, u64> size5;
BitField<24, 2, Format> format6;
BitField<26, 2, u64> size6;
BitField<28, 2, Format> format7;
BitField<30, 2, u64> size7;
BitField<32, 2, Format> format8;
BitField<34, 2, u64> size8;
BitField<36, 2, Format> format9;
BitField<38, 2, u64> size9;
BitField<40, 2, Format> format10;
BitField<42, 2, u64> size10;
BitField<44, 2, Format> format11;
BitField<46, 2, u64> size11;
BitField<48, 12, u64> attribute_mask;
BitField<60, 4, u64> num_attributes; // number of total attributes minus 1
};
} // namespace

View file

@ -2,7 +2,7 @@
// Licensed under GPLv2
// Refer to the license.txt file included.
#include "core/hw/lcd.h"
#include "core/hw/gpu.h"
#include "video_core/video_core.h"
#include "video_core/renderer_opengl/renderer_opengl.h"
@ -77,8 +77,8 @@ void RendererOpenGL::FlipFramebuffer(const u8* in, u8* out) {
*/
void RendererOpenGL::RenderXFB(const common::Rect& src_rect, const common::Rect& dst_rect) {
FlipFramebuffer(LCD::GetFramebufferPointer(LCD::g_regs.framebuffer_top_left_1), m_xfb_top_flipped);
FlipFramebuffer(LCD::GetFramebufferPointer(LCD::g_regs.framebuffer_sub_left_1), m_xfb_bottom_flipped);
FlipFramebuffer(GPU::GetFramebufferPointer(GPU::g_regs.framebuffer_top_left_1), m_xfb_top_flipped);
FlipFramebuffer(GPU::GetFramebufferPointer(GPU::g_regs.framebuffer_sub_left_1), m_xfb_bottom_flipped);
// Blit the top framebuffer
// ------------------------

View file

@ -24,10 +24,12 @@
<ClCompile Include="video_core.cpp" />
</ItemGroup>
<ItemGroup>
<ClInclude Include="gpu_debugger.h" />
<ClInclude Include="pica.h" />
<ClInclude Include="renderer_base.h" />
<ClInclude Include="renderer_opengl\renderer_opengl.h" />
<ClInclude Include="utils.h" />
<ClInclude Include="video_core.h" />
<ClInclude Include="renderer_opengl\renderer_opengl.h" />
</ItemGroup>
<ItemGroup>
<Text Include="CMakeLists.txt" />
@ -128,4 +130,4 @@
<Import Project="$(VCTargetsPath)\Microsoft.Cpp.targets" />
<ImportGroup Label="ExtensionTargets">
</ImportGroup>
</Project>
</Project>

View file

@ -16,6 +16,8 @@
<ClInclude Include="renderer_opengl\renderer_opengl.h">
<Filter>renderer_opengl</Filter>
</ClInclude>
<ClInclude Include="gpu_debugger.h" />
<ClInclude Include="pica.h" />
<ClInclude Include="renderer_base.h" />
<ClInclude Include="utils.h" />
<ClInclude Include="video_core.h" />
@ -23,4 +25,4 @@
<ItemGroup>
<Text Include="CMakeLists.txt" />
</ItemGroup>
</Project>
</Project>