diff --git a/src/citra_qt/debugger/disassembler.cpp b/src/citra_qt/debugger/disassembler.cpp index 14745f3bb..c83158d50 100644 --- a/src/citra_qt/debugger/disassembler.cpp +++ b/src/citra_qt/debugger/disassembler.cpp @@ -9,6 +9,7 @@ #include "core/core.h" #include "common/break_points.h" #include "common/symbols.h" +#include "core/arm/arm_interface.h" #include "core/arm/skyeye_common/armdefs.h" #include "core/arm/disassembler/arm_disasm.h" diff --git a/src/core/arm/arm_interface.h b/src/core/arm/arm_interface.h index 3b7209418..accc08ec1 100644 --- a/src/core/arm/arm_interface.h +++ b/src/core/arm/arm_interface.h @@ -7,7 +7,9 @@ #include "common/common.h" #include "common/common_types.h" -#include "core/hle/svc.h" +namespace Core { + struct ThreadContext; +} /// Generic ARM11 CPU interface class ARM_Interface : NonCopyable { @@ -87,13 +89,13 @@ public: * Saves the current CPU context * @param ctx Thread context to save */ - virtual void SaveContext(ThreadContext& ctx) = 0; + virtual void SaveContext(Core::ThreadContext& ctx) = 0; /** * Loads a CPU context * @param ctx Thread context to load */ - virtual void LoadContext(const ThreadContext& ctx) = 0; + virtual void LoadContext(const Core::ThreadContext& ctx) = 0; /// Prepare core for thread reschedule (if needed to correctly handle state) virtual void PrepareReschedule() = 0; diff --git a/src/core/arm/dyncom/arm_dyncom.cpp b/src/core/arm/dyncom/arm_dyncom.cpp index a838fd25a..5af94c8fb 100644 --- a/src/core/arm/dyncom/arm_dyncom.cpp +++ b/src/core/arm/dyncom/arm_dyncom.cpp @@ -9,6 +9,8 @@ #include "core/arm/dyncom/arm_dyncom.h" #include "core/arm/dyncom/arm_dyncom_interpreter.h" +#include "core/core.h" + const static cpu_config_t s_arm11_cpu_info = { "armv6", "arm11", 0x0007b000, 0x0007f000, NONCACHE }; @@ -88,7 +90,7 @@ void ARM_DynCom::ExecuteInstructions(int num_instructions) { ticks += InterpreterMainLoop(state.get()); } -void ARM_DynCom::SaveContext(ThreadContext& ctx) { +void ARM_DynCom::SaveContext(Core::ThreadContext& ctx) { memcpy(ctx.cpu_registers, state->Reg, sizeof(ctx.cpu_registers)); memcpy(ctx.fpu_registers, state->ExtReg, sizeof(ctx.fpu_registers)); @@ -104,7 +106,7 @@ void ARM_DynCom::SaveContext(ThreadContext& ctx) { ctx.mode = state->NextInstr; } -void ARM_DynCom::LoadContext(const ThreadContext& ctx) { +void ARM_DynCom::LoadContext(const Core::ThreadContext& ctx) { memcpy(state->Reg, ctx.cpu_registers, sizeof(ctx.cpu_registers)); memcpy(state->ExtReg, ctx.fpu_registers, sizeof(ctx.fpu_registers)); diff --git a/src/core/arm/dyncom/arm_dyncom.h b/src/core/arm/dyncom/arm_dyncom.h index 7284dcd07..632bf4f8f 100644 --- a/src/core/arm/dyncom/arm_dyncom.h +++ b/src/core/arm/dyncom/arm_dyncom.h @@ -71,13 +71,13 @@ public: * Saves the current CPU context * @param ctx Thread context to save */ - void SaveContext(ThreadContext& ctx) override; + void SaveContext(Core::ThreadContext& ctx) override; /** * Loads a CPU context * @param ctx Thread context to load */ - void LoadContext(const ThreadContext& ctx) override; + void LoadContext(const Core::ThreadContext& ctx) override; /// Prepare core for thread reschedule (if needed to correctly handle state) void PrepareReschedule() override; diff --git a/src/core/arm/interpreter/arm_interpreter.cpp b/src/core/arm/interpreter/arm_interpreter.cpp index 80ebc359e..c76d371a2 100644 --- a/src/core/arm/interpreter/arm_interpreter.cpp +++ b/src/core/arm/interpreter/arm_interpreter.cpp @@ -4,6 +4,8 @@ #include "core/arm/interpreter/arm_interpreter.h" +#include "core/core.h" + const static cpu_config_t arm11_cpu_info = { "armv6", "arm11", 0x0007b000, 0x0007f000, NONCACHE }; @@ -75,7 +77,7 @@ void ARM_Interpreter::ExecuteInstructions(int num_instructions) { ARMul_Emulate32(state); } -void ARM_Interpreter::SaveContext(ThreadContext& ctx) { +void ARM_Interpreter::SaveContext(Core::ThreadContext& ctx) { memcpy(ctx.cpu_registers, state->Reg, sizeof(ctx.cpu_registers)); memcpy(ctx.fpu_registers, state->ExtReg, sizeof(ctx.fpu_registers)); @@ -91,7 +93,7 @@ void ARM_Interpreter::SaveContext(ThreadContext& ctx) { ctx.mode = state->NextInstr; } -void ARM_Interpreter::LoadContext(const ThreadContext& ctx) { +void ARM_Interpreter::LoadContext(const Core::ThreadContext& ctx) { memcpy(state->Reg, ctx.cpu_registers, sizeof(ctx.cpu_registers)); memcpy(state->ExtReg, ctx.fpu_registers, sizeof(ctx.fpu_registers)); diff --git a/src/core/arm/interpreter/arm_interpreter.h b/src/core/arm/interpreter/arm_interpreter.h index 019dad5df..e5ecc69c2 100644 --- a/src/core/arm/interpreter/arm_interpreter.h +++ b/src/core/arm/interpreter/arm_interpreter.h @@ -70,13 +70,13 @@ public: * Saves the current CPU context * @param ctx Thread context to save */ - void SaveContext(ThreadContext& ctx) override; + void SaveContext(Core::ThreadContext& ctx) override; /** * Loads a CPU context * @param ctx Thread context to load */ - void LoadContext(const ThreadContext& ctx) override; + void LoadContext(const Core::ThreadContext& ctx) override; /// Prepare core for thread reschedule (if needed to correctly handle state) void PrepareReschedule() override; diff --git a/src/core/core.cpp b/src/core/core.cpp index 8ac4481cc..9ee461591 100644 --- a/src/core/core.cpp +++ b/src/core/core.cpp @@ -7,6 +7,7 @@ #include "core/core.h" #include "core/settings.h" +#include "core/arm/arm_interface.h" #include "core/arm/disassembler/arm_disasm.h" #include "core/arm/interpreter/arm_interpreter.h" #include "core/arm/dyncom/arm_dyncom.h" diff --git a/src/core/core.h b/src/core/core.h index ecd58a73a..2f5e8bc6b 100644 --- a/src/core/core.h +++ b/src/core/core.h @@ -4,8 +4,9 @@ #pragma once -#include "core/arm/arm_interface.h" -#include "core/arm/skyeye_common/armdefs.h" +#include "common/common_types.h" + +class ARM_Interface; //////////////////////////////////////////////////////////////////////////////////////////////////// @@ -16,6 +17,21 @@ enum CPUCore { CPU_OldInterpreter, }; +struct ThreadContext { + u32 cpu_registers[13]; + u32 sp; + u32 lr; + u32 pc; + u32 cpsr; + u32 fpu_registers[32]; + u32 fpscr; + u32 fpexc; + + // These are not part of native ThreadContext, but needed by emu + u32 reg_15; + u32 mode; +}; + extern ARM_Interface* g_app_core; ///< ARM11 application core extern ARM_Interface* g_sys_core; ///< ARM11 system (OS) core diff --git a/src/core/hle/function_wrappers.h b/src/core/hle/function_wrappers.h index 0f822f84b..45ce6e38a 100644 --- a/src/core/hle/function_wrappers.h +++ b/src/core/hle/function_wrappers.h @@ -5,6 +5,8 @@ #pragma once #include "common/common_types.h" + +#include "core/arm/arm_interface.h" #include "core/mem_map.h" #include "core/hle/hle.h" diff --git a/src/core/hle/hle.cpp b/src/core/hle/hle.cpp index 33ac12507..5d77a1458 100644 --- a/src/core/hle/hle.cpp +++ b/src/core/hle/hle.cpp @@ -4,6 +4,7 @@ #include +#include "core/arm/arm_interface.h" #include "core/mem_map.h" #include "core/hle/hle.h" #include "core/hle/kernel/thread.h" diff --git a/src/core/hle/hle.h b/src/core/hle/hle.h index 59b770f02..3f6f9a4b5 100644 --- a/src/core/hle/hle.h +++ b/src/core/hle/hle.h @@ -4,6 +4,8 @@ #pragma once +#include + #include "common/common_types.h" #include "core/core.h" diff --git a/src/core/hle/kernel/kernel.cpp b/src/core/hle/kernel/kernel.cpp index e59ed1b57..da151ef93 100644 --- a/src/core/hle/kernel/kernel.cpp +++ b/src/core/hle/kernel/kernel.cpp @@ -6,6 +6,7 @@ #include "common/common.h" +#include "core/arm/arm_interface.h" #include "core/core.h" #include "core/hle/kernel/kernel.h" #include "core/hle/kernel/thread.h" diff --git a/src/core/hle/kernel/thread.cpp b/src/core/hle/kernel/thread.cpp index 872df2d14..81113ea99 100644 --- a/src/core/hle/kernel/thread.cpp +++ b/src/core/hle/kernel/thread.cpp @@ -10,6 +10,7 @@ #include "common/common.h" #include "common/thread_queue_list.h" +#include "core/arm/arm_interface.h" #include "core/core.h" #include "core/hle/hle.h" #include "core/hle/kernel/kernel.h" @@ -48,7 +49,7 @@ public: return MakeResult(wait); } - ThreadContext context; + Core::ThreadContext context; u32 thread_id; @@ -99,18 +100,18 @@ inline void SetCurrentThread(Thread* t) { } /// Saves the current CPU context -void SaveContext(ThreadContext& ctx) { +void SaveContext(Core::ThreadContext& ctx) { Core::g_app_core->SaveContext(ctx); } /// Loads a CPU context -void LoadContext(ThreadContext& ctx) { +void LoadContext(Core::ThreadContext& ctx) { Core::g_app_core->LoadContext(ctx); } /// Resets a thread void ResetThread(Thread* t, u32 arg, s32 lowest_priority) { - memset(&t->context, 0, sizeof(ThreadContext)); + memset(&t->context, 0, sizeof(Core::ThreadContext)); t->context.cpu_registers[0] = arg; t->context.pc = t->context.reg_15 = t->entry_point; diff --git a/src/core/hle/service/hid_user.cpp b/src/core/hle/service/hid_user.cpp index 99b0ea5a0..8ef9af9d2 100644 --- a/src/core/hle/service/hid_user.cpp +++ b/src/core/hle/service/hid_user.cpp @@ -4,6 +4,7 @@ #include "common/log.h" +#include "core/arm/arm_interface.h" #include "core/hle/hle.h" #include "core/hle/kernel/event.h" #include "core/hle/kernel/shared_memory.h" diff --git a/src/core/hle/svc.cpp b/src/core/hle/svc.cpp index c25409a9f..75a56f10f 100644 --- a/src/core/hle/svc.cpp +++ b/src/core/hle/svc.cpp @@ -7,6 +7,7 @@ #include "common/string_util.h" #include "common/symbols.h" +#include "core/arm/arm_interface.h" #include "core/mem_map.h" #include "core/hle/kernel/address_arbiter.h" diff --git a/src/core/hle/svc.h b/src/core/hle/svc.h index ad780818e..5d020a5ba 100644 --- a/src/core/hle/svc.h +++ b/src/core/hle/svc.h @@ -20,21 +20,6 @@ struct PageInfo { u32 flags; }; -struct ThreadContext { - u32 cpu_registers[13]; - u32 sp; - u32 lr; - u32 pc; - u32 cpsr; - u32 fpu_registers[32]; - u32 fpscr; - u32 fpexc; - - // These are not part of native ThreadContext, but needed by emu - u32 reg_15; - u32 mode; -}; - enum ResetType { RESETTYPE_ONESHOT, RESETTYPE_STICKY, diff --git a/src/core/hw/gpu.cpp b/src/core/hw/gpu.cpp index 0ff6c6cde..ff266d1da 100644 --- a/src/core/hw/gpu.cpp +++ b/src/core/hw/gpu.cpp @@ -4,6 +4,8 @@ #include "common/common_types.h" +#include "core/arm/arm_interface.h" + #include "core/settings.h" #include "core/core.h" #include "core/mem_map.h"