From 8599b1e7cce9de80193b167f75c2258588cde257 Mon Sep 17 00:00:00 2001 From: Lioncash Date: Tue, 5 Dec 2017 20:07:43 -0500 Subject: [PATCH] dyncom: Convert the SPSR checking define to a function Same thing, with less indirection hiding --- .../arm/dyncom/arm_dyncom_interpreter.cpp | 29 +++++++++---------- src/core/arm/skyeye_common/armstate.h | 4 +++ 2 files changed, 18 insertions(+), 15 deletions(-) diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp index 3522d1e82..6b20ffa87 100644 --- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp +++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp @@ -1403,7 +1403,6 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) { cpu->VFlag = (cpu->Cpsr >> 28) & 1; \ cpu->TFlag = (cpu->Cpsr >> 5) & 1; -#define CurrentModeHasSPSR (cpu->Mode != SYSTEM32MODE) && (cpu->Mode != USER32MODE) #define PC (cpu->Reg[15]) // GCC and Clang have a C++ extension to support a lookup table of labels. Otherwise, fallback @@ -1669,7 +1668,7 @@ ADC_INST : { RD = AddWithCarry(rn_val, SHIFTER_OPERAND, cpu->CFlag, &carry, &overflow); if (inst_cream->S && (inst_cream->Rd == 15)) { - if (CurrentModeHasSPSR) { + if (cpu->CurrentModeHasSPSR()) { cpu->Cpsr = cpu->Spsr_copy; cpu->ChangePrivilegeMode(cpu->Spsr_copy & 0x1F); LOAD_NZCVT; @@ -1701,7 +1700,7 @@ ADD_INST : { RD = AddWithCarry(rn_val, SHIFTER_OPERAND, 0, &carry, &overflow); if (inst_cream->S && (inst_cream->Rd == 15)) { - if (CurrentModeHasSPSR) { + if (cpu->CurrentModeHasSPSR()) { cpu->Cpsr = cpu->Spsr_copy; cpu->ChangePrivilegeMode(cpu->Cpsr & 0x1F); LOAD_NZCVT; @@ -1735,7 +1734,7 @@ AND_INST : { RD = lop & rop; if (inst_cream->S && (inst_cream->Rd == 15)) { - if (CurrentModeHasSPSR) { + if (cpu->CurrentModeHasSPSR()) { cpu->Cpsr = cpu->Spsr_copy; cpu->ChangePrivilegeMode(cpu->Cpsr & 0x1F); LOAD_NZCVT; @@ -1779,7 +1778,7 @@ BIC_INST : { u32 rop = SHIFTER_OPERAND; RD = lop & (~rop); if ((inst_cream->S) && (inst_cream->Rd == 15)) { - if (CurrentModeHasSPSR) { + if (cpu->CurrentModeHasSPSR()) { cpu->Cpsr = cpu->Spsr_copy; cpu->ChangePrivilegeMode(cpu->Spsr_copy & 0x1F); LOAD_NZCVT; @@ -1995,7 +1994,7 @@ EOR_INST : { u32 rop = SHIFTER_OPERAND; RD = lop ^ rop; if (inst_cream->S && (inst_cream->Rd == 15)) { - if (CurrentModeHasSPSR) { + if (cpu->CurrentModeHasSPSR()) { cpu->Cpsr = cpu->Spsr_copy; cpu->ChangePrivilegeMode(cpu->Spsr_copy & 0x1F); LOAD_NZCVT; @@ -2075,7 +2074,7 @@ LDM_INST : { } } - if (CurrentModeHasSPSR) { + if (cpu->CurrentModeHasSPSR()) { cpu->Cpsr = cpu->Spsr_copy; cpu->ChangePrivilegeMode(cpu->Cpsr & 0x1F); LOAD_NZCVT; @@ -2404,7 +2403,7 @@ MOV_INST : { RD = SHIFTER_OPERAND; if (inst_cream->S && (inst_cream->Rd == 15)) { - if (CurrentModeHasSPSR) { + if (cpu->CurrentModeHasSPSR()) { cpu->Cpsr = cpu->Spsr_copy; cpu->ChangePrivilegeMode(cpu->Spsr_copy & 0x1F); LOAD_NZCVT; @@ -2510,7 +2509,7 @@ MSR_INST : { cpu->ChangePrivilegeMode(cpu->Cpsr & 0x1F); LOAD_NZCVT; } else { - if (CurrentModeHasSPSR) { + if (cpu->CurrentModeHasSPSR()) { mask = byte_mask & (UserMask | PrivMask | StateMask); cpu->Spsr_copy = (cpu->Spsr_copy & ~mask) | (operand & mask); } @@ -2545,7 +2544,7 @@ MVN_INST : { RD = ~SHIFTER_OPERAND; if (inst_cream->S && (inst_cream->Rd == 15)) { - if (CurrentModeHasSPSR) { + if (cpu->CurrentModeHasSPSR()) { cpu->Cpsr = cpu->Spsr_copy; cpu->ChangePrivilegeMode(cpu->Spsr_copy & 0x1F); LOAD_NZCVT; @@ -2578,7 +2577,7 @@ ORR_INST : { RD = lop | rop; if (inst_cream->S && (inst_cream->Rd == 15)) { - if (CurrentModeHasSPSR) { + if (cpu->CurrentModeHasSPSR()) { cpu->Cpsr = cpu->Spsr_copy; cpu->ChangePrivilegeMode(cpu->Spsr_copy & 0x1F); LOAD_NZCVT; @@ -2832,7 +2831,7 @@ RSB_INST : { RD = AddWithCarry(~rn_val, SHIFTER_OPERAND, 1, &carry, &overflow); if (inst_cream->S && (inst_cream->Rd == 15)) { - if (CurrentModeHasSPSR) { + if (cpu->CurrentModeHasSPSR()) { cpu->Cpsr = cpu->Spsr_copy; cpu->ChangePrivilegeMode(cpu->Spsr_copy & 0x1F); LOAD_NZCVT; @@ -2866,7 +2865,7 @@ RSC_INST : { RD = AddWithCarry(~rn_val, SHIFTER_OPERAND, cpu->CFlag, &carry, &overflow); if (inst_cream->S && (inst_cream->Rd == 15)) { - if (CurrentModeHasSPSR) { + if (cpu->CurrentModeHasSPSR()) { cpu->Cpsr = cpu->Spsr_copy; cpu->ChangePrivilegeMode(cpu->Spsr_copy & 0x1F); LOAD_NZCVT; @@ -3008,7 +3007,7 @@ SBC_INST : { RD = AddWithCarry(rn_val, ~SHIFTER_OPERAND, cpu->CFlag, &carry, &overflow); if (inst_cream->S && (inst_cream->Rd == 15)) { - if (CurrentModeHasSPSR) { + if (cpu->CurrentModeHasSPSR()) { cpu->Cpsr = cpu->Spsr_copy; cpu->ChangePrivilegeMode(cpu->Spsr_copy & 0x1F); LOAD_NZCVT; @@ -3835,7 +3834,7 @@ SUB_INST : { RD = AddWithCarry(rn_val, ~SHIFTER_OPERAND, 1, &carry, &overflow); if (inst_cream->S && (inst_cream->Rd == 15)) { - if (CurrentModeHasSPSR) { + if (cpu->CurrentModeHasSPSR()) { cpu->Cpsr = cpu->Spsr_copy; cpu->ChangePrivilegeMode(cpu->Spsr_copy & 0x1F); LOAD_NZCVT; diff --git a/src/core/arm/skyeye_common/armstate.h b/src/core/arm/skyeye_common/armstate.h index 893877797..b2b928d3c 100644 --- a/src/core/arm/skyeye_common/armstate.h +++ b/src/core/arm/skyeye_common/armstate.h @@ -178,6 +178,10 @@ public: bool InAPrivilegedMode() const { return (Mode != USER32MODE); } + // Whether or not the current CPU mode has a Saved Program Status Register + bool CurrentModeHasSPSR() const { + return Mode != SYSTEM32MODE && InAPrivilegedMode(); + } // Note that for the 3DS, a Thumb instruction will only ever be // two bytes in size. Thus we don't need to worry about ThumbEE // or Thumb-2 where instructions can be 4 bytes in length.