diff --git a/src/video_core/shader/shader.cpp b/src/video_core/shader/shader.cpp index 83b3eeec6..f99d75379 100644 --- a/src/video_core/shader/shader.cpp +++ b/src/video_core/shader/shader.cpp @@ -67,9 +67,6 @@ MICROPROFILE_DEFINE(GPU_VertexShader, "GPU", "Vertex Shader", MP_RGB(50, 50, 240 OutputVertex Run(UnitState& state, const InputVertex& input, int num_attributes) { MICROPROFILE_SCOPE(GPU_VertexShader); - state.debug.max_offset = 0; - state.debug.max_opdesc_id = 0; - // Setup output data OutputVertex ret; @@ -79,6 +76,9 @@ OutputVertex Run(UnitState& state, const InputVertex& input, int num_attr } else #endif // ARCHITECTURE_x86_64 { + state.debug.max_offset = 0; + state.debug.max_opdesc_id = 0; + auto& config = g_state.regs.vs; // Setup input register table state.program_counter = config.main_offset; @@ -105,43 +105,43 @@ OutputVertex Run(UnitState& state, const InputVertex& input, int num_attr if (num_attributes > 15) state.registers.input[attribute_register_map.attribute15_register] = input.attr[15]; RunInterpreter(state); - } - // TODO(neobrain): Under some circumstances, up to 16 attributes may be output. We need to - // figure out what those circumstances are and enable the remaining outputs then. - unsigned index = 0; - for (unsigned i = 0; i < 7; ++i) { - if (index >= g_state.regs.vs_output_total) - break; + // TODO(neobrain): Under some circumstances, up to 16 attributes may be output. We need to + // figure out what those circumstances are and enable the remaining outputs then. + unsigned index = 0; + for (unsigned i = 0; i < 7; ++i) { + if (index >= g_state.regs.vs_output_total) + break; - if ((g_state.regs.vs.output_mask & (1 << i)) == 0) - continue; + if ((g_state.regs.vs.output_mask & (1 << i)) == 0) + continue; - const auto& output_register_map = g_state.regs.vs_output_attributes[index]; // TODO: Don't hardcode VS here + const auto& output_register_map = g_state.regs.vs_output_attributes[index]; // TODO: Don't hardcode VS here - u32 semantics[4] = { - output_register_map.map_x, output_register_map.map_y, - output_register_map.map_z, output_register_map.map_w - }; + u32 semantics[4] = { + output_register_map.map_x, output_register_map.map_y, + output_register_map.map_z, output_register_map.map_w + }; - for (unsigned comp = 0; comp < 4; ++comp) { - float24* out = ((float24*)&ret) + semantics[comp]; - if (semantics[comp] != Regs::VSOutputAttributes::INVALID) { - *out = state.registers.output[i][comp]; - } else { - // Zero output so that attributes which aren't output won't have denormals in them, - // which would slow us down later. - memset(out, 0, sizeof(*out)); + for (unsigned comp = 0; comp < 4; ++comp) { + float24* out = ((float24*)&ret) + semantics[comp]; + if (semantics[comp] != Regs::VSOutputAttributes::INVALID) { + *out = state.registers.output[i][comp]; + } else { + // Zero output so that attributes which aren't output won't have denormals in them, + // which would slow us down later. + memset(out, 0, sizeof(*out)); + } } + + index++; } - index++; - } - - // The hardware takes the absolute and saturates vertex colors like this, *before* doing interpolation - for (unsigned i = 0; i < 4; ++i) { - ret.color[i] = float24::FromFloat32( - std::fmin(std::fabs(ret.color[i].ToFloat32()), 1.0f)); + // The hardware takes the absolute and saturates vertex colors like this, *before* doing interpolation + for (unsigned i = 0; i < 4; ++i) { + ret.color[i] = float24::FromFloat32( + std::fmin(std::fabs(ret.color[i].ToFloat32()), 1.0f)); + } } LOG_TRACE(HW_GPU, "Output vertex: pos(%.2f, %.2f, %.2f, %.2f), quat(%.2f, %.2f, %.2f, %.2f), " diff --git a/src/video_core/shader/shader_jit_x64.cpp b/src/video_core/shader/shader_jit_x64.cpp index da1081a38..3f3de7d88 100644 --- a/src/video_core/shader/shader_jit_x64.cpp +++ b/src/video_core/shader/shader_jit_x64.cpp @@ -94,7 +94,7 @@ const JitFunction instr_table[64] = { // purposes, as documented below: /// Pointer to the uniform memory -static const X64Reg UNIFORMS = R9; +static const X64Reg UNIFORMS = R15; /// The two 32-bit VS address offset registers set by the MOVA instruction static const X64Reg ADDROFFS_REG_0 = R10; static const X64Reg ADDROFFS_REG_1 = R11; @@ -109,7 +109,12 @@ static const X64Reg COND0 = R13; /// Result of the previous CMP instruction for the Y-component comparison static const X64Reg COND1 = R14; /// Pointer to the UnitState instance for the current VS unit -static const X64Reg REGISTERS = R15; +static const X64Reg REGISTERS = ABI_PARAM1; + +// Clashes with others, but only used in epilogue. +static const X64Reg ISCRATCH1 = RSI; +static const X64Reg ISCRATCH2 = RDI; + /// Pointer to the input data. Aliased over LOOPCOUNT as this is before any loops execute. static const X64Reg INPUT = RSI; /// SIMD scratch register @@ -825,7 +830,7 @@ void JitShader::Compile() { ABI_PushRegistersAndAdjustStack(ABI_ALL_CALLEE_SAVED, 8); // Prologue: Scatter inputs into registers according to map - MOV(PTRBITS, R(REGISTERS), R(ABI_PARAM1)); + // MOV(PTRBITS, R(REGISTERS), R(ABI_PARAM1)); MOV(PTRBITS, R(INPUT), R(ABI_PARAM2)); for (int i = 0; i < num_attributes; i++) { MOVAPS(SCRATCH, MDisp(INPUT, i * 16)); @@ -850,7 +855,50 @@ void JitShader::Compile() { MOVAPS(NEGBIT, MatR(RAX)); // Call the start of the shader program. CALLptr(R(ABI_PARAM3)); + // Alright, back from the program. Now we can do the epilogue. + X64Reg OUTPUT = ABI_PARAM4; + // TODO(neobrain): Under some circumstances, up to 16 attributes may be output. We need to + // figure out what those circumstances are and enable the remaining outputs then. + unsigned index = 0; + for (unsigned i = 0; i < 7; ++i) { + if (index >= g_state.regs.vs_output_total) + break; + + if ((g_state.regs.vs.output_mask & (1 << i)) == 0) + continue; + + const auto& output_register_map = g_state.regs.vs_output_attributes[index]; + u32 semantics[4] = { + output_register_map.map_x, output_register_map.map_y, + output_register_map.map_z, output_register_map.map_w + }; + if (semantics[1] == semantics[0] + 1 && semantics[2] == semantics[1] + 1 && semantics[3] == semantics[2] + 1) { + MOVAPS(SCRATCH, MDisp(REGISTERS, UnitState::OutputOffset(i))); + MOVAPS(MDisp(OUTPUT, semantics[0] * 4), SCRATCH); + } else { + for (unsigned comp = 0; comp < 4; ++comp) { + int outOffset = semantics[comp] * 4; + if (semantics[comp] != Regs::VSOutputAttributes::INVALID) { + MOV(32, R(ISCRATCH1), MDisp(REGISTERS, UnitState::OutputOffset(i) + comp * 4)); + MOV(32, MDisp(OUTPUT, outOffset), R(ISCRATCH1)); + } else { + // Zero output so that attributes which aren't output won't have denormals in them, + // which would slow us down later. + MOV(32, MDisp(OUTPUT, outOffset), Imm32(0)); + } + } + } + index++; + } + + // Saturate/Clamp color, specifically. + + // These effectively do an ABS. + MOVAPS(SCRATCH, R(NEGBIT)); + ANDNPS(SCRATCH, MDisp(OUTPUT, Regs::VSOutputAttributes::Semantic::COLOR_R * 4)); + // Clamp to 1.0. + MINPS(SCRATCH, R(ONE)); ABI_PopRegistersAndAdjustStack(ABI_ALL_CALLEE_SAVED, 8); RET();