N-archive/citra
1
0
Fork 0
Code Issues Pull requests Packages Projects Releases Wiki Activity

Merge remote-tracking branch 'upstream/master' into feature/savestates-2

Browse source
This commit is contained in:
Hamish Milne 2020-04-12 22:26:24 +01:00
parent 828f88d20a f75cc8be64
commit 915c426dc9
11 changed files with 165 additions and 121 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
.travis.yml
View file

@ -32,7 +32,7 @@ matrix:
- os: osx
env: NAME="macos build"
sudo: false
osx_image: xcode10
osx_image: xcode10.2
install: "./.travis/macos/deps.sh"
script: "./.travis/macos/build.sh"
after_success: "./.travis/macos/upload.sh"

2
externals/dynarmic vendored

@ -1 +1 @@
Subproject commit 4e6848d1c9e8dadc70595c15b5589f8b14aad478
Subproject commit b58048a5a88ad6184d64f16cfd2c5d63a1952e77

11
src/citra_qt/debugger/registers.cpp
View file

@ -103,8 +103,6 @@ void RegistersWidget::OnEmulationStopping() {
vfp_system_registers->child(0)->setText(1, QString{});
vfp_system_registers->child(1)->setText(1, QString{});
vfp_system_registers->child(2)->setText(1, QString{});
vfp_system_registers->child(3)->setText(1, QString{});
setEnabled(false);
}
@ -188,16 +186,12 @@ void RegistersWidget::CreateVFPSystemRegisterChildren() {
vfp_system_registers->addChild(fpscr);
vfp_system_registers->addChild(fpexc);
vfp_system_registers->addChild(new QTreeWidgetItem(QStringList(QStringLiteral("FPINST"))));
vfp_system_registers->addChild(new QTreeWidgetItem(QStringList(QStringLiteral("FPINST2"))));
}
void RegistersWidget::UpdateVFPSystemRegisterValues() {
// Todo: handle all cores
const u32 fpscr_val = Core::GetCore(0).GetVFPSystemReg(VFP_FPSCR);
const u32 fpexc_val = Core::GetCore(0).GetVFPSystemReg(VFP_FPEXC);
const u32 fpinst_val = Core::GetCore(0).GetVFPSystemReg(VFP_FPINST);
const u32 fpinst2_val = Core::GetCore(0).GetVFPSystemReg(VFP_FPINST2);
QTreeWidgetItem* const fpscr = vfp_system_registers->child(0);
fpscr->setText(1, QStringLiteral("0x%1").arg(fpscr_val, 8, 16, QLatin1Char('0')));
@ -237,9 +231,4 @@ void RegistersWidget::UpdateVFPSystemRegisterValues() {
fpexc->child(5)->setText(1, QString::number((fpexc_val >> 28) & 1));
fpexc->child(6)->setText(1, QString::number((fpexc_val >> 30) & 1));
fpexc->child(7)->setText(1, QString::number((fpexc_val >> 31) & 1));
vfp_system_registers->child(2)->setText(
1, QStringLiteral("0x%1").arg(fpinst_val, 8, 16, QLatin1Char('0')));
vfp_system_registers->child(3)->setText(
1, QStringLiteral("0x%1").arg(fpinst2_val, 8, 16, QLatin1Char('0')));
}

21
src/common/ring_buffer.h
View file

@ -9,6 +9,7 @@
#include <atomic>
#include <cstddef>
#include <cstring>
#include <new>
#include <type_traits>
#include <vector>
#include "common/common_types.h"
@ -29,7 +30,7 @@ class RingBuffer {
static_assert(capacity < std::numeric_limits<std::size_t>::max() / 2 / granularity);
static_assert((capacity & (capacity - 1)) == 0, "capacity must be a power of two");
// Ensure lock-free.
static_assert(std::atomic<std::size_t>::is_always_lock_free);
static_assert(std::atomic_size_t::is_always_lock_free);
public:
/// Pushes slots into the ring buffer
@ -100,10 +101,22 @@ public:
}
private:
// It is important to align the below variables for performance reasons:
// It is important to separate the below atomics for performance reasons:
// Having them on the same cache-line would result in false-sharing between them.
alignas(128) std::atomic<std::size_t> m_read_index{0};
alignas(128) std::atomic<std::size_t> m_write_index{0};
// TODO: Remove this ifdef whenever clang and GCC support
// std::hardware_destructive_interference_size.
#if defined(_MSC_VER) && _MSC_VER >= 1911
static constexpr std::size_t padding_size =
std::hardware_destructive_interference_size - sizeof(std::atomic_size_t);
#else
static constexpr std::size_t padding_size = 128 - sizeof(std::atomic_size_t);
#endif
std::atomic_size_t m_read_index{0};
char padding1[padding_size];
std::atomic_size_t m_write_index{0};
char padding2[padding_size];
std::array<T, granularity * capacity> m_data;
};

30
src/core/arm/arm_interface.h
View file

@ -263,11 +263,23 @@ private:
ar << r;
}
for (std::size_t i = 0; i < VFPSystemRegister::VFP_SYSTEM_REGISTER_COUNT; i++) {
const auto r = GetVFPSystemReg(static_cast<VFPSystemRegister>(i));
const auto reg = static_cast<VFPSystemRegister>(i);
u32 r = 0;
switch (reg) {
case VFP_FPSCR:
case VFP_FPEXC:
r = GetVFPSystemReg(reg);
}
ar << r;
}
for (std::size_t i = 0; i < CP15Register::CP15_REGISTER_COUNT; i++) {
const auto r = GetCP15Register(static_cast<CP15Register>(i));
const auto reg = static_cast<CP15Register>(i);
u32 r = 0;
switch (reg) {
case CP15_THREAD_UPRW:
case CP15_THREAD_URO:
r = GetCP15Register(reg);
}
ar << r;
}
}
@ -296,11 +308,21 @@ private:
}
for (std::size_t i = 0; i < VFPSystemRegister::VFP_SYSTEM_REGISTER_COUNT; i++) {
ar >> r;
SetVFPSystemReg(static_cast<VFPSystemRegister>(i), r);
const auto reg = static_cast<VFPSystemRegister>(i);
switch (reg) {
case VFP_FPSCR:
case VFP_FPEXC:
SetVFPSystemReg(reg, r);
}
}
for (std::size_t i = 0; i < CP15Register::CP15_REGISTER_COUNT; i++) {
ar >> r;
SetCP15Register(static_cast<CP15Register>(i), r);
const auto reg = static_cast<CP15Register>(i);
switch (reg) {
case CP15_THREAD_UPRW:
case CP15_THREAD_URO:
SetCP15Register(reg, r);
}
}
}

99
src/core/arm/dynarmic/arm_dynarmic.cpp
View file

@ -9,7 +9,6 @@
#include "common/microprofile.h"
#include "core/arm/dynarmic/arm_dynarmic.h"
#include "core/arm/dynarmic/arm_dynarmic_cp15.h"
#include "core/arm/dyncom/arm_dyncom_interpreter.h"
#include "core/core.h"
#include "core/core_timing.h"
#include "core/gdbstub/gdbstub.h"
@ -102,24 +101,9 @@ public:
}
void InterpreterFallback(VAddr pc, std::size_t num_instructions) override {
parent.interpreter_state->Reg = parent.jit->Regs();
parent.interpreter_state->Cpsr = parent.jit->Cpsr();
parent.interpreter_state->Reg[15] = pc;
parent.interpreter_state->ExtReg = parent.jit->ExtRegs();
parent.interpreter_state->VFP[VFP_FPSCR] = parent.jit->Fpscr();
parent.interpreter_state->NumInstrsToExecute = num_instructions;
InterpreterMainLoop(parent.interpreter_state.get());
bool is_thumb = (parent.interpreter_state->Cpsr & (1 << 5)) != 0;
parent.interpreter_state->Reg[15] &= (is_thumb ? 0xFFFFFFFE : 0xFFFFFFFC);
parent.jit->Regs() = parent.interpreter_state->Reg;
parent.jit->SetCpsr(parent.interpreter_state->Cpsr);
parent.jit->ExtRegs() = parent.interpreter_state->ExtReg;
parent.jit->SetFpscr(parent.interpreter_state->VFP[VFP_FPSCR]);
parent.interpreter_state->ServeBreak();
// Should never happen.
UNREACHABLE_MSG("InterpeterFallback reached with pc = 0x{:08x}, code = 0x{:08x}, num = {}",
pc, MemoryReadCode(pc), num_instructions);
}
void CallSVC(std::uint32_t swi) override {
@ -135,14 +119,18 @@ public:
if (GDBStub::IsConnected()) {
parent.jit->HaltExecution();
parent.SetPC(pc);
Kernel::Thread* thread =
parent.system.Kernel().GetCurrentThreadManager().GetCurrentThread();
parent.SaveContext(thread->context);
GDBStub::Break();
GDBStub::SendTrap(thread, 5);
parent.ServeBreak();
return;
}
break;
case Dynarmic::A32::Exception::SendEvent:
case Dynarmic::A32::Exception::SendEventLocal:
case Dynarmic::A32::Exception::WaitForInterrupt:
case Dynarmic::A32::Exception::WaitForEvent:
case Dynarmic::A32::Exception::Yield:
case Dynarmic::A32::Exception::PreloadData:
case Dynarmic::A32::Exception::PreloadDataWithIntentToWrite:
return;
}
ASSERT_MSG(false, "ExceptionRaised(exception = {}, pc = {:08X}, code = {:08X})",
static_cast<std::size_t>(exception), pc, MemoryReadCode(pc));
@ -161,12 +149,10 @@ public:
Memory::MemorySystem& memory;
};
ARM_Dynarmic::ARM_Dynarmic(Core::System* system, Memory::MemorySystem& memory,
PrivilegeMode initial_mode, u32 id,
ARM_Dynarmic::ARM_Dynarmic(Core::System* system, Memory::MemorySystem& memory, u32 id,
std::shared_ptr<Core::Timing::Timer> timer)
: ARM_Interface(id, timer), system(*system), memory(memory),
cb(std::make_unique<DynarmicUserCallbacks>(*this)) {
interpreter_state = std::make_shared<ARMul_State>(system, memory, initial_mode);
SetPageTable(memory.GetCurrentPageTable());
}
@ -182,7 +168,11 @@ void ARM_Dynarmic::Run() {
}
void ARM_Dynarmic::Step() {
cb->InterpreterFallback(jit->Regs()[15], 1);
jit->Step();
if (GDBStub::IsConnected()) {
ServeBreak();
}
}
void ARM_Dynarmic::SetPC(u32 pc) {
@ -210,21 +200,25 @@ void ARM_Dynarmic::SetVFPReg(int index, u32 value) {
}
u32 ARM_Dynarmic::GetVFPSystemReg(VFPSystemRegister reg) const {
if (reg == VFP_FPSCR) {
switch (reg) {
case VFP_FPSCR:
return jit->Fpscr();
case VFP_FPEXC:
return fpexc;
}
// Dynarmic does not implement and/or expose other VFP registers, fallback to interpreter state
return interpreter_state->VFP[reg];
UNREACHABLE_MSG("Unknown VFP system register: {}", static_cast<size_t>(reg));
}
void ARM_Dynarmic::SetVFPSystemReg(VFPSystemRegister reg, u32 value) {
if (reg == VFP_FPSCR) {
switch (reg) {
case VFP_FPSCR:
jit->SetFpscr(value);
return;
case VFP_FPEXC:
fpexc = value;
return;
}
// Dynarmic does not implement and/or expose other VFP registers, fallback to interpreter state
interpreter_state->VFP[reg] = value;
UNREACHABLE_MSG("Unknown VFP system register: {}", static_cast<size_t>(reg));
}
u32 ARM_Dynarmic::GetCPSR() const {
@ -236,11 +230,25 @@ void ARM_Dynarmic::SetCPSR(u32 cpsr) {
}
u32 ARM_Dynarmic::GetCP15Register(CP15Register reg) const {
return interpreter_state->CP15[reg];
switch (reg) {
case CP15_THREAD_UPRW:
return cp15_state.cp15_thread_uprw;
case CP15_THREAD_URO:
return cp15_state.cp15_thread_uro;
}
UNREACHABLE_MSG("Unknown CP15 register: {}", static_cast<size_t>(reg));
}
void ARM_Dynarmic::SetCP15Register(CP15Register reg, u32 value) {
interpreter_state->CP15[reg] = value;
switch (reg) {
case CP15_THREAD_UPRW:
cp15_state.cp15_thread_uprw = value;
return;
case CP15_THREAD_URO:
cp15_state.cp15_thread_uro = value;
return;
}
UNREACHABLE_MSG("Unknown CP15 register: {}", static_cast<size_t>(reg));
}
std::unique_ptr<ARM_Interface::ThreadContext> ARM_Dynarmic::NewContext() const {
@ -252,7 +260,7 @@ void ARM_Dynarmic::SaveContext(const std::unique_ptr<ThreadContext>& arg) {
ASSERT(ctx);
jit->SaveContext(ctx->ctx);
ctx->fpexc = interpreter_state->VFP[VFP_FPEXC];
ctx->fpexc = fpexc;
}
void ARM_Dynarmic::LoadContext(const std::unique_ptr<ThreadContext>& arg) {
@ -260,7 +268,7 @@ void ARM_Dynarmic::LoadContext(const std::unique_ptr<ThreadContext>& arg) {
ASSERT(ctx);
jit->LoadContext(ctx->ctx);
interpreter_state->VFP[VFP_FPEXC] = ctx->fpexc;
fpexc = ctx->fpexc;
}
void ARM_Dynarmic::PrepareReschedule() {
@ -270,11 +278,9 @@ void ARM_Dynarmic::PrepareReschedule() {
}
void ARM_Dynarmic::ClearInstructionCache() {
// TODO: Clear interpreter cache when appropriate.
for (const auto& j : jits) {
j.second->ClearCache();
}
interpreter_state->instruction_cache.clear();
}
void ARM_Dynarmic::InvalidateCacheRange(u32 start_address, std::size_t length) {
@ -305,11 +311,18 @@ void ARM_Dynarmic::SetPageTable(const std::shared_ptr<Memory::PageTable>& page_t
jits.emplace(current_page_table, std::move(new_jit));
}
void ARM_Dynarmic::ServeBreak() {
Kernel::Thread* thread = system.Kernel().GetCurrentThreadManager().GetCurrentThread();
SaveContext(thread->context);
GDBStub::Break();
GDBStub::SendTrap(thread, 5);
}
std::unique_ptr<Dynarmic::A32::Jit> ARM_Dynarmic::MakeJit() {
Dynarmic::A32::UserConfig config;
config.callbacks = cb.get();
config.page_table = &current_page_table->GetPointerArray();
config.coprocessors[15] = std::make_shared<DynarmicCP15>(interpreter_state);
config.coprocessors[15] = std::make_shared<DynarmicCP15>(cp15_state);
config.define_unpredictable_behaviour = true;
return std::make_unique<Dynarmic::A32::Jit>(config);
}

12
src/core/arm/dynarmic/arm_dynarmic.h
View file

@ -9,7 +9,7 @@
#include <dynarmic/A32/a32.h>
#include "common/common_types.h"
#include "core/arm/arm_interface.h"
#include "core/arm/skyeye_common/armstate.h"
#include "core/arm/dynarmic/arm_dynarmic_cp15.h"
namespace Memory {
struct PageTable;
@ -24,8 +24,8 @@ class DynarmicUserCallbacks;
class ARM_Dynarmic final : public ARM_Interface {
public:
ARM_Dynarmic(Core::System* system, Memory::MemorySystem& memory, PrivilegeMode initial_mode,
u32 id, std::shared_ptr<Core::Timing::Timer> timer);
ARM_Dynarmic(Core::System* system, Memory::MemorySystem& memory, u32 id,
std::shared_ptr<Core::Timing::Timer> timer);
~ARM_Dynarmic() override;
void Run() override;
@ -59,14 +59,18 @@ protected:
std::shared_ptr<Memory::PageTable> GetPageTable() const override;
private:
void ServeBreak();
friend class DynarmicUserCallbacks;
Core::System& system;
Memory::MemorySystem& memory;
std::unique_ptr<DynarmicUserCallbacks> cb;
std::unique_ptr<Dynarmic::A32::Jit> MakeJit();
u32 fpexc = 0;
CP15State cp15_state;
Dynarmic::A32::Jit* jit = nullptr;
std::shared_ptr<Memory::PageTable> current_page_table = nullptr;
std::map<std::shared_ptr<Memory::PageTable>, std::unique_ptr<Dynarmic::A32::Jit>> jits;
std::shared_ptr<ARMul_State> interpreter_state;
};

48
src/core/arm/dynarmic/arm_dynarmic_cp15.cpp
View file

@ -10,14 +10,14 @@ using Callback = Dynarmic::A32::Coprocessor::Callback;
using CallbackOrAccessOneWord = Dynarmic::A32::Coprocessor::CallbackOrAccessOneWord;
using CallbackOrAccessTwoWords = Dynarmic::A32::Coprocessor::CallbackOrAccessTwoWords;
DynarmicCP15::DynarmicCP15(const std::shared_ptr<ARMul_State>& state) : interpreter_state(state) {}
DynarmicCP15::DynarmicCP15(CP15State& state) : state(state) {}
DynarmicCP15::~DynarmicCP15() = default;
boost::optional<Callback> DynarmicCP15::CompileInternalOperation(bool two, unsigned opc1,
CoprocReg CRd, CoprocReg CRn,
CoprocReg CRm, unsigned opc2) {
return boost::none;
std::optional<Callback> DynarmicCP15::CompileInternalOperation(bool two, unsigned opc1,
CoprocReg CRd, CoprocReg CRn,
CoprocReg CRm, unsigned opc2) {
return std::nullopt;
}
CallbackOrAccessOneWord DynarmicCP15::CompileSendOneWord(bool two, unsigned opc1, CoprocReg CRn,
@ -26,31 +26,31 @@ CallbackOrAccessOneWord DynarmicCP15::CompileSendOneWord(bool two, unsigned opc1
if (!two && CRn == CoprocReg::C7 && opc1 == 0 && CRm == CoprocReg::C5 && opc2 == 4) {
// This is a dummy write, we ignore the value written here.
return &interpreter_state->CP15[CP15_FLUSH_PREFETCH_BUFFER];
return &state.cp15_flush_prefetch_buffer;
}
if (!two && CRn == CoprocReg::C7 && opc1 == 0 && CRm == CoprocReg::C10) {
switch (opc2) {
case 4:
// This is a dummy write, we ignore the value written here.
return &interpreter_state->CP15[CP15_DATA_SYNC_BARRIER];
return &state.cp15_data_sync_barrier;
case 5:
// This is a dummy write, we ignore the value written here.
return &interpreter_state->CP15[CP15_DATA_MEMORY_BARRIER];
return &state.cp15_data_memory_barrier;
default:
return boost::blank{};
return std::monostate{};
}
}
if (!two && CRn == CoprocReg::C13 && opc1 == 0 && CRm == CoprocReg::C0 && opc2 == 2) {
return &interpreter_state->CP15[CP15_THREAD_UPRW];
return &state.cp15_thread_uprw;
}
return boost::blank{};
return std::monostate{};
}
CallbackOrAccessTwoWords DynarmicCP15::CompileSendTwoWords(bool two, unsigned opc, CoprocReg CRm) {
return boost::blank{};
return std::monostate{};
}
CallbackOrAccessOneWord DynarmicCP15::CompileGetOneWord(bool two, unsigned opc1, CoprocReg CRn,
@ -60,29 +60,27 @@ CallbackOrAccessOneWord DynarmicCP15::CompileGetOneWord(bool two, unsigned opc1,
if (!two && CRn == CoprocReg::C13 && opc1 == 0 && CRm == CoprocReg::C0) {
switch (opc2) {
case 2:
return &interpreter_state->CP15[CP15_THREAD_UPRW];
return &state.cp15_thread_uprw;
case 3:
return &interpreter_state->CP15[CP15_THREAD_URO];
return &state.cp15_thread_uro;
default:
return boost::blank{};
return std::monostate{};
}
}
return boost::blank{};
return std::monostate{};
}
CallbackOrAccessTwoWords DynarmicCP15::CompileGetTwoWords(bool two, unsigned opc, CoprocReg CRm) {
return boost::blank{};
return std::monostate{};
}
boost::optional<Callback> DynarmicCP15::CompileLoadWords(bool two, bool long_transfer,
CoprocReg CRd,
boost::optional<u8> option) {
return boost::none;
std::optional<Callback> DynarmicCP15::CompileLoadWords(bool two, bool long_transfer, CoprocReg CRd,
std::optional<u8> option) {
return std::nullopt;
}
boost::optional<Callback> DynarmicCP15::CompileStoreWords(bool two, bool long_transfer,
CoprocReg CRd,
boost::optional<u8> option) {
return boost::none;
std::optional<Callback> DynarmicCP15::CompileStoreWords(bool two, bool long_transfer, CoprocReg CRd,
std::optional<u8> option) {
return std::nullopt;
}

26
src/core/arm/dynarmic/arm_dynarmic_cp15.h
View file

@ -8,29 +8,35 @@
#include <dynarmic/A32/coprocessor.h>
#include "common/common_types.h"
struct ARMul_State;
struct CP15State {
u32 cp15_thread_uprw = 0;
u32 cp15_thread_uro = 0;
u32 cp15_flush_prefetch_buffer = 0; ///< dummy value
u32 cp15_data_sync_barrier = 0; ///< dummy value
u32 cp15_data_memory_barrier = 0; ///< dummy value
};
class DynarmicCP15 final : public Dynarmic::A32::Coprocessor {
public:
using CoprocReg = Dynarmic::A32::CoprocReg;
explicit DynarmicCP15(const std::shared_ptr<ARMul_State>&);
explicit DynarmicCP15(CP15State&);
~DynarmicCP15() override;
boost::optional<Callback> CompileInternalOperation(bool two, unsigned opc1, CoprocReg CRd,
CoprocReg CRn, CoprocReg CRm,
unsigned opc2) override;
std::optional<Callback> CompileInternalOperation(bool two, unsigned opc1, CoprocReg CRd,
CoprocReg CRn, CoprocReg CRm,
unsigned opc2) override;
CallbackOrAccessOneWord CompileSendOneWord(bool two, unsigned opc1, CoprocReg CRn,
CoprocReg CRm, unsigned opc2) override;
CallbackOrAccessTwoWords CompileSendTwoWords(bool two, unsigned opc, CoprocReg CRm) override;
CallbackOrAccessOneWord CompileGetOneWord(bool two, unsigned opc1, CoprocReg CRn, CoprocReg CRm,
unsigned opc2) override;
CallbackOrAccessTwoWords CompileGetTwoWords(bool two, unsigned opc, CoprocReg CRm) override;
boost::optional<Callback> CompileLoadWords(bool two, bool long_transfer, CoprocReg CRd,
boost::optional<u8> option) override;
boost::optional<Callback> CompileStoreWords(bool two, bool long_transfer, CoprocReg CRd,
boost::optional<u8> option) override;
std::optional<Callback> CompileLoadWords(bool two, bool long_transfer, CoprocReg CRd,
std::optional<u8> option) override;
std::optional<Callback> CompileStoreWords(bool two, bool long_transfer, CoprocReg CRd,
std::optional<u8> option) override;
private:
std::shared_ptr<ARMul_State> interpreter_state;
CP15State& state;
};

33
src/core/core.cpp
View file

@ -242,7 +242,11 @@ System::ResultStatus System::Load(Frontend::EmuWindow& emu_window, const std::st
ASSERT(system_mode.first);
auto n3ds_mode = app_loader->LoadKernelN3dsMode();
ASSERT(n3ds_mode.first);
ResultStatus init_result{Init(emu_window, *system_mode.first, *n3ds_mode.first)};
u32 num_cores = 2;
if (Settings::values.is_new_3ds) {
num_cores = 4;
}
ResultStatus init_result{Init(emu_window, *system_mode.first, *n3ds_mode.first, num_cores)};
if (init_result != ResultStatus::Success) {
LOG_CRITICAL(Core, "Failed to initialize system (Error {})!",
static_cast<u32>(init_result));
@ -315,14 +319,10 @@ void System::Reschedule() {
}
}
System::ResultStatus System::Init(Frontend::EmuWindow& emu_window, u32 system_mode, u8 n3ds_mode) {
System::ResultStatus System::Init(Frontend::EmuWindow& emu_window, u32 system_mode, u8 n3ds_mode,
u32 num_cores) {
LOG_DEBUG(HW_Memory, "initialized OK");
u32 num_cores = 2;
if (Settings::values.is_new_3ds) {
num_cores = 4;
}
memory = std::make_unique<Memory::MemorySystem>();
timing = std::make_unique<Timing>(num_cores, Settings::values.cpu_clock_percentage);
@ -334,7 +334,7 @@ System::ResultStatus System::Init(Frontend::EmuWindow& emu_window, u32 system_mo
#ifdef ARCHITECTURE_x86_64
for (u32 i = 0; i < num_cores; ++i) {
cpu_cores.push_back(
std::make_shared<ARM_Dynarmic>(this, *memory, USER32MODE, i, timing->GetTimer(i)));
std::make_shared<ARM_Dynarmic>(this, *memory, i, timing->GetTimer(i)));
}
#else
for (u32 i = 0; i < num_cores; ++i) {
@ -536,6 +536,13 @@ void System::Reset() {
template <class Archive>
void System::serialize(Archive& ar, const unsigned int file_version) {
u32 num_cores;
if (Archive::is_saving::value) {
num_cores = this->GetNumCores();
}
ar& num_cores;
if (Archive::is_loading::value) {
// When loading, we want to make sure any lingering state gets cleared out before we begin.
// Shutdown, but persist a few things between loads...
@ -544,17 +551,9 @@ void System::serialize(Archive& ar, const unsigned int file_version) {
// Re-initialize everything like it was before
auto system_mode = this->app_loader->LoadKernelSystemMode();
auto n3ds_mode = this->app_loader->LoadKernelN3dsMode();
Init(*m_emu_window, *system_mode.first, *n3ds_mode.first);
Init(*m_emu_window, *system_mode.first, *n3ds_mode.first, num_cores);
}
u32 num_cores;
if (Archive::is_saving::value) {
num_cores = this->GetNumCores();
}
ar& num_cores;
if (num_cores != this->GetNumCores()) {
throw std::runtime_error("Wrong N3DS mode");
}
// flush on save, don't flush on load
bool should_flush = !Archive::is_loading::value;
Memory::RasterizerClearAll(should_flush);

2
src/core/core.h
View file

@ -315,7 +315,7 @@ private:
* @param system_mode The system mode.
* @return ResultStatus code, indicating if the operation succeeded.
*/
ResultStatus Init(Frontend::EmuWindow& emu_window, u32 system_mode, u8 n3ds_mode);
ResultStatus Init(Frontend::EmuWindow& emu_window, u32 system_mode, u8 n3ds_mode, u32 num_cores);
/// Reschedule the core emulation
void Reschedule();