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ARM:Disassembler Better differentiate TEQ from MSR

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This commit is contained in:
Zaneo 2016-04-02 03:10:55 -04:00
parent e5e3b97db2
commit a75eded485
1 changed files with 6 additions and 3 deletions
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9
src/core/arm/disassembler/arm_disasm.cpp
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@ -1500,6 +1500,9 @@ Opcode ARM_Disasm::DecodeALU(u32 insn) {
u8 is_immed = (insn >> 25) & 0x1;
u8 opcode = (insn >> 21) & 0xf;
u8 bit_s = (insn >> 20) & 1;
u8 msr_15_12 = (insn >> 12) & 0xF;
u8 msr_11_8 = (insn >> 8) & 0xF;
u8 msr_7_4 = (insn >> 4) & 0xF;
u8 shift_is_reg = (insn >> 4) & 1;
u8 bit7 = (insn >> 7) & 1;
if (!is_immed && shift_is_reg && (bit7 != 0)) {
@ -1529,9 +1532,9 @@ Opcode ARM_Disasm::DecodeALU(u32 insn) {
return OP_TST;
return OP_MRS;
case 0x9:
if (bit_s)
return OP_TEQ;
return OP_MSR;
if (msr_15_12 == 0xf && msr_11_8 == 0 && msr_7_4 == 0)
return OP_MSR;
return OP_TEQ;
case 0xa:
if (bit_s)
return OP_CMP;