From bf5711d944bbdf7b5663ba4fec1b9066f16e2bb2 Mon Sep 17 00:00:00 2001
From: thesource <thesourcehim@gmail.com>
Date: Thu, 29 Apr 2021 12:02:19 +0300
Subject: [PATCH] gcc 11 compatibility fix

---
 src/common/ring_buffer.h             |  1 +
 src/core/hle/service/gsp/gsp_gpu.cpp | 77 +++++++++++++++++++---------
 2 files changed, 55 insertions(+), 23 deletions(-)

diff --git a/src/common/ring_buffer.h b/src/common/ring_buffer.h
index 080059058..e3d2b01af 100644
--- a/src/common/ring_buffer.h
+++ b/src/common/ring_buffer.h
@@ -4,6 +4,7 @@
 
 #pragma once
 
+#include <limits>
 #include <algorithm>
 #include <array>
 #include <atomic>
diff --git a/src/core/hle/service/gsp/gsp_gpu.cpp b/src/core/hle/service/gsp/gsp_gpu.cpp
index 5a41f5ca0..bcbdfdaae 100644
--- a/src/core/hle/service/gsp/gsp_gpu.cpp
+++ b/src/core/hle/service/gsp/gsp_gpu.cpp
@@ -282,30 +282,61 @@ ResultCode SetBufferSwap(u32 screen_id, const FrameBufferInfo& info) {
     u32 base_address = 0x400000;
     PAddr phys_address_left = VirtualToPhysicalAddress(info.address_left);
     PAddr phys_address_right = VirtualToPhysicalAddress(info.address_right);
-    if (info.active_fb == 0) {
-        WriteSingleHWReg(base_address + 4 * static_cast<u32>(GPU_REG_INDEX(
-                                                framebuffer_config[screen_id].address_left1)),
-                         phys_address_left);
-        WriteSingleHWReg(base_address + 4 * static_cast<u32>(GPU_REG_INDEX(
-                                                framebuffer_config[screen_id].address_right1)),
-                         phys_address_right);
-    } else {
-        WriteSingleHWReg(base_address + 4 * static_cast<u32>(GPU_REG_INDEX(
-                                                framebuffer_config[screen_id].address_left2)),
-                         phys_address_left);
-        WriteSingleHWReg(base_address + 4 * static_cast<u32>(GPU_REG_INDEX(
-                                                framebuffer_config[screen_id].address_right2)),
-                         phys_address_right);
+    switch(screen_id)
+    {
+        case 0:
+            if (info.active_fb == 0) {
+                WriteSingleHWReg(base_address + 4 * static_cast<u32>(GPU_REG_INDEX(
+                                                        framebuffer_config[0].address_left1)),
+                                phys_address_left);
+                WriteSingleHWReg(base_address + 4 * static_cast<u32>(GPU_REG_INDEX(
+                                                        framebuffer_config[0].address_right1)),
+                                phys_address_right);
+            } else {
+                WriteSingleHWReg(base_address + 4 * static_cast<u32>(GPU_REG_INDEX(
+                                                        framebuffer_config[0].address_left2)),
+                                phys_address_left);
+                WriteSingleHWReg(base_address + 4 * static_cast<u32>(GPU_REG_INDEX(
+                                                        framebuffer_config[0].address_right2)),
+                                phys_address_right);
+            }
+            WriteSingleHWReg(base_address +
+                                4 * static_cast<u32>(GPU_REG_INDEX(framebuffer_config[0].stride)),
+                            info.stride);
+            WriteSingleHWReg(base_address + 4 * static_cast<u32>(GPU_REG_INDEX(
+                                                    framebuffer_config[0].color_format)),
+                            info.format);
+            WriteSingleHWReg(
+                base_address + 4 * static_cast<u32>(GPU_REG_INDEX(framebuffer_config[0].active_fb)),
+                info.shown_fb);
+            break;
+        case 1:
+            if (info.active_fb == 0) {
+                WriteSingleHWReg(base_address + 4 * static_cast<u32>(GPU_REG_INDEX(
+                                                        framebuffer_config[1].address_left1)),
+                                phys_address_left);
+                WriteSingleHWReg(base_address + 4 * static_cast<u32>(GPU_REG_INDEX(
+                                                        framebuffer_config[1].address_right1)),
+                                phys_address_right);
+            } else {
+                WriteSingleHWReg(base_address + 4 * static_cast<u32>(GPU_REG_INDEX(
+                                                        framebuffer_config[1].address_left2)),
+                                phys_address_left);
+                WriteSingleHWReg(base_address + 4 * static_cast<u32>(GPU_REG_INDEX(
+                                                        framebuffer_config[1].address_right2)),
+                                phys_address_right);
+            }
+            WriteSingleHWReg(base_address +
+                                4 * static_cast<u32>(GPU_REG_INDEX(framebuffer_config[1].stride)),
+                            info.stride);
+            WriteSingleHWReg(base_address + 4 * static_cast<u32>(GPU_REG_INDEX(
+                                                    framebuffer_config[1].color_format)),
+                            info.format);
+            WriteSingleHWReg(
+                base_address + 4 * static_cast<u32>(GPU_REG_INDEX(framebuffer_config[1].active_fb)),
+                info.shown_fb);
+            break;
     }
-    WriteSingleHWReg(base_address +
-                         4 * static_cast<u32>(GPU_REG_INDEX(framebuffer_config[screen_id].stride)),
-                     info.stride);
-    WriteSingleHWReg(base_address + 4 * static_cast<u32>(GPU_REG_INDEX(
-                                            framebuffer_config[screen_id].color_format)),
-                     info.format);
-    WriteSingleHWReg(
-        base_address + 4 * static_cast<u32>(GPU_REG_INDEX(framebuffer_config[screen_id].active_fb)),
-        info.shown_fb);
 
     if (Pica::g_debug_context)
         Pica::g_debug_context->OnEvent(Pica::DebugContext::Event::BufferSwapped, nullptr);