diff --git a/src/video_core/command_processor.cpp b/src/video_core/command_processor.cpp index 8a5d8533c..04de3e6b1 100644 --- a/src/video_core/command_processor.cpp +++ b/src/video_core/command_processor.cpp @@ -138,7 +138,7 @@ static void WritePicaReg(u32 id, u32 value, u32 mask) { if (immediate_attribute_id >= regs.vs.num_input_attributes + 1) { immediate_attribute_id = 0; - Shader::UnitState shader_unit; + Shader::UnitState shader_unit; g_state.vs.Setup(); // Send to vertex shader @@ -237,7 +237,7 @@ static void WritePicaReg(u32 id, u32 value, u32 mask) { unsigned int vertex_cache_pos = 0; vertex_cache_ids.fill(-1); - Shader::UnitState shader_unit; + Shader::UnitState shader_unit; g_state.vs.Setup(); for (unsigned int index = 0; index < regs.num_vertices; ++index) { diff --git a/src/video_core/shader/debug_data.h b/src/video_core/shader/debug_data.h index b0ccf437d..9e82122e1 100644 --- a/src/video_core/shader/debug_data.h +++ b/src/video_core/shader/debug_data.h @@ -19,8 +19,8 @@ struct DebugData; template <> struct DebugData { // TODO: Hide these behind and interface and move them to DebugData - u32 max_offset; ///< maximum program counter ever reached - u32 max_opdesc_id; ///< maximum swizzle pattern index ever used + u32 max_offset = 0; ///< maximum program counter ever reached + u32 max_opdesc_id = 0; ///< maximum swizzle pattern index ever used }; template <> @@ -75,8 +75,8 @@ struct DebugData { unsigned mask = 0; }; - u32 max_offset; ///< maximum program counter ever reached - u32 max_opdesc_id; ///< maximum swizzle pattern index ever used + u32 max_offset = 0; ///< maximum program counter ever reached + u32 max_opdesc_id = 0; ///< maximum swizzle pattern index ever used /// List of records for each executed shader instruction std::vector::Record> records; diff --git a/src/video_core/shader/shader.cpp b/src/video_core/shader/shader.cpp index c7f23dab9..a4aa3c9e0 100644 --- a/src/video_core/shader/shader.cpp +++ b/src/video_core/shader/shader.cpp @@ -109,15 +109,12 @@ void ShaderSetup::Setup() { MICROPROFILE_DEFINE(GPU_Shader, "GPU", "Shader", MP_RGB(50, 50, 240)); -void ShaderSetup::Run(UnitState& state, const InputVertex& input, int num_attributes) { +void ShaderSetup::Run(UnitState& state, const InputVertex& input, int num_attributes) { auto& config = g_state.regs.vs; auto& setup = g_state.vs; MICROPROFILE_SCOPE(GPU_Shader); - state.debug.max_offset = 0; - state.debug.max_opdesc_id = 0; - // Setup input register table const auto& attribute_register_map = config.input_register_map; @@ -128,22 +125,23 @@ void ShaderSetup::Run(UnitState& state, const InputVertex& input, int num state.conditional_code[1] = false; #ifdef ARCHITECTURE_x86_64 - if (VideoCore::g_shader_jit_enabled) + if (VideoCore::g_shader_jit_enabled) { jit_shader->Run(setup, state, config.main_offset); - else - RunInterpreter(setup, state, config.main_offset); + } else { + DebugData dummy_debug_data; + RunInterpreter(setup, state, dummy_debug_data, config.main_offset); + } #else - RunInterpreter(setup, state, config.main_offset); + DebugData dummy_debug_data; + RunInterpreter(setup, state, dummy_debug_data, config.main_offset); #endif // ARCHITECTURE_x86_64 } DebugData ShaderSetup::ProduceDebugInfo(const InputVertex& input, int num_attributes, const Regs::ShaderConfig& config, const ShaderSetup& setup) { - UnitState state; - - state.debug.max_offset = 0; - state.debug.max_opdesc_id = 0; + UnitState state; + DebugData debug_data; // Setup input register table boost::fill(state.registers.input, Math::Vec4::AssignToAll(float24::Zero())); @@ -154,8 +152,8 @@ DebugData ShaderSetup::ProduceDebugInfo(const InputVertex& input, int num_ state.conditional_code[0] = false; state.conditional_code[1] = false; - RunInterpreter(setup, state, config.main_offset); - return state.debug; + RunInterpreter(setup, state, debug_data, config.main_offset); + return debug_data; } } // namespace Shader diff --git a/src/video_core/shader/shader.h b/src/video_core/shader/shader.h index d96724860..2b07759b9 100644 --- a/src/video_core/shader/shader.h +++ b/src/video_core/shader/shader.h @@ -94,7 +94,6 @@ static_assert(std::is_pod::value, "Structure is not POD"); * single shader unit that processes all shaders serially. Putting the state information in a struct * here will make it easier for us to parallelize the shader processing later. */ -template struct UnitState { struct Registers { // The registers are accessed by the shader JIT using SSE instructions, and are therefore @@ -112,8 +111,6 @@ struct UnitState { // TODO: How many bits do these actually have? s32 address_registers[3]; - DebugData debug; - static size_t InputOffset(const SourceRegister& reg) { switch (reg.GetRegisterType()) { case RegisterType::Input: @@ -188,7 +185,7 @@ struct ShaderSetup { * @param input Input vertex into the shader * @param num_attributes The number of vertex shader attributes */ - void Run(UnitState& state, const InputVertex& input, int num_attributes); + void Run(UnitState& state, const InputVertex& input, int num_attributes); /** * Produce debug information based on the given shader and input vertex diff --git a/src/video_core/shader/shader_interpreter.cpp b/src/video_core/shader/shader_interpreter.cpp index 29f3ff684..70db4167e 100644 --- a/src/video_core/shader/shader_interpreter.cpp +++ b/src/video_core/shader/shader_interpreter.cpp @@ -39,7 +39,8 @@ struct CallStackElement { }; template -void RunInterpreter(const ShaderSetup& setup, UnitState& state, unsigned offset) { +void RunInterpreter(const ShaderSetup& setup, UnitState& state, DebugData& debug_data, + unsigned offset) { // TODO: Is there a maximal size for this? boost::container::static_vector call_stack; u32 program_counter = offset; @@ -104,11 +105,11 @@ void RunInterpreter(const ShaderSetup& setup, UnitState& state, unsigned const Instruction instr = {program_code[program_counter]}; const SwizzlePattern swizzle = {swizzle_data[instr.common.operand_desc_id]}; - Record(state.debug, iteration, program_counter); + Record(debug_data, iteration, program_counter); if (iteration > 0) - Record(state.debug, iteration - 1, program_counter); + Record(debug_data, iteration - 1, program_counter); - state.debug.max_offset = std::max(state.debug.max_offset, 1 + program_counter); + debug_data.max_offset = std::max(debug_data.max_offset, 1 + program_counter); auto LookupSourceRegister = [&](const SourceRegister& source_reg) -> const float24* { switch (source_reg.GetRegisterType()) { @@ -176,54 +177,54 @@ void RunInterpreter(const ShaderSetup& setup, UnitState& state, unsigned ? &state.registers.temporary[instr.common.dest.Value().GetIndex()][0] : dummy_vec4_float24; - state.debug.max_opdesc_id = - std::max(state.debug.max_opdesc_id, 1 + instr.common.operand_desc_id); + debug_data.max_opdesc_id = + std::max(debug_data.max_opdesc_id, 1 + instr.common.operand_desc_id); switch (instr.opcode.Value().EffectiveOpCode()) { case OpCode::Id::ADD: { - Record(state.debug, iteration, src1); - Record(state.debug, iteration, src2); - Record(state.debug, iteration, dest); + Record(debug_data, iteration, src1); + Record(debug_data, iteration, src2); + Record(debug_data, iteration, dest); for (int i = 0; i < 4; ++i) { if (!swizzle.DestComponentEnabled(i)) continue; dest[i] = src1[i] + src2[i]; } - Record(state.debug, iteration, dest); + Record(debug_data, iteration, dest); break; } case OpCode::Id::MUL: { - Record(state.debug, iteration, src1); - Record(state.debug, iteration, src2); - Record(state.debug, iteration, dest); + Record(debug_data, iteration, src1); + Record(debug_data, iteration, src2); + Record(debug_data, iteration, dest); for (int i = 0; i < 4; ++i) { if (!swizzle.DestComponentEnabled(i)) continue; dest[i] = src1[i] * src2[i]; } - Record(state.debug, iteration, dest); + Record(debug_data, iteration, dest); break; } case OpCode::Id::FLR: - Record(state.debug, iteration, src1); - Record(state.debug, iteration, dest); + Record(debug_data, iteration, src1); + Record(debug_data, iteration, dest); for (int i = 0; i < 4; ++i) { if (!swizzle.DestComponentEnabled(i)) continue; dest[i] = float24::FromFloat32(std::floor(src1[i].ToFloat32())); } - Record(state.debug, iteration, dest); + Record(debug_data, iteration, dest); break; case OpCode::Id::MAX: - Record(state.debug, iteration, src1); - Record(state.debug, iteration, src2); - Record(state.debug, iteration, dest); + Record(debug_data, iteration, src1); + Record(debug_data, iteration, src2); + Record(debug_data, iteration, dest); for (int i = 0; i < 4; ++i) { if (!swizzle.DestComponentEnabled(i)) continue; @@ -233,13 +234,13 @@ void RunInterpreter(const ShaderSetup& setup, UnitState& state, unsigned // max(NaN, 0) -> 0 dest[i] = (src1[i] > src2[i]) ? src1[i] : src2[i]; } - Record(state.debug, iteration, dest); + Record(debug_data, iteration, dest); break; case OpCode::Id::MIN: - Record(state.debug, iteration, src1); - Record(state.debug, iteration, src2); - Record(state.debug, iteration, dest); + Record(debug_data, iteration, src1); + Record(debug_data, iteration, src2); + Record(debug_data, iteration, dest); for (int i = 0; i < 4; ++i) { if (!swizzle.DestComponentEnabled(i)) continue; @@ -249,16 +250,16 @@ void RunInterpreter(const ShaderSetup& setup, UnitState& state, unsigned // min(NaN, 0) -> 0 dest[i] = (src1[i] < src2[i]) ? src1[i] : src2[i]; } - Record(state.debug, iteration, dest); + Record(debug_data, iteration, dest); break; case OpCode::Id::DP3: case OpCode::Id::DP4: case OpCode::Id::DPH: case OpCode::Id::DPHI: { - Record(state.debug, iteration, src1); - Record(state.debug, iteration, src2); - Record(state.debug, iteration, dest); + Record(debug_data, iteration, src1); + Record(debug_data, iteration, src2); + Record(debug_data, iteration, dest); OpCode::Id opcode = instr.opcode.Value().EffectiveOpCode(); if (opcode == OpCode::Id::DPH || opcode == OpCode::Id::DPHI) @@ -274,14 +275,14 @@ void RunInterpreter(const ShaderSetup& setup, UnitState& state, unsigned dest[i] = dot; } - Record(state.debug, iteration, dest); + Record(debug_data, iteration, dest); break; } // Reciprocal case OpCode::Id::RCP: { - Record(state.debug, iteration, src1); - Record(state.debug, iteration, dest); + Record(debug_data, iteration, src1); + Record(debug_data, iteration, dest); float24 rcp_res = float24::FromFloat32(1.0f / src1[0].ToFloat32()); for (int i = 0; i < 4; ++i) { if (!swizzle.DestComponentEnabled(i)) @@ -289,14 +290,14 @@ void RunInterpreter(const ShaderSetup& setup, UnitState& state, unsigned dest[i] = rcp_res; } - Record(state.debug, iteration, dest); + Record(debug_data, iteration, dest); break; } // Reciprocal Square Root case OpCode::Id::RSQ: { - Record(state.debug, iteration, src1); - Record(state.debug, iteration, dest); + Record(debug_data, iteration, src1); + Record(debug_data, iteration, dest); float24 rsq_res = float24::FromFloat32(1.0f / std::sqrt(src1[0].ToFloat32())); for (int i = 0; i < 4; ++i) { if (!swizzle.DestComponentEnabled(i)) @@ -304,12 +305,12 @@ void RunInterpreter(const ShaderSetup& setup, UnitState& state, unsigned dest[i] = rsq_res; } - Record(state.debug, iteration, dest); + Record(debug_data, iteration, dest); break; } case OpCode::Id::MOVA: { - Record(state.debug, iteration, src1); + Record(debug_data, iteration, src1); for (int i = 0; i < 2; ++i) { if (!swizzle.DestComponentEnabled(i)) continue; @@ -317,29 +318,29 @@ void RunInterpreter(const ShaderSetup& setup, UnitState& state, unsigned // TODO: Figure out how the rounding is done on hardware state.address_registers[i] = static_cast(src1[i].ToFloat32()); } - Record(state.debug, iteration, + Record(debug_data, iteration, state.address_registers); break; } case OpCode::Id::MOV: { - Record(state.debug, iteration, src1); - Record(state.debug, iteration, dest); + Record(debug_data, iteration, src1); + Record(debug_data, iteration, dest); for (int i = 0; i < 4; ++i) { if (!swizzle.DestComponentEnabled(i)) continue; dest[i] = src1[i]; } - Record(state.debug, iteration, dest); + Record(debug_data, iteration, dest); break; } case OpCode::Id::SGE: case OpCode::Id::SGEI: - Record(state.debug, iteration, src1); - Record(state.debug, iteration, src2); - Record(state.debug, iteration, dest); + Record(debug_data, iteration, src1); + Record(debug_data, iteration, src2); + Record(debug_data, iteration, dest); for (int i = 0; i < 4; ++i) { if (!swizzle.DestComponentEnabled(i)) continue; @@ -347,14 +348,14 @@ void RunInterpreter(const ShaderSetup& setup, UnitState& state, unsigned dest[i] = (src1[i] >= src2[i]) ? float24::FromFloat32(1.0f) : float24::FromFloat32(0.0f); } - Record(state.debug, iteration, dest); + Record(debug_data, iteration, dest); break; case OpCode::Id::SLT: case OpCode::Id::SLTI: - Record(state.debug, iteration, src1); - Record(state.debug, iteration, src2); - Record(state.debug, iteration, dest); + Record(debug_data, iteration, src1); + Record(debug_data, iteration, src2); + Record(debug_data, iteration, dest); for (int i = 0; i < 4; ++i) { if (!swizzle.DestComponentEnabled(i)) continue; @@ -362,12 +363,12 @@ void RunInterpreter(const ShaderSetup& setup, UnitState& state, unsigned dest[i] = (src1[i] < src2[i]) ? float24::FromFloat32(1.0f) : float24::FromFloat32(0.0f); } - Record(state.debug, iteration, dest); + Record(debug_data, iteration, dest); break; case OpCode::Id::CMP: - Record(state.debug, iteration, src1); - Record(state.debug, iteration, src2); + Record(debug_data, iteration, src1); + Record(debug_data, iteration, src2); for (int i = 0; i < 2; ++i) { // TODO: Can you restrict to one compare via dest masking? @@ -404,12 +405,12 @@ void RunInterpreter(const ShaderSetup& setup, UnitState& state, unsigned break; } } - Record(state.debug, iteration, state.conditional_code); + Record(debug_data, iteration, state.conditional_code); break; case OpCode::Id::EX2: { - Record(state.debug, iteration, src1); - Record(state.debug, iteration, dest); + Record(debug_data, iteration, src1); + Record(debug_data, iteration, dest); // EX2 only takes first component exp2 and writes it to all dest components float24 ex2_res = float24::FromFloat32(std::exp2(src1[0].ToFloat32())); @@ -420,13 +421,13 @@ void RunInterpreter(const ShaderSetup& setup, UnitState& state, unsigned dest[i] = ex2_res; } - Record(state.debug, iteration, dest); + Record(debug_data, iteration, dest); break; } case OpCode::Id::LG2: { - Record(state.debug, iteration, src1); - Record(state.debug, iteration, dest); + Record(debug_data, iteration, src1); + Record(debug_data, iteration, dest); // LG2 only takes the first component log2 and writes it to all dest components float24 lg2_res = float24::FromFloat32(std::log2(src1[0].ToFloat32())); @@ -437,7 +438,7 @@ void RunInterpreter(const ShaderSetup& setup, UnitState& state, unsigned dest[i] = lg2_res; } - Record(state.debug, iteration, dest); + Record(debug_data, iteration, dest); break; } @@ -519,17 +520,17 @@ void RunInterpreter(const ShaderSetup& setup, UnitState& state, unsigned ? &state.registers.temporary[instr.mad.dest.Value().GetIndex()][0] : dummy_vec4_float24; - Record(state.debug, iteration, src1); - Record(state.debug, iteration, src2); - Record(state.debug, iteration, src3); - Record(state.debug, iteration, dest); + Record(debug_data, iteration, src1); + Record(debug_data, iteration, src2); + Record(debug_data, iteration, src3); + Record(debug_data, iteration, dest); for (int i = 0; i < 4; ++i) { if (!swizzle.DestComponentEnabled(i)) continue; dest[i] = src1[i] * src2[i] + src3[i]; } - Record(state.debug, iteration, dest); + Record(debug_data, iteration, dest); } else { LOG_ERROR(HW_GPU, "Unhandled multiply-add instruction: 0x%02x (%s): 0x%08x", (int)instr.opcode.Value().EffectiveOpCode(), @@ -546,8 +547,7 @@ void RunInterpreter(const ShaderSetup& setup, UnitState& state, unsigned break; case OpCode::Id::JMPC: - Record(state.debug, iteration, - state.conditional_code); + Record(debug_data, iteration, state.conditional_code); if (evaluate_condition(instr.flow_control)) { program_counter = instr.flow_control.dest_offset - 1; } @@ -555,7 +555,7 @@ void RunInterpreter(const ShaderSetup& setup, UnitState& state, unsigned case OpCode::Id::JMPU: Record( - state.debug, iteration, uniforms.b[instr.flow_control.bool_uniform_id]); + debug_data, iteration, uniforms.b[instr.flow_control.bool_uniform_id]); if (uniforms.b[instr.flow_control.bool_uniform_id] == !(instr.flow_control.num_instructions & 1)) { @@ -570,7 +570,7 @@ void RunInterpreter(const ShaderSetup& setup, UnitState& state, unsigned case OpCode::Id::CALLU: Record( - state.debug, iteration, uniforms.b[instr.flow_control.bool_uniform_id]); + debug_data, iteration, uniforms.b[instr.flow_control.bool_uniform_id]); if (uniforms.b[instr.flow_control.bool_uniform_id]) { call(instr.flow_control.dest_offset, instr.flow_control.num_instructions, program_counter + 1, 0, 0); @@ -578,8 +578,7 @@ void RunInterpreter(const ShaderSetup& setup, UnitState& state, unsigned break; case OpCode::Id::CALLC: - Record(state.debug, iteration, - state.conditional_code); + Record(debug_data, iteration, state.conditional_code); if (evaluate_condition(instr.flow_control)) { call(instr.flow_control.dest_offset, instr.flow_control.num_instructions, program_counter + 1, 0, 0); @@ -591,7 +590,7 @@ void RunInterpreter(const ShaderSetup& setup, UnitState& state, unsigned case OpCode::Id::IFU: Record( - state.debug, iteration, uniforms.b[instr.flow_control.bool_uniform_id]); + debug_data, iteration, uniforms.b[instr.flow_control.bool_uniform_id]); if (uniforms.b[instr.flow_control.bool_uniform_id]) { call(program_counter + 1, instr.flow_control.dest_offset - program_counter - 1, instr.flow_control.dest_offset + instr.flow_control.num_instructions, 0, @@ -607,8 +606,7 @@ void RunInterpreter(const ShaderSetup& setup, UnitState& state, unsigned case OpCode::Id::IFC: { // TODO: Do we need to consider swizzlers here? - Record(state.debug, iteration, - state.conditional_code); + Record(debug_data, iteration, state.conditional_code); if (evaluate_condition(instr.flow_control)) { call(program_counter + 1, instr.flow_control.dest_offset - program_counter - 1, instr.flow_control.dest_offset + instr.flow_control.num_instructions, 0, @@ -629,7 +627,7 @@ void RunInterpreter(const ShaderSetup& setup, UnitState& state, unsigned uniforms.i[instr.flow_control.int_uniform_id].w); state.address_registers[2] = loop_param.y; - Record(state.debug, iteration, loop_param); + Record(debug_data, iteration, loop_param); call(program_counter + 1, instr.flow_control.dest_offset - program_counter + 1, instr.flow_control.dest_offset + 1, loop_param.x, loop_param.z); break; @@ -652,8 +650,8 @@ void RunInterpreter(const ShaderSetup& setup, UnitState& state, unsigned } // Explicit instantiation -template void RunInterpreter(const ShaderSetup& setup, UnitState& state, unsigned offset); -template void RunInterpreter(const ShaderSetup& setup, UnitState& state, unsigned offset); +template void RunInterpreter(const ShaderSetup&, UnitState&, DebugData&, unsigned offset); +template void RunInterpreter(const ShaderSetup&, UnitState&, DebugData&, unsigned offset); } // namespace diff --git a/src/video_core/shader/shader_interpreter.h b/src/video_core/shader/shader_interpreter.h index 48ede0a2e..d31dcd7a6 100644 --- a/src/video_core/shader/shader_interpreter.h +++ b/src/video_core/shader/shader_interpreter.h @@ -8,11 +8,14 @@ namespace Pica { namespace Shader { -template struct UnitState; template -void RunInterpreter(const ShaderSetup& setup, UnitState& state, unsigned offset); +struct DebugData; + +template +void RunInterpreter(const ShaderSetup& setup, UnitState& state, DebugData& debug_data, + unsigned offset); } // namespace diff --git a/src/video_core/shader/shader_jit_x64.cpp b/src/video_core/shader/shader_jit_x64.cpp index 65898035e..c588b778b 100644 --- a/src/video_core/shader/shader_jit_x64.cpp +++ b/src/video_core/shader/shader_jit_x64.cpp @@ -188,7 +188,7 @@ void JitShader::Compile_SwizzleSrc(Instruction instr, unsigned src_num, SourceRe src_offset = ShaderSetup::GetFloatUniformOffset(src_reg.GetIndex()); } else { src_ptr = STATE; - src_offset = UnitState::InputOffset(src_reg); + src_offset = UnitState::InputOffset(src_reg); } int src_offset_disp = (int)src_offset; @@ -266,7 +266,7 @@ void JitShader::Compile_DestEnable(Instruction instr, Xmm src) { SwizzlePattern swiz = {g_state.vs.swizzle_data[operand_desc_id]}; - size_t dest_offset_disp = UnitState::OutputOffset(dest); + size_t dest_offset_disp = UnitState::OutputOffset(dest); // If all components are enabled, write the result to the destination register if (swiz.dest_mask == NO_DEST_REG_MASK) { diff --git a/src/video_core/shader/shader_jit_x64.h b/src/video_core/shader/shader_jit_x64.h index e0ecde3f2..f37548306 100644 --- a/src/video_core/shader/shader_jit_x64.h +++ b/src/video_core/shader/shader_jit_x64.h @@ -34,7 +34,7 @@ class JitShader : public Xbyak::CodeGenerator { public: JitShader(); - void Run(const ShaderSetup& setup, UnitState& state, unsigned offset) const { + void Run(const ShaderSetup& setup, UnitState& state, unsigned offset) const { program(&setup, &state, instruction_labels[offset].getAddress()); }