addressing comments
This commit is contained in:
Bonta-kun
parent
c428dcddce
commit
c14627ddcf
3 changed files with 203 additions and 191 deletions
158
src/core/arm/cache/cache.cpp
vendored
158
src/core/arm/cache/cache.cpp
vendored
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@ -2,7 +2,6 @@
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include "common/assert.h"
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#include "core/arm/cache/cache.h"
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namespace Cache {
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@ -10,20 +9,20 @@ namespace Cache {
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static std::list<CacheBase*> caches;
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void RegisterCode(u32 address, u32 size) {
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for (auto const& cache : caches) {
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cache->OnCodeLoad(address, size);
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for (const auto& cache : caches) {
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cache->cache_fns.code_load(address, size);
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}
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}
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void UnregisterCode(u32 address, u32 size) {
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for (auto const& cache : caches) {
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cache->OnCodeUnload(address, size);
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for (const auto& cache : caches) {
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cache->cache_fns.code_unload(address, size);
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}
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}
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void ClearCache() {
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for (auto const& cache : caches) {
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cache->Clear();
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for (const auto& cache : caches) {
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cache->cache_fns.clear();
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}
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}
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@ -35,10 +34,7 @@ static void UnregisterCache(CacheBase* cache) {
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caches.erase(std::remove(caches.begin(), caches.end(), cache), caches.end());
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}
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CacheBase::CacheBase(bool index_mode, OnClearCb clearcb) : index_mode(index_mode) {
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page_pointers.fill(nullptr);
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Clear();
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SetClearCallback(clearcb);
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CacheBase::CacheBase(functions fns) : cache_fns(fns) {
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RegisterCache(this);
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}
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@ -46,144 +42,4 @@ CacheBase::~CacheBase() {
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UnregisterCache(this);
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}
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void CacheBase::Clear() {
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if (OnClearCallback != nullptr) {
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OnClearCallback();
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}
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for (auto& cache : ptr_caches) {
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cache.data.assign(cache.data.size(), nullptr);
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}
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if (index_mode) {
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blocks_pc.assign(MAX_BLOCKS, INVALID_BLOCK);
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next_block = num_blocks = 0;
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}
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}
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bool CacheBase::RemoveBlock(u32 pc) {
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void** ptr = page_pointers[pc >> Memory::PAGE_BITS];
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if (ptr != nullptr) {
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ptr = &ptr[pc & Memory::PAGE_MASK];
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if (*ptr == nullptr) {
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return false;
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}
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if (index_mode) {
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const u32 id = pointer_to_id(*ptr);
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ASSERT(blocks_pc[id] == pc);
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blocks_pc[id] = INVALID_BLOCK;
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if (id < next_block) {
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next_block = id;
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}
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while (num_blocks > 0 && blocks_pc[num_blocks - 1] == INVALID_BLOCK) {
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--num_blocks;
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}
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}
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*ptr = nullptr;
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return true;
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}
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return false;
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}
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bool CacheBase::RemoveRange(u32 start, u32 end) {
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bool result = false;
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for (auto& cache : ptr_caches) {
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for (u32 i = std::max(start, cache.addr); i < std::min(end, cache.addr_end); ++i) {
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void** ptr = &cache.data[i - cache.addr];
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if (*ptr == nullptr) {
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continue;
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}
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if (index_mode) {
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const u32 id = pointer_to_id(*ptr);
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ASSERT(blocks_pc[id] == i);
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blocks_pc[id] = INVALID_BLOCK;
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if (id < next_block) {
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next_block = id;
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}
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while (num_blocks > 0 && blocks_pc[num_blocks - 1] == INVALID_BLOCK) {
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--num_blocks;
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}
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}
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*ptr = nullptr;
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result = true;
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}
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}
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return result;
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}
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void CacheBase::OnCodeLoad(u32 address, u32 size) {
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const u32 end = address + size;
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// Check there is no overlapping
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for (auto const& cache : ptr_caches) {
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ASSERT((address >= cache.addr_end) || (end <= cache.addr));
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}
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ASSERT((address & Memory::PAGE_MASK) == 0 && (size & Memory::PAGE_MASK) == 0);
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BlockPtrCache cache{ address, address + size };
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cache.data.assign(size, nullptr);
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for (u32 i = address; i < end; i += Memory::PAGE_SIZE) {
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page_pointers[i >> Memory::PAGE_BITS] = &cache.data[i - address];
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}
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ptr_caches.emplace_back(std::move(cache));
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}
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void CacheBase::OnCodeUnload(u32 address, u32 size) {
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ptr_caches.erase(std::remove_if(ptr_caches.begin(), ptr_caches.end(),
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[&, this](auto const& cache) {
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if ((address < cache.addr_end) && (address + size > cache.addr)) {
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this->RemoveRange(cache.addr, cache.addr_end);
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for (u32 i = cache.addr; i < cache.addr_end; i += Memory::PAGE_SIZE) {
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page_pointers[i >> Memory::PAGE_BITS] = nullptr;
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}
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return true;
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}
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return false;
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}),
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ptr_caches.cend());
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}
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void*& CacheBase::GetNewPtr(u32 pc) {
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DEBUG_ASSERT(!index_mode || next_block == MAX_BLOCKS || ((next_block < MAX_BLOCKS) && blocks_pc[next_block] == INVALID_BLOCK));
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DEBUG_ASSERT(GetPtr(pc) == nullptr);
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void** page_ptr = page_pointers[pc >> Memory::PAGE_BITS];
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if (page_ptr == nullptr) {
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// pc isnt within mapped code
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OnCodeLoad(pc & ~Memory::PAGE_MASK, Memory::PAGE_SIZE);
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page_ptr = page_pointers[pc >> Memory::PAGE_BITS];
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}
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void** block_ptr = &page_ptr[pc & Memory::PAGE_MASK];
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DEBUG_ASSERT(*block_ptr == nullptr);
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if (index_mode) {
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if (next_block == MAX_BLOCKS) {
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Clear();
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}
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blocks_pc[next_block] = pc;
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*block_ptr = id_to_pointer(next_block);
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do {
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++next_block;
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} while (next_block <= num_blocks && blocks_pc[next_block] != INVALID_BLOCK);
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if (next_block > num_blocks) {
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num_blocks++;
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}
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}
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return *block_ptr;
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}
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}
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232
src/core/arm/cache/cache.h
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232
src/core/arm/cache/cache.h
vendored
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@ -27,19 +27,41 @@ void ClearCache();
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using OnClearCb = std::function<void()>;
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const u32 MAX_BLOCKS = 0x40000;
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const u32 INVALID_BLOCK = 0xFFFFFFFF;
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constexpr u32 MAX_BLOCKS = 0x40000;
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constexpr u32 INVALID_BLOCK = 0xFFFFFFFF;
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template <typename T>
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struct BlockPtrCache {
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u32 addr;
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u32 addr_end;
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std::vector<void*> data;
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std::vector<T> data;
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};
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class CacheBase {
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public:
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struct functions {
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std::function<void(u32, u32)> code_load;
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std::function<void(u32, u32)> code_unload;
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std::function<void()> clear;
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} const cache_fns;
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protected:
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explicit CacheBase(bool index_mode, OnClearCb clearcb);
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explicit CacheBase(functions fns);
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~CacheBase();
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};
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template <typename T>
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class CacheCommon : CacheBase {
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protected:
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explicit CacheCommon(bool index_mode, OnClearCb clearcb) : index_mode(index_mode), CacheBase({
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[this](u32 start, u32 size) { this->OnCodeLoad(start, size); },
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[this](u32 start, u32 size) { this->OnCodeUnload(start, size); },
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[this]() { this->Clear(); }}) {
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static_assert(std::is_pointer<T>::value, "T must be a pointer");
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Clear();
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SetClearCallback(clearcb);
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}
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~CacheCommon() {}
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public:
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/// Called when the cache needs to reset or Clear() is called
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@ -48,34 +70,165 @@ public:
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}
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/// Clear and call clear callback
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void Clear();
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// returns true if block was found, false otherwise
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bool RemoveBlock(u32 pc);
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bool RemoveRange(u32 start, u32 end);
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void Clear() {
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if (OnClearCallback != nullptr) {
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OnClearCallback();
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}
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void OnCodeLoad(u32 address, u32 size);
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void OnCodeUnload(u32 address, u32 size);
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for (auto& cache : ptr_caches) {
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cache.data.assign(cache.data.size(), nullptr);
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}
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if (index_mode) {
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blocks_pc.assign(MAX_BLOCKS, INVALID_BLOCK);
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next_block = num_blocks = 0;
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}
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}
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/// Returns true if block was found, false otherwise
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bool RemoveBlock(u32 pc) {
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T* ptr = page_pointers[pc >> Memory::PAGE_BITS];
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if (ptr != nullptr) {
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ptr = &ptr[pc & Memory::PAGE_MASK];
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if (*ptr == nullptr) {
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return false;
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}
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if (index_mode) {
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const u32 id = pointer_to_index(*ptr);
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ASSERT(blocks_pc[id] == pc);
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blocks_pc[id] = INVALID_BLOCK;
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next_block = std::min(id, next_block);
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while (num_blocks > 0 && blocks_pc[num_blocks - 1] == INVALID_BLOCK) {
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--num_blocks;
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}
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}
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*ptr = nullptr;
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return true;
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}
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return false;
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}
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/// Returns true if at least one block was found, false otherwise
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bool RemoveRange(u32 start, u32 end) {
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bool result = false;
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for (auto& cache : ptr_caches) {
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for (u32 i = std::max(start, cache.addr); i < std::min(end, cache.addr_end); ++i) {
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T* ptr = &cache.data[i - cache.addr];
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if (*ptr == nullptr) {
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continue;
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}
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if (index_mode) {
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const u32 id = pointer_to_index(*ptr);
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ASSERT(blocks_pc[id] == i);
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blocks_pc[id] = INVALID_BLOCK;
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next_block = std::min(id, next_block);
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while (num_blocks > 0 && blocks_pc[num_blocks - 1] == INVALID_BLOCK) {
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--num_blocks;
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}
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}
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*ptr = nullptr;
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result = true;
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}
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}
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return result;
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}
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void OnCodeLoad(u32 address, u32 size) {
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// Check there is no overlapping
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ASSERT(std::none_of(ptr_caches.cbegin(), ptr_caches.cend(),
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[&](const auto& cache) {
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return (address < cache.addr_end) && (address + size > cache.addr);
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}));
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ASSERT((address & Memory::PAGE_MASK) == 0 && (size & Memory::PAGE_MASK) == 0);
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BlockPtrCache<T> cache{ address, address + size };
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cache.data.assign(size, nullptr);
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for (u32 i = address; i < address + size; i += Memory::PAGE_SIZE) {
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page_pointers[i >> Memory::PAGE_BITS] = &cache.data[i - address];
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}
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ptr_caches.emplace_back(std::move(cache));
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}
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void OnCodeUnload(u32 address, u32 size) {
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ptr_caches.erase(std::remove_if(ptr_caches.begin(), ptr_caches.end(),
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[&, this](const auto& cache) {
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if ((address < cache.addr_end) && (address + size > cache.addr)) {
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this->RemoveRange(cache.addr, cache.addr_end);
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for (u32 i = cache.addr; i < cache.addr_end; i += Memory::PAGE_SIZE) {
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page_pointers[i >> Memory::PAGE_BITS] = nullptr;
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}
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return true;
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}
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return false;
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}),
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ptr_caches.cend());
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}
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protected:
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void* GetPtr(u32 pc) const {
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void** ptr = page_pointers[pc >> Memory::PAGE_BITS];
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T GetPtr(u32 pc) const {
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T* ptr = page_pointers[pc >> Memory::PAGE_BITS];
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if (ptr != nullptr) {
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DEBUG_ASSERT(!index_mode || blocks_pc[pointer_to_id(ptr[pc & Memory::PAGE_MASK])] == pc);
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return ptr[pc & Memory::PAGE_MASK];
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const T value = ptr[pc & Memory::PAGE_MASK];
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DEBUG_ASSERT(!index_mode || value == nullptr || blocks_pc[pointer_to_index(ptr[pc & Memory::PAGE_MASK])] == pc);
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return value;
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}
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return nullptr;
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}
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void*& GetNewPtr(u32 pc);
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std::function<void*(u32)> id_to_pointer;
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std::function<u32(void*)> pointer_to_id;
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T* GetNewPtr(u32 pc) {
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DEBUG_ASSERT(!index_mode || next_block == MAX_BLOCKS || ((next_block < MAX_BLOCKS) && blocks_pc[next_block] == INVALID_BLOCK));
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DEBUG_ASSERT(GetPtr(pc) == nullptr);
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T* page_ptr = page_pointers[pc >> Memory::PAGE_BITS];
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if (page_ptr == nullptr) {
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// pc isnt within mapped code
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OnCodeLoad(pc & ~Memory::PAGE_MASK, Memory::PAGE_SIZE);
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page_ptr = page_pointers[pc >> Memory::PAGE_BITS];
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}
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T* block_ptr = &page_ptr[pc & Memory::PAGE_MASK];
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DEBUG_ASSERT(!index_mode || *block_ptr == nullptr);
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if (index_mode) {
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if (next_block == MAX_BLOCKS) {
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Clear();
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}
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blocks_pc[next_block] = pc;
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*block_ptr = index_to_pointer(next_block);
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do {
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++next_block;
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} while (next_block <= num_blocks && blocks_pc[next_block] != INVALID_BLOCK);
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if (next_block > num_blocks) {
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num_blocks++;
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}
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}
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return block_ptr;
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}
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std::function<T(u32)> index_to_pointer;
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std::function<u32(T)> pointer_to_index;
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private:
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bool index_mode;
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OnClearCb OnClearCallback = nullptr;
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const bool index_mode;
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std::vector<BlockPtrCache> ptr_caches;
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std::array<void**, (1 << (32 - Memory::PAGE_BITS))> page_pointers;
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std::vector<BlockPtrCache<T>> ptr_caches;
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std::array<T*, (1 << (32 - Memory::PAGE_BITS))> page_pointers = {};
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std::vector<u32> blocks_pc;
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u32 next_block = 0;
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@ -84,49 +237,52 @@ private:
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/// Use this if you only need to store a pointer
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template <typename T>
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class PtrCache final : public CacheBase {
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class PtrCache final : public CacheCommon<T> {
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public:
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explicit PtrCache(OnClearCb clearcb = nullptr) : CacheBase(false, clearcb) {
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static_assert(std::is_pointer<T>::value, "T must be a pointer");
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explicit PtrCache(OnClearCb clearcb = nullptr) : CacheCommon<T>(false, clearcb) {
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static_assert(std::is_pointer<T>::value, "T must be a pointer, use IndexedCache");
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}
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~PtrCache() {}
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/// Get cached pointer for PC
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T GetPtr(u32 pc) {
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return reinterpret_cast<T>(CacheBase::GetPtr(pc));
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return CacheCommon<T>::GetPtr(pc);
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}
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/// Get reference of pointer for PC
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T& GetNewPtr(u32 pc) {
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return reinterpret_cast<T&>(CacheBase::GetNewPtr(pc));
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/// Set pointer for PC to value
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T SetPtr(u32 pc, T value) {
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return (*CacheCommon<T>::GetNewPtr(pc) = value);
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}
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};
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/// Index based cache
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template <typename T>
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class Cache final : public CacheBase {
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class IndexedCache final : public CacheCommon<T*> {
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public:
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explicit Cache(OnClearCb clearcb = nullptr) : CacheBase(true, clearcb) {
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id_to_pointer = [this](u32 id) -> void* {
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explicit IndexedCache(OnClearCb clearcb = nullptr) : CacheCommon<T*>(true, clearcb) {
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static_assert(!std::is_pointer<T>::value, "T can't be a pointer, use PtrCache");
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CacheCommon<T*>::index_to_pointer = [this](u32 id) -> T* {
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return &blocks[id];
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};
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pointer_to_id = [this](void* ptr) -> u32 {
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return static_cast<u32>(std::distance(blocks.begin(),
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std::find_if(blocks.begin(), blocks.end(), [&](auto const& block) {
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return (reinterpret_cast<T*>(ptr) == &block) ? true : false;
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CacheCommon<T*>::pointer_to_index = [this](T* ptr) -> u32 {
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return static_cast<u32>(std::distance(blocks.cbegin(),
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std::find_if(blocks.cbegin(), blocks.cend(), [&](const T& block) {
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return (ptr == &block);
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})));
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};
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}
|
||||
~Cache() {}
|
||||
~IndexedCache() {}
|
||||
|
||||
/// Get block cached for PC
|
||||
T* GetBlock(u32 pc) {
|
||||
return reinterpret_cast<T*>(GetPtr(pc));
|
||||
return CacheCommon<T*>::GetPtr(pc);
|
||||
}
|
||||
|
||||
/// Allocate block for PC
|
||||
T& GetNewBlock(u32 pc) {
|
||||
return *reinterpret_cast<T*&>(GetNewPtr(pc));
|
||||
T* GetNewBlock(u32 pc) {
|
||||
return *CacheCommon<T*>::GetNewPtr(pc);
|
||||
}
|
||||
|
||||
private:
|
||||
|
|
|
|||
|
|
@ -1133,7 +1133,7 @@ struct pkh_inst {
|
|||
typedef arm_inst * ARM_INST_PTR;
|
||||
|
||||
#define CACHE_BUFFER_SIZE (64 * 1024 * 2000)
|
||||
static char inst_buf[CACHE_BUFFER_SIZE];
|
||||
static u8 inst_buf[CACHE_BUFFER_SIZE];
|
||||
static int top = 0;
|
||||
static inline void *AllocBuffer(unsigned int size) {
|
||||
int start = top;
|
||||
|
|
@ -3900,7 +3900,7 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
|
|||
// Find the cached instruction cream, otherwise translate it...
|
||||
ptr = instr_cache.GetPtr(cpu->Reg[15]);
|
||||
if (ptr == nullptr) {
|
||||
ptr = instr_cache.GetNewPtr(cpu->Reg[15]) = reinterpret_cast<u8*>(&inst_buf[top]);
|
||||
ptr = instr_cache.SetPtr(cpu->Reg[15], &inst_buf[top]);
|
||||
if (cpu->NumInstrsToExecute != 1) {
|
||||
if (InterpreterTranslateBlock(cpu, cpu->Reg[15]) == FETCH_EXCEPTION)
|
||||
goto END;
|
||||
|
|
|
|||
Loading…
Reference in a new issue