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558 commits

Author SHA1 Message Date
Weiyi Wang
64f6e5e597 ARM: pass MemorySystem separately in the constructor and make System optional 
So that unit test can test CPU without constructing the entire system. Also remove hacks in the System class
 2019-02-14 14:04:46 -05:00
Lioncash
306ce6416a
vfp_helper: Remove accidental use of the comma operator in vfp_single_unpack() 
Makes the line of code slightly easier to read properly.
 2019-01-22 18:30:34 -05:00
Weiyi Wang
e87dc17da2 Pass system into arm interpreter; fix tests 2018-12-05 20:21:14 -05:00
Weiyi Wang
323990d402 Memory: move Read/Write8/16/32/64 and ReadCString into class 2018-12-05 20:21:14 -05:00
Weiyi Wang
8c618c3fc3 Memory: move PageTable functions into class 2018-12-05 20:16:42 -05:00
bunnei
7f727177bf
Merge pull request #4431 from wwylele/no-v2p 
Memory: remove VirtualToPhysicalAddress
 2018-11-16 23:28:33 -08:00
Weiyi Wang
248106d972 Skyeye: unstub cp15 virtual to physical address 2018-11-13 11:24:46 -05:00
Weiyi Wang
c57ee36222 SVC: hide details in pimpl 2018-11-12 13:59:34 -05:00
Weiyi Wang
aec8b1e375 SVC: use context and generic templates 2018-11-12 13:59:34 -05:00
Weiyi Wang
9458e4d8ec CoreTiming: wrap into class 2018-11-04 10:26:38 -05:00
Weiyi Wang
0478bc3dee Kernel/Thread: move thread queue, current thread, and scheduling related function into the manager 
As we touched it, remove IPC::GetCommandBuffer
 2018-10-26 16:07:11 -04:00
MerryMage
b4d9d9661a arm_dynarmic: Pass breakpoints to gdbstub 
Allow gdbstub to handle execution breakpoints
 2018-09-30 19:40:49 +01:00
Weiyi Wang
7d8f115185 Prefix all size_t with std:: 
done automatically by executing regex replace `([^:0-9a-zA-Z_])size_t([^0-9a-zA-Z_])` -> `$1std::size_t$2`
 2018-09-06 16:03:28 -04:00
MerryMage
1817e30eff arm_dynarmic: Print current instruction when ExceptionRaised 2018-08-26 00:50:40 +01:00
MerryMage
75f3d2ba31 externals: Update dynarmic to 7a2a4c8 2018-08-26 00:50:38 +01:00
Jarek Syrylak
039fb95f80 More fixes as per PR feedback. 2018-08-16 19:44:31 +01:00
Jarek Syrylak
a6ecb3c913 Fixed as per PR feedback. 2018-08-16 16:24:16 +01:00
Jarek Syrylak
bd658a8801 GDB Modernization: 
- Can be used in either DynCom or Dynarmic mode
- Added support for threads
- Proper support for FPU registers
- Fix for NibbleToHex conversion that used to produce false error codes
- Fix for clang-format failing under Windows
 2018-08-16 10:40:52 +01:00
BreadFish64
74cd98ecad core: clean up warnings 2018-08-01 14:10:23 -05:00
wwylele
0eab948728 reformat all files with clang-format 2018-06-29 16:56:12 +03:00
wwylele
7c5a76e58b log: replace all NGLOG with LOG 2018-06-29 14:18:07 +03:00
MerryMage
b8c5007153 arm_dyncom_interpreter: Clear exclusive memory state after SVC call 2018-06-03 21:06:57 +01:00
Daniel Lim Wee Soong
7861be67bb core/arm/skyeye_common: Migrate logging macros (#3684) 
* core/arm/skyeye_common: Migrate logging macros

Use the new logging macros NGLOG

* Replace specifiers that were missed out

* Replace printf with NGLOG

* skyeye_common: fix NGLOG without log class
 2018-05-14 11:22:32 +03:00
Daniel Lim Wee Soong
1e4eb7def8 arm/dyncom: Migrate logging macros 2018-04-02 16:01:19 +08:00
James Rowe
f61141e86a Update the entire application to use the new clang format style 2018-03-09 10:54:43 -07:00
MerryMage
fb2d34997e core/arm: Backend-specific context implementations 2017-12-12 19:12:03 +00:00
MerryMage
7d5c3b00a8 dynarmic: Update to d1d4705 2017-12-12 19:08:53 +00:00
Yuri Kunde Schlesner
21188f5683 HLE: Move SVC handlers to the Kernel namespace 2017-12-09 20:32:58 -08:00
Yuri Kunde Schlesner
ad71e23f23 HLE: Move svc.{cpp,h} to kernel/ 2017-12-09 18:10:47 -08:00
Lioncash
088c8521bf dyncom: Remove unnecessary includes 2017-12-07 00:02:55 -05:00
bunnei
1f36472fff
Merge pull request #3229 from lioncash/decode 
arm_dyncom_dec: Hide the decoding table from external view
 2017-12-06 22:46:01 -05:00
bunnei
77493860ca
Merge pull request #3228 from lioncash/explicit 
arm: Make CPU backend constructors explicit
 2017-12-06 22:44:39 -05:00
bunnei
d8ba07a430
Merge pull request #3227 from MerryMage/cro 
Allow for partial invalidation of instruction cache
 2017-12-06 22:43:58 -05:00
Lioncash
ab857f5e45 arm_dyncom_dec: Hide the decoding table from external view 
This isn't used externally anywhere (and really shouldn't be).
 2017-12-06 20:55:52 -05:00
Lioncash
982039be95 arm_dynarmic_cp15: Add missing header guard 2017-12-06 19:51:46 -05:00
Lioncash
e960628a14 arm: Make CPU backend constructors explicit 
Avoids implicit conversions
 2017-12-06 19:37:56 -05:00
MerryMage
647e553f64 ARM_Interface: Allow for partial invalidation of instruction cache 2017-12-06 20:57:55 +00:00
bunnei
e165b5bb94
Merge pull request #3184 from MerryMage/timing 
core/arm: Improve timing accuracy before service calls in JIT
 2017-12-05 23:12:24 -05:00
Lioncash
8599b1e7cc dyncom: Convert the SPSR checking define to a function 
Same thing, with less indirection hiding
 2017-12-05 20:07:45 -05:00
MerryMage
f6dfdc3588 core/arm: Improve timing accuracy before service calls in CPU interpreter 2017-12-03 16:40:21 +00:00
MerryMage
7cd8b437aa core/arm: Improve timing accuracy before service calls in JIT 
We also correct the CPU JIT's implementation of Step.
 2017-12-03 16:06:46 +00:00
MerryMage
b37a850654 dyncom: Remove VFP_REG_ZERO 
Fixes two issues that will never happen:

1. There are cases when VFP_REG_ZERO will be non-zero, but these will
   never be encoutered in well behaved guest code (i.e. writing to D16).

2. If CONFIG_VFPv3 is defined, accessing VFP_REG_ZERO would be out of
   bounds.
 2017-12-02 12:06:51 +00:00
MerryMage
2d917f8ca0 arm_dynarmic: ClearInstructionCache should clear all instruction caches 
Bugfix of 67a70bd.
 2017-11-19 14:47:14 +00:00
Huw Pascoe
529f4a0131 Moved down_count to CoreTiming 2017-09-30 17:38:14 +01:00
MerryMage
67a70bd9e1 ARM_Interface: Implement PageTableChanged 2017-09-24 23:08:25 +01:00
B3n30
813837c5cf Merge pull request #2842 from Subv/switchable_page_table 
Kernel/Memory: Give each process its own page table and allow switching the current page table upon reschedule
 2017-09-15 22:41:45 +02:00
Subv
7a3ab7c63d CPU/Dynarmic: Disable the fast page-table access in dynarmic until it supports switching page tables at runtime. 2017-09-15 14:26:22 -05:00
Subv
d237a89048 CPU/Dynarmic: Fixed a warning when incrementing the number of ticks in ExecuteInstructions. 2017-08-21 08:34:25 -05:00
Subv
9d0841b48b Dyncom: Use size_t instead of int to store the instruction offsets in the instruction cache. 
Fixes a few warnings.
 2017-08-21 08:34:23 -05:00
Subv
d3fb1d6c38 Dyncom: Fixed a conversion warning when decoding thumb instructions. 2017-08-21 08:20:36 -05:00