Commit graph

8 commits

Author SHA1 Message Date
liushuyu c6153bb32e
CI: fix recent build issues (#6148)
Co-authored-by: Vitor K <vitor-kiguchi@hotmail.com>
2022-10-05 18:43:07 +02:00
James Rowe 30dfe1fcb8 Use the correct register length for index_array
The index_array can't possible be 31 bits long as that would index
out of bounds memory. According to 3dbrew, this should be 28
2019-12-13 18:08:07 -07:00
wwylele 68b0a3e19e regs_pipeline: use proper unsigned type where applicable 2018-05-06 15:57:48 +03:00
wwylele db309b2423 pica/regs: layout geometry shader configuration regs
All the register meanings are derived from ctrulib (3dbrew is outdated for most of them)
2017-08-10 01:53:08 +03:00
wwylele baa24f4ea9 pica: upload shared shader code to both unit 2017-08-07 10:30:05 +03:00
wwylele 86ee1f6101 pica: correct bit field length for some registers 2017-05-16 19:24:06 +03:00
Yuri Kunde Schlesner 553e672777 VideoCore: Split u64 Pica reg unions into 2 separate u32 unions
This eliminates UB when aliasing it with the array of u32 regs, and
is compatible with non-LE architectures.
2017-02-09 00:04:25 -08:00
Yuri Kunde Schlesner 8fca90b5d5 VideoCore: Split geometry pipeline regs from Regs struct 2017-02-04 13:59:11 -08:00