Commit graph

272 commits

Author SHA1 Message Date
Dimitri A
acaca4188e gdbstub: Fix some bugs in IsMemoryBreak() and ServeBreak. Add workaround to let watchpoints break into GDB. (#4651)
* gdbstub: fix IsMemoryBreak() returning false while connected to client

As a result, the only existing codepath for a memory watchpoint hit to break into GDB (InterpeterMainLoop, GDB_BP_CHECK, ARMul_State::RecordBreak) is finally taken,
which exposes incorrect logic* in both RecordBreak and ServeBreak.

* a blank BreakpointAddress structure is passed, which sets r15 (PC) to NULL

* gdbstub: DynCom: default-initialize two members/vars used in conditionals

* gdbstub: DynCom: don't record memory watchpoint hits via RecordBreak()

For now, instead check for GDBStub::IsMemoryBreak() in InterpreterMainLoop and ServeBreak.

Fixes PC being set to a stale/unhit breakpoint address (often zero) when a memory watchpoint (rwatch, watch, awatch) is handled in ServeBreak() and generates a GDB trap.

Reasons for removing a call to RecordBreak() for memory watchpoints:
* The``breakpoint_data`` we pass is typed Execute or None. It describes the predicted next code breakpoint hit relative to PC;

* GDBStub::IsMemoryBreak() returns true if a recent Read/Write operation hit a watchpoint. It doesn't specify which in return, nor does it trace it anywhere. Thus, the only data we could give RecordBreak() is a placeholder BreakpointAddress at offset NULL and type Access. I found the idea silly, compared to simply relying on GDBStub::IsMemoryBreak().

There is currently no measure in the code that remembers the addresses (and types) of any watchpoints that were hit by an instruction, in order to send them to GDB as "extended stop information."
I'm considering an implementation for this.

* gdbstub: Change an ASSERT to DEBUG_ASSERT

I have never seen the (Reg[15] == last_bkpt.address) assert fail in practice, even after several weeks of (locally) developping various branches around GDB.  Only leave it inside Debug builds.
2019-03-08 00:09:06 -05:00
Weiyi Wang
64f6e5e597 ARM: pass MemorySystem separately in the constructor and make System optional
So that unit test can test CPU without constructing the entire system. Also remove hacks in the System class
2019-02-14 14:04:46 -05:00
Weiyi Wang
e87dc17da2 Pass system into arm interpreter; fix tests 2018-12-05 20:21:14 -05:00
Weiyi Wang
323990d402 Memory: move Read/Write8/16/32/64 and ReadCString into class 2018-12-05 20:21:14 -05:00
Weiyi Wang
c57ee36222 SVC: hide details in pimpl 2018-11-12 13:59:34 -05:00
Weiyi Wang
aec8b1e375 SVC: use context and generic templates 2018-11-12 13:59:34 -05:00
Weiyi Wang
9458e4d8ec CoreTiming: wrap into class 2018-11-04 10:26:38 -05:00
Weiyi Wang
7d8f115185 Prefix all size_t with std::
done automatically by executing regex replace `([^:0-9a-zA-Z_])size_t([^0-9a-zA-Z_])` -> `$1std::size_t$2`
2018-09-06 16:03:28 -04:00
Jarek Syrylak
039fb95f80 More fixes as per PR feedback. 2018-08-16 19:44:31 +01:00
Jarek Syrylak
bd658a8801 GDB Modernization:
- Can be used in either DynCom or Dynarmic mode
- Added support for threads
- Proper support for FPU registers
- Fix for NibbleToHex conversion that used to produce false error codes
- Fix for clang-format failing under Windows
2018-08-16 10:40:52 +01:00
BreadFish64
74cd98ecad core: clean up warnings 2018-08-01 14:10:23 -05:00
wwylele
0eab948728 reformat all files with clang-format 2018-06-29 16:56:12 +03:00
wwylele
7c5a76e58b log: replace all NGLOG with LOG 2018-06-29 14:18:07 +03:00
MerryMage
b8c5007153 arm_dyncom_interpreter: Clear exclusive memory state after SVC call 2018-06-03 21:06:57 +01:00
Daniel Lim Wee Soong
1e4eb7def8 arm/dyncom: Migrate logging macros 2018-04-02 16:01:19 +08:00
James Rowe
f61141e86a Update the entire application to use the new clang format style 2018-03-09 10:54:43 -07:00
MerryMage
fb2d34997e core/arm: Backend-specific context implementations 2017-12-12 19:12:03 +00:00
Yuri Kunde Schlesner
21188f5683 HLE: Move SVC handlers to the Kernel namespace 2017-12-09 20:32:58 -08:00
Yuri Kunde Schlesner
ad71e23f23 HLE: Move svc.{cpp,h} to kernel/ 2017-12-09 18:10:47 -08:00
Lioncash
088c8521bf dyncom: Remove unnecessary includes 2017-12-07 00:02:55 -05:00
bunnei
1f36472fff
Merge pull request #3229 from lioncash/decode
arm_dyncom_dec: Hide the decoding table from external view
2017-12-06 22:46:01 -05:00
bunnei
77493860ca
Merge pull request #3228 from lioncash/explicit
arm: Make CPU backend constructors explicit
2017-12-06 22:44:39 -05:00
Lioncash
ab857f5e45 arm_dyncom_dec: Hide the decoding table from external view
This isn't used externally anywhere (and really shouldn't be).
2017-12-06 20:55:52 -05:00
Lioncash
e960628a14 arm: Make CPU backend constructors explicit
Avoids implicit conversions
2017-12-06 19:37:56 -05:00
MerryMage
647e553f64 ARM_Interface: Allow for partial invalidation of instruction cache 2017-12-06 20:57:55 +00:00
bunnei
e165b5bb94
Merge pull request #3184 from MerryMage/timing
core/arm: Improve timing accuracy before service calls in JIT
2017-12-05 23:12:24 -05:00
Lioncash
8599b1e7cc dyncom: Convert the SPSR checking define to a function
Same thing, with less indirection hiding
2017-12-05 20:07:45 -05:00
MerryMage
f6dfdc3588 core/arm: Improve timing accuracy before service calls in CPU interpreter 2017-12-03 16:40:21 +00:00
MerryMage
7cd8b437aa core/arm: Improve timing accuracy before service calls in JIT
We also correct the CPU JIT's implementation of Step.
2017-12-03 16:06:46 +00:00
Huw Pascoe
529f4a0131 Moved down_count to CoreTiming 2017-09-30 17:38:14 +01:00
MerryMage
67a70bd9e1 ARM_Interface: Implement PageTableChanged 2017-09-24 23:08:25 +01:00
Subv
9d0841b48b Dyncom: Use size_t instead of int to store the instruction offsets in the instruction cache.
Fixes a few warnings.
2017-08-21 08:34:23 -05:00
Subv
d3fb1d6c38 Dyncom: Fixed a conversion warning when decoding thumb instructions. 2017-08-21 08:20:36 -05:00
Yuri Kunde Schlesner
d97b977540 Dyncom: Remove disassembler code
Had licensing issue around it, in addition to several bugs.

Closes #1632, #1280
2017-05-07 15:33:46 -07:00
Yuri Kunde Schlesner
f0a582b218 Dyncom: Tweak types and log formatting 2017-05-07 15:33:42 -07:00
MerryMage
b125388152 dyncom: Correct SXTAB16 and SXTB16 2017-02-18 20:04:54 +00:00
bunnei
8b1e269e58 ThreadContext: Move from "core" to "arm_interface". 2016-12-22 00:27:49 -05:00
Lioncash
ba20dd9b61 gdbstub: Remove global variable from public interface
Currently, this is only ever queried, so adding a function to check if the
server is enabled is more sensible.

If directly modifying this externally is ever desirable, it should be done
by adding a function to the interface, rather than exposing implementation
details directly.
2016-12-15 16:37:22 -05:00
Lioncash
2f3c1bdfb4 core: Add missing #pragma once directives where applicable 2016-12-15 15:40:51 -05:00
Yuri Kunde Schlesner
84fbbe2629 Use negative priorities to avoid special-casing the self-include 2016-09-21 00:15:56 -07:00
Emmanuel Gil Peyrot
ebdae19fd2 Remove empty newlines in #include blocks.
This makes clang-format useful on those.

Also add a bunch of forgotten transitive includes, which otherwise
prevented compilation.
2016-09-21 11:15:47 +09:00
Yuri Kunde Schlesner
396a8d91a4 Manually tweak source formatting and then re-run clang-format 2016-09-18 21:14:25 -07:00
Emmanuel Gil Peyrot
dc8479928c Sources: Run clang-format on everything. 2016-09-18 09:38:01 +09:00
Emmanuel Gil Peyrot
bfc454e951 Dyncom: Disable clang-format on the decoding table. 2016-09-18 09:36:57 +09:00
bunnei
05e120a4cc arm: ResetContext shouldn't be part of ARM_Interface. 2016-09-15 17:49:30 -04:00
bunnei
85861d44b7 arm_dynarmic/arm_dyncom: Remove unnecessary "virtual" keyword. 2016-09-15 17:49:30 -04:00
bunnei
b7aef81cb4 dyncom: Use VFP_FPSCR/VFP_FPEXC. 2016-09-15 17:49:29 -04:00
wwylele
2161f52661 ARM: add ClearInstructionCache function 2016-08-27 21:38:06 +08:00
MerryMage
15b2eec4bd dyncom: Read-after-write in SMLA
In the case when RD === RN, RD was updated before AddOverflow was called
to check for an overflow, resulting in an incorrect state of the Q flag.
2016-08-22 15:13:33 +01:00
MerryMage
50407a8dc8 Dyncom: Correct implementation of STM for R15 2016-08-14 00:49:34 +01:00