53a22b84da
Fixed typo (make protected member public) Added license header back in. I originally removed this because I mostly rewrote the file, but meh ARM: Fixed a type error in dyncom interpreter. ARM: Updated dyncom to use unique_ptr for internal ARM state.
155 lines
4.4 KiB
C
155 lines
4.4 KiB
C
/* Copyright (C)
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* 2012 - Michael.Kang blackfin.kang@gmail.com
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*
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*/
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/**
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* @file arm_dyncom_dec.h
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* @brief Some common utility for arm instruction decoder
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* @author Michael.Kang blackfin.kang@gmail.com
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* @version 7849
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* @date 2012-03-15
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*/
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#ifndef __ARM_DYNCOM_DEC__
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#define __ARM_DYNCOM_DEC__
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#define BITS(a,b) ((instr >> (a)) & ((1 << (1+(b)-(a)))-1))
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#define BIT(n) ((instr >> (n)) & 1)
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#define BAD do{printf("meet BAD at %s, instr is %x\n", __FUNCTION__, instr ); /*exit(0);*/}while(0);
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#define ptr_N cpu->ptr_N
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#define ptr_Z cpu->ptr_Z
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#define ptr_C cpu->ptr_C
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#define ptr_V cpu->ptr_V
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#define ptr_I cpu->ptr_I
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#define ptr_T cpu->ptr_T
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#define ptr_CPSR cpu->ptr_gpr[16]
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/* for MUL instructions */
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/*xxxx xxxx xxxx 1111 xxxx xxxx xxxx xxxx */
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#define RDHi ((instr >> 16) & 0xF)
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/*xxxx xxxx xxxx xxxx 1111 xxxx xxxx xxxx */
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#define RDLo ((instr >> 12) & 0xF)
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/*xxxx xxxx xxxx 1111 xxxx xxxx xxxx xxxx */
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#define MUL_RD ((instr >> 16) & 0xF)
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/*xxxx xxxx xxxx xxxx 1111 xxxx xxxx xxxx */
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#define MUL_RN ((instr >> 12) & 0xF)
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/*xxxx xxxx xxxx xxxx xxxx 1111 xxxx xxxx */
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#define RS ((instr >> 8) & 0xF)
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/*xxxx xxxx xxxx xxxx 1111 xxxx xxxx xxxx */
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#define RD ((instr >> 12) & 0xF)
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/*xxxx xxxx xxxx 1111 xxxx xxxx xxxx xxxx */
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#define RN ((instr >> 16) & 0xF)
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/*xxxx xxxx xxxx xxxx xxxx xxxx xxxx 1111 */
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#define RM (instr & 0xF)
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#define BIT(n) ((instr >> (n)) & 1)
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#define BITS(a,b) ((instr >> (a)) & ((1 << (1+(b)-(a)))-1))
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/* CP15 registers */
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#define OPCODE_1 BITS(21, 23)
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#define CRn BITS(16, 19)
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#define CRm BITS(0, 3)
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#define OPCODE_2 BITS(5, 7)
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/*xxxx xx1x xxxx xxxx xxxx xxxx xxxx xxxx */
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#define I BIT(25)
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/*xxxx xxxx xxx1 xxxx xxxx xxxx xxxx xxxx */
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#define S BIT(20)
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#define SHIFT BITS(5,6)
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#define SHIFT_IMM BITS(7,11)
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#define IMMH BITS(8,11)
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#define IMML BITS(0,3)
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#define LSPBIT BIT(24)
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#define LSUBIT BIT(23)
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#define LSBBIT BIT(22)
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#define LSWBIT BIT(21)
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#define LSLBIT BIT(20)
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#define LSSHBITS BITS(5,6)
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#define OFFSET12 BITS(0,11)
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#define SBIT BIT(20)
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#define DESTReg (BITS (12, 15))
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/* they are in unused state, give a corrent value when using */
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#define IS_V5E 0
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#define IS_V5 0
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#define IS_V6 0
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#define LHSReg 0
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/* temp define the using the pc reg need implement a flow */
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#define STORE_CHECK_RD_PC ADD(R(RD), CONST(INSTR_SIZE * 2))
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#define OPERAND operand(cpu,instr,bb,NULL)
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#define SCO_OPERAND(sco) operand(cpu,instr,bb,sco)
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#define BOPERAND boperand(instr)
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#define CHECK_RN_PC (RN==15? ADD(AND(R(RN), CONST(~0x1)), CONST(INSTR_SIZE * 2)):R(RN))
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#define CHECK_RN_PC_WA (RN==15? ADD(AND(R(RN), CONST(~0x3)), CONST(INSTR_SIZE * 2)):R(RN))
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#define GET_USER_MODE() (OR(ICMP_EQ(R(MODE_REG), CONST(USER32MODE)), ICMP_EQ(R(MODE_REG), CONST(SYSTEM32MODE))))
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int decode_arm_instr(uint32_t instr, int32_t *idx);
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enum DECODE_STATUS {
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DECODE_SUCCESS,
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DECODE_FAILURE
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};
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struct instruction_set_encoding_item {
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const char *name;
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int attribute_value;
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int version;
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u32 content[21];
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};
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typedef struct instruction_set_encoding_item ISEITEM;
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#define RECORD_WB(value, flag) {cpu->dyncom_engine->wb_value = value;cpu->dyncom_engine->wb_flag = flag;}
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#define INIT_WB(wb_value, wb_flag) RECORD_WB(wb_value, wb_flag)
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#define EXECUTE_WB(base_reg) {if(cpu->dyncom_engine->wb_flag) \
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LET(base_reg, cpu->dyncom_engine->wb_value);}
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inline int get_reg_count(uint32_t instr){
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int i = BITS(0,15);
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int count = 0;
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while(i){
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if(i & 1)
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count ++;
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i = i >> 1;
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}
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return count;
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}
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enum ARMVER {
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INVALID = 0,
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ARMALL,
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ARMV4,
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ARMV4T,
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ARMV5T,
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ARMV5TE,
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ARMV5TEJ,
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ARMV6,
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ARM1176JZF_S,
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ARMVFP2,
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ARMVFP3
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};
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//extern const INSTRACT arm_instruction_action[];
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extern const ISEITEM arm_instruction[];
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#endif
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