155 lines
3.8 KiB
C++
155 lines
3.8 KiB
C++
// Copyright 2017 Citra Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#pragma once
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#include <array>
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#include "common/bit_field.h"
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#include "common/common_funcs.h"
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#include "common/math_util.h"
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#include "common/vector_math.h"
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#include "video_core/pica_types.h"
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namespace Pica {
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struct RasterizerRegs {
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enum class CullMode : u32 {
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// Select which polygons are considered to be "frontfacing".
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KeepAll = 0,
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KeepClockWise = 1,
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KeepCounterClockWise = 2,
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// TODO: What does the third value imply?
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};
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union {
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BitField<0, 2, CullMode> cull_mode;
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};
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BitField<0, 24, u32> viewport_size_x;
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INSERT_PADDING_WORDS(0x1);
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BitField<0, 24, u32> viewport_size_y;
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INSERT_PADDING_WORDS(0x3);
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BitField<0, 1, u32> clip_enable;
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BitField<0, 24, u32> clip_coef[4]; // float24
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Common::Vec4<f24> GetClipCoef() const {
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return {f24::FromRaw(clip_coef[0]), f24::FromRaw(clip_coef[1]), f24::FromRaw(clip_coef[2]),
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f24::FromRaw(clip_coef[3])};
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}
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Common::Rectangle<s32> GetViewportRect() const {
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return {
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// These registers hold half-width and half-height, so must be multiplied by 2
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viewport_corner.x, // left
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viewport_corner.y + // top
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static_cast<s32>(f24::FromRaw(viewport_size_y).ToFloat32() * 2),
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viewport_corner.x + // right
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static_cast<s32>(f24::FromRaw(viewport_size_x).ToFloat32() * 2),
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viewport_corner.y // bottom
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};
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}
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INSERT_PADDING_WORDS(0x1);
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BitField<0, 24, u32> viewport_depth_range; // float24
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BitField<0, 24, u32> viewport_depth_near_plane; // float24
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BitField<0, 3, u32> vs_output_total;
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union VSOutputAttributes {
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// Maps components of output vertex attributes to semantics
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enum Semantic : u32 {
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POSITION_X = 0,
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POSITION_Y = 1,
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POSITION_Z = 2,
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POSITION_W = 3,
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QUATERNION_X = 4,
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QUATERNION_Y = 5,
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QUATERNION_Z = 6,
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QUATERNION_W = 7,
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COLOR_R = 8,
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COLOR_G = 9,
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COLOR_B = 10,
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COLOR_A = 11,
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TEXCOORD0_U = 12,
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TEXCOORD0_V = 13,
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TEXCOORD1_U = 14,
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TEXCOORD1_V = 15,
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TEXCOORD0_W = 16,
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VIEW_X = 18,
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VIEW_Y = 19,
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VIEW_Z = 20,
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TEXCOORD2_U = 22,
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TEXCOORD2_V = 23,
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INVALID = 31,
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};
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BitField<0, 5, Semantic> map_x;
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BitField<8, 5, Semantic> map_y;
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BitField<16, 5, Semantic> map_z;
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BitField<24, 5, Semantic> map_w;
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u32 raw;
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} vs_output_attributes[7];
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INSERT_PADDING_WORDS(0xe);
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enum class ScissorMode : u32 {
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Disabled = 0,
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Exclude = 1, // Exclude pixels inside the scissor box
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Include = 3 // Exclude pixels outside the scissor box
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};
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struct {
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BitField<0, 2, ScissorMode> mode;
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union {
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BitField<0, 10, u32> x1;
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BitField<16, 10, u32> y1;
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};
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union {
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BitField<0, 10, u32> x2;
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BitField<16, 10, u32> y2;
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};
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} scissor_test;
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union {
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BitField<0, 10, s32> x;
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BitField<16, 10, s32> y;
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} viewport_corner;
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INSERT_PADDING_WORDS(0x1);
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// TODO: early depth
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INSERT_PADDING_WORDS(0x1);
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INSERT_PADDING_WORDS(0x2);
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enum DepthBuffering : u32 {
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WBuffering = 0,
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ZBuffering = 1,
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};
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BitField<0, 1, DepthBuffering> depthmap_enable;
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INSERT_PADDING_WORDS(0x12);
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};
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static_assert(sizeof(RasterizerRegs) == 0x40 * sizeof(u32),
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"RasterizerRegs struct has incorrect size");
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} // namespace Pica
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