112 lines
3.1 KiB
C++
112 lines
3.1 KiB
C++
// Copyright 2017 Citra Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#pragma once
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#include <array>
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#include "common/bit_field.h"
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#include "common/common_funcs.h"
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#include "common/common_types.h"
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namespace Pica {
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struct ShaderRegs {
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BitField<0, 16, u32> bool_uniforms;
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union {
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BitField<0, 8, u32> x;
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BitField<8, 8, u32> y;
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BitField<16, 8, u32> z;
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BitField<24, 8, u32> w;
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} int_uniforms[4];
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INSERT_PADDING_WORDS(0x4);
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enum ShaderMode {
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GS = 0x08,
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VS = 0xA0,
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};
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union {
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// Number of input attributes to shader unit - 1
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BitField<0, 4, u32> max_input_attribute_index;
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BitField<8, 8, u32> input_to_uniform;
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BitField<24, 8, ShaderMode> shader_mode;
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};
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// Offset to shader program entry point (in words)
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BitField<0, 16, u32> main_offset;
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/// Maps input attributes to registers. 4-bits per attribute, specifying a register index
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u32 input_attribute_to_register_map_low;
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u32 input_attribute_to_register_map_high;
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u32 GetRegisterForAttribute(std::size_t attribute_index) const {
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const u64 map = (static_cast<u64>(input_attribute_to_register_map_high) << 32) |
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static_cast<u64>(input_attribute_to_register_map_low);
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return static_cast<u32>((map >> (attribute_index * 4)) & 0b1111);
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}
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BitField<0, 16, u32> output_mask;
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// 0x28E, CODETRANSFER_END
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INSERT_PADDING_WORDS(0x2);
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struct {
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enum Format : u32 {
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FLOAT24 = 0,
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FLOAT32 = 1,
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};
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bool IsFloat32() const {
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return format == FLOAT32;
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}
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union {
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// Index of the next uniform to write to
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// TODO: ctrulib uses 8 bits for this, however that seems to yield lots of invalid
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// indices
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// TODO: Maybe the uppermost index is for the geometry shader? Investigate!
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BitField<0, 7, u32> index;
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BitField<31, 1, Format> format;
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};
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// Writing to these registers sets the current uniform.
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u32 set_value[8];
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} uniform_setup;
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INSERT_PADDING_WORDS(0x2);
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struct {
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// Offset of the next instruction to write code to.
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// Incremented with each instruction write.
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u32 offset;
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// Writing to these registers sets the "current" word in the shader program.
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u32 set_word[8];
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} program;
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INSERT_PADDING_WORDS(0x1);
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// This register group is used to load an internal table of swizzling patterns,
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// which are indexed by each shader instruction to specify vector component swizzling.
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struct {
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// Offset of the next swizzle pattern to write code to.
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// Incremented with each instruction write.
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u32 offset;
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// Writing to these registers sets the current swizzle pattern in the table.
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u32 set_word[8];
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} swizzle_patterns;
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INSERT_PADDING_WORDS(0x2);
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};
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static_assert(sizeof(ShaderRegs) == 0x30 * sizeof(u32), "ShaderRegs struct has incorrect size");
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} // namespace Pica
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