From 27314341d79719a7b4b5a43c203cf6da20fc32b2 Mon Sep 17 00:00:00 2001 From: pineappleEA Date: Tue, 13 Jun 2023 20:28:57 +0200 Subject: [PATCH] early-access version 3670 --- README.md | 2 +- externals/CMakeLists.txt | 3 +- src/core/CMakeLists.txt | 9 +- src/core/arm/arm_interface.cpp | 84 +++++++-- src/core/arm/arm_interface.h | 37 ++-- src/core/arm/dynarmic/arm_dynarmic.h | 29 ++++ src/core/arm/dynarmic/arm_dynarmic_32.cpp | 64 ++----- src/core/arm/dynarmic/arm_dynarmic_32.h | 16 +- src/core/arm/dynarmic/arm_dynarmic_64.cpp | 64 ++----- src/core/arm/dynarmic/arm_dynarmic_64.h | 18 +- src/core/arm/dynarmic/dynarmic_cp15.cpp | 161 ++++++++++++++++++ src/core/arm/dynarmic/dynarmic_cp15.h | 42 +++++ .../dynarmic/dynarmic_exclusive_monitor.cpp | 73 ++++++++ .../arm/dynarmic/dynarmic_exclusive_monitor.h | 44 +++++ src/core/arm/exclusive_monitor.cpp | 2 +- src/core/core.cpp | 26 +-- src/core/core.h | 8 +- 17 files changed, 510 insertions(+), 172 deletions(-) create mode 100755 src/core/arm/dynarmic/arm_dynarmic.h create mode 100755 src/core/arm/dynarmic/dynarmic_cp15.cpp create mode 100755 src/core/arm/dynarmic/dynarmic_cp15.h create mode 100755 src/core/arm/dynarmic/dynarmic_exclusive_monitor.cpp create mode 100755 src/core/arm/dynarmic/dynarmic_exclusive_monitor.h diff --git a/README.md b/README.md index 4b9b13897..e207704e3 100755 --- a/README.md +++ b/README.md @@ -1,7 +1,7 @@ yuzu emulator early access ============= -This is the source code for early-access 3669. +This is the source code for early-access 3670. ## Legal Notice diff --git a/externals/CMakeLists.txt b/externals/CMakeLists.txt index 964e8e31b..8d8c4e3b9 100755 --- a/externals/CMakeLists.txt +++ b/externals/CMakeLists.txt @@ -63,8 +63,9 @@ if (YUZU_USE_EXTERNAL_SDL2) # Yuzu itself needs: Atomic Audio Events Joystick Haptic Sensor Threads Timers # Since 2.0.18 Atomic+Threads required for HIDAPI/libusb (see https://github.com/libsdl-org/SDL/issues/5095) # Yuzu-cmd also needs: Video (depends on Loadso/Dlopen) + # CPUinfo also required for SDL Audio, at least until 2.28.0 (see https://github.com/libsdl-org/SDL/issues/7809) set(SDL_UNUSED_SUBSYSTEMS - CPUinfo File Filesystem + File Filesystem Locale Power Render) foreach(_SUB ${SDL_UNUSED_SUBSYSTEMS}) string(TOUPPER ${_SUB} _OPT) diff --git a/src/core/CMakeLists.txt b/src/core/CMakeLists.txt index 5dfa72e2c..b154ba87d 100755 --- a/src/core/CMakeLists.txt +++ b/src/core/CMakeLists.txt @@ -4,8 +4,6 @@ add_library(core STATIC arm/arm_interface.h arm/arm_interface.cpp - arm/dynarmic/arm_exclusive_monitor.cpp - arm/dynarmic/arm_exclusive_monitor.h arm/exclusive_monitor.cpp arm/exclusive_monitor.h arm/symbols.cpp @@ -848,12 +846,15 @@ endif() if (ARCHITECTURE_x86_64 OR ARCHITECTURE_arm64) target_sources(core PRIVATE + arm/dynarmic/arm_dynarmic.h arm/dynarmic/arm_dynarmic_64.cpp arm/dynarmic/arm_dynarmic_64.h arm/dynarmic/arm_dynarmic_32.cpp arm/dynarmic/arm_dynarmic_32.h - arm/dynarmic/arm_dynarmic_cp15.cpp - arm/dynarmic/arm_dynarmic_cp15.h + arm/dynarmic/dynarmic_cp15.cpp + arm/dynarmic/dynarmic_cp15.h + arm/dynarmic/dynarmic_exclusive_monitor.cpp + arm/dynarmic/dynarmic_exclusive_monitor.h hle/service/jit/jit_context.cpp hle/service/jit/jit_context.h hle/service/jit/jit.cpp diff --git a/src/core/arm/arm_interface.cpp b/src/core/arm/arm_interface.cpp index 4b082f918..0ae0b618c 100755 --- a/src/core/arm/arm_interface.cpp +++ b/src/core/arm/arm_interface.cpp @@ -13,25 +13,68 @@ #include "core/core.h" #include "core/debugger/debugger.h" #include "core/hle/kernel/k_process.h" +#include "core/hle/kernel/k_thread.h" #include "core/hle/kernel/svc.h" #include "core/loader/loader.h" #include "core/memory.h" -#include "core/arm/dynarmic/arm_dynarmic_32.h" -#include "core/arm/dynarmic/arm_dynarmic_64.h" - namespace Core { constexpr u64 SEGMENT_BASE = 0x7100000000ull; std::vector ARM_Interface::GetBacktraceFromContext( Core::System& system, const ARM_Interface::ThreadContext32& ctx) { - return ARM_Dynarmic_32::GetBacktraceFromContext(system, ctx); + std::vector out; + auto& memory = system.ApplicationMemory(); + + const auto& reg = ctx.cpu_registers; + u32 pc = reg[15], lr = reg[14], fp = reg[11]; + out.push_back({"", 0, pc, 0, ""}); + + // fp (= r11) points to the last frame record. + // Frame records are two words long: + // fp+0 : pointer to previous frame record + // fp+4 : value of lr for frame + for (size_t i = 0; i < 256; i++) { + out.push_back({"", 0, lr, 0, ""}); + if (!fp || (fp % 4 != 0) || !memory.IsValidVirtualAddressRange(fp, 8)) { + break; + } + lr = memory.Read32(fp + 4); + fp = memory.Read32(fp); + } + + SymbolicateBacktrace(system, out); + + return out; } std::vector ARM_Interface::GetBacktraceFromContext( Core::System& system, const ARM_Interface::ThreadContext64& ctx) { - return ARM_Dynarmic_64::GetBacktraceFromContext(system, ctx); + std::vector out; + auto& memory = system.ApplicationMemory(); + + const auto& reg = ctx.cpu_registers; + u64 pc = ctx.pc, lr = reg[30], fp = reg[29]; + + out.push_back({"", 0, pc, 0, ""}); + + // fp (= x29) points to the previous frame record. + // Frame records are two words long: + // fp+0 : pointer to previous frame record + // fp+8 : value of lr for frame + for (size_t i = 0; i < 256; i++) { + out.push_back({"", 0, lr, 0, ""}); + if (!fp || (fp % 4 != 0) || !memory.IsValidVirtualAddressRange(fp, 16)) { + break; + } + lr = memory.Read64(fp + 8); + fp = memory.Read64(fp); + } + + SymbolicateBacktrace(system, out); + + return out; } void ARM_Interface::SymbolicateBacktrace(Core::System& system, std::vector& out) { @@ -76,6 +119,18 @@ void ARM_Interface::SymbolicateBacktrace(Core::System& system, std::vector ARM_Interface::GetBacktrace() const { + if (GetArchitecture() == Architecture::Aarch64) { + ThreadContext64 ctx; + SaveContext(ctx); + return GetBacktraceFromContext(system, ctx); + } else { + ThreadContext32 ctx; + SaveContext(ctx); + return GetBacktraceFromContext(system, ctx); + } +} + void ARM_Interface::LogBacktrace() const { const VAddr sp = GetSP(); const VAddr pc = GetPC(); @@ -83,7 +138,6 @@ void ARM_Interface::LogBacktrace() const { LOG_ERROR(Core_ARM, "{:20}{:20}{:20}{:20}{}", "Module Name", "Address", "Original Address", "Offset", "Symbol"); LOG_ERROR(Core_ARM, ""); - const auto backtrace = GetBacktrace(); for (const auto& entry : backtrace) { LOG_ERROR(Core_ARM, "{:20}{:016X} {:016X} {:016X} {}", entry.module, entry.address, @@ -97,7 +151,7 @@ void ARM_Interface::Run() { while (true) { Kernel::KThread* current_thread{Kernel::GetCurrentThreadPointer(system.Kernel())}; - Dynarmic::HaltReason hr{}; + HaltReason hr{}; // Notify the debugger and go to sleep if a step was performed // and this thread has been scheduled again. @@ -108,17 +162,17 @@ void ARM_Interface::Run() { } // Otherwise, run the thread. - system.EnterDynarmicProfile(); + system.EnterCPUProfile(); if (current_thread->GetStepState() == StepState::StepPending) { hr = StepJit(); - if (Has(hr, step_thread)) { + if (True(hr & HaltReason::StepThread)) { current_thread->SetStepState(StepState::StepPerformed); } } else { hr = RunJit(); } - system.ExitDynarmicProfile(); + system.ExitCPUProfile(); // If the thread is scheduled for termination, exit the thread. if (current_thread->HasDpc()) { @@ -130,8 +184,8 @@ void ARM_Interface::Run() { // Notify the debugger and go to sleep if a breakpoint was hit, // or if the thread is unable to continue for any reason. - if (Has(hr, breakpoint) || Has(hr, no_execute)) { - if (!Has(hr, no_execute)) { + if (True(hr & HaltReason::InstructionBreakpoint) || True(hr & HaltReason::PrefetchAbort)) { + if (!True(hr & HaltReason::InstructionBreakpoint)) { RewindBreakpointInstruction(); } if (system.DebuggerEnabled()) { @@ -144,7 +198,7 @@ void ARM_Interface::Run() { } // Notify the debugger and go to sleep if a watchpoint was hit. - if (Has(hr, watchpoint)) { + if (True(hr & HaltReason::DataAbort)) { if (system.DebuggerEnabled()) { system.GetDebugger().NotifyThreadWatchpoint(current_thread, *HaltedWatchpoint()); } @@ -153,11 +207,11 @@ void ARM_Interface::Run() { } // Handle syscalls and scheduling (this may change the current thread/core) - if (Has(hr, svc_call)) { + if (True(hr & HaltReason::SupervisorCall)) { Kernel::Svc::Call(system, GetSvcNumber()); break; } - if (Has(hr, break_loop) || !uses_wall_clock) { + if (True(hr & HaltReason::BreakLoop) || !uses_wall_clock) { break; } } diff --git a/src/core/arm/arm_interface.h b/src/core/arm/arm_interface.h index 6b675864d..8c5bec033 100755 --- a/src/core/arm/arm_interface.h +++ b/src/core/arm/arm_interface.h @@ -8,8 +8,6 @@ #include #include -#include - #include "common/common_funcs.h" #include "common/common_types.h" #include "core/hardware_properties.h" @@ -30,6 +28,22 @@ class CPUInterruptHandler; using WatchpointArray = std::array; +// NOTE: these values match the HaltReason enum in Dynarmic +enum class HaltReason : u64 { + StepThread = 0x00000001, + DataAbort = 0x00000004, + BreakLoop = 0x02000000, + SupervisorCall = 0x04000000, + InstructionBreakpoint = 0x08000000, + PrefetchAbort = 0x20000000, +}; +DECLARE_ENUM_FLAG_OPERATORS(HaltReason); + +enum class Architecture { + Aarch32, + Aarch64, +}; + /// Generic ARMv8 CPU interface class ARM_Interface { public: @@ -167,8 +181,9 @@ public: */ virtual void SetTPIDR_EL0(u64 value) = 0; - virtual void SaveContext(ThreadContext32& ctx) = 0; - virtual void SaveContext(ThreadContext64& ctx) = 0; + virtual Architecture GetArchitecture() const = 0; + virtual void SaveContext(ThreadContext32& ctx) const = 0; + virtual void SaveContext(ThreadContext64& ctx) const = 0; virtual void LoadContext(const ThreadContext32& ctx) = 0; virtual void LoadContext(const ThreadContext64& ctx) = 0; void LoadWatchpointArray(const WatchpointArray& wp); @@ -195,17 +210,9 @@ public: static std::vector GetBacktraceFromContext(System& system, const ThreadContext64& ctx); - virtual std::vector GetBacktrace() const = 0; - + std::vector GetBacktrace() const; void LogBacktrace() const; - static constexpr Dynarmic::HaltReason step_thread = Dynarmic::HaltReason::Step; - static constexpr Dynarmic::HaltReason break_loop = Dynarmic::HaltReason::UserDefined2; - static constexpr Dynarmic::HaltReason svc_call = Dynarmic::HaltReason::UserDefined3; - static constexpr Dynarmic::HaltReason breakpoint = Dynarmic::HaltReason::UserDefined4; - static constexpr Dynarmic::HaltReason watchpoint = Dynarmic::HaltReason::MemoryAbort; - static constexpr Dynarmic::HaltReason no_execute = Dynarmic::HaltReason::UserDefined6; - protected: /// System context that this ARM interface is running under. System& system; @@ -216,8 +223,8 @@ protected: const Kernel::DebugWatchpoint* MatchingWatchpoint( u64 addr, u64 size, Kernel::DebugWatchpointType access_type) const; - virtual Dynarmic::HaltReason RunJit() = 0; - virtual Dynarmic::HaltReason StepJit() = 0; + virtual HaltReason RunJit() = 0; + virtual HaltReason StepJit() = 0; virtual u32 GetSvcNumber() const = 0; virtual const Kernel::DebugWatchpoint* HaltedWatchpoint() const = 0; virtual void RewindBreakpointInstruction() = 0; diff --git a/src/core/arm/dynarmic/arm_dynarmic.h b/src/core/arm/dynarmic/arm_dynarmic.h new file mode 100755 index 000000000..eef7c3116 --- /dev/null +++ b/src/core/arm/dynarmic/arm_dynarmic.h @@ -0,0 +1,29 @@ +// SPDX-FileCopyrightText: Copyright 2023 yuzu Emulator Project +// SPDX-License-Identifier: GPL-2.0-or-later + +#include + +#include "core/arm/arm_interface.h" + +namespace Core { + +constexpr Dynarmic::HaltReason StepThread = Dynarmic::HaltReason::Step; +constexpr Dynarmic::HaltReason DataAbort = Dynarmic::HaltReason::MemoryAbort; +constexpr Dynarmic::HaltReason BreakLoop = Dynarmic::HaltReason::UserDefined2; +constexpr Dynarmic::HaltReason SupervisorCall = Dynarmic::HaltReason::UserDefined3; +constexpr Dynarmic::HaltReason InstructionBreakpoint = Dynarmic::HaltReason::UserDefined4; +constexpr Dynarmic::HaltReason PrefetchAbort = Dynarmic::HaltReason::UserDefined6; + +constexpr HaltReason TranslateHaltReason(Dynarmic::HaltReason hr) { + static_assert(static_cast(HaltReason::StepThread) == static_cast(StepThread)); + static_assert(static_cast(HaltReason::DataAbort) == static_cast(DataAbort)); + static_assert(static_cast(HaltReason::BreakLoop) == static_cast(BreakLoop)); + static_assert(static_cast(HaltReason::SupervisorCall) == static_cast(SupervisorCall)); + static_assert(static_cast(HaltReason::InstructionBreakpoint) == + static_cast(InstructionBreakpoint)); + static_assert(static_cast(HaltReason::PrefetchAbort) == static_cast(PrefetchAbort)); + + return static_cast(hr); +} + +} // namespace Core diff --git a/src/core/arm/dynarmic/arm_dynarmic_32.cpp b/src/core/arm/dynarmic/arm_dynarmic_32.cpp index eca801c08..0229969cd 100755 --- a/src/core/arm/dynarmic/arm_dynarmic_32.cpp +++ b/src/core/arm/dynarmic/arm_dynarmic_32.cpp @@ -10,9 +10,10 @@ #include "common/logging/log.h" #include "common/page_table.h" #include "common/settings.h" +#include "core/arm/dynarmic/arm_dynarmic.h" #include "core/arm/dynarmic/arm_dynarmic_32.h" -#include "core/arm/dynarmic/arm_dynarmic_cp15.h" -#include "core/arm/dynarmic/arm_exclusive_monitor.h" +#include "core/arm/dynarmic/dynarmic_cp15.h" +#include "core/arm/dynarmic/dynarmic_exclusive_monitor.h" #include "core/core.h" #include "core/core_timing.h" #include "core/debugger/debugger.h" @@ -104,11 +105,11 @@ public: switch (exception) { case Dynarmic::A32::Exception::NoExecuteFault: LOG_CRITICAL(Core_ARM, "Cannot execute instruction at unmapped address {:#08x}", pc); - ReturnException(pc, ARM_Interface::no_execute); + ReturnException(pc, PrefetchAbort); return; default: if (debugger_enabled) { - ReturnException(pc, ARM_Interface::breakpoint); + ReturnException(pc, InstructionBreakpoint); return; } @@ -121,7 +122,7 @@ public: void CallSVC(u32 swi) override { parent.svc_swi = swi; - parent.jit.load()->HaltExecution(ARM_Interface::svc_call); + parent.jit.load()->HaltExecution(SupervisorCall); } void AddTicks(u64 ticks) override { @@ -162,7 +163,7 @@ public: if (!memory.IsValidVirtualAddressRange(addr, size)) { LOG_CRITICAL(Core_ARM, "Stopping execution due to unmapped memory access at {:#x}", addr); - parent.jit.load()->HaltExecution(ARM_Interface::no_execute); + parent.jit.load()->HaltExecution(PrefetchAbort); return false; } @@ -173,7 +174,7 @@ public: const auto match{parent.MatchingWatchpoint(addr, size, type)}; if (match) { parent.halted_watchpoint = match; - parent.jit.load()->HaltExecution(ARM_Interface::watchpoint); + parent.jit.load()->HaltExecution(DataAbort); return false; } @@ -329,12 +330,12 @@ std::shared_ptr ARM_Dynarmic_32::MakeJit(Common::PageTable* return std::make_unique(config); } -Dynarmic::HaltReason ARM_Dynarmic_32::RunJit() { - return jit.load()->Run(); +HaltReason ARM_Dynarmic_32::RunJit() { + return TranslateHaltReason(jit.load()->Run()); } -Dynarmic::HaltReason ARM_Dynarmic_32::StepJit() { - return jit.load()->Step(); +HaltReason ARM_Dynarmic_32::StepJit() { + return TranslateHaltReason(jit.load()->Step()); } u32 ARM_Dynarmic_32::GetSvcNumber() const { @@ -408,7 +409,7 @@ void ARM_Dynarmic_32::SetTPIDR_EL0(u64 value) { cp15->uprw = static_cast(value); } -void ARM_Dynarmic_32::SaveContext(ThreadContext32& ctx) { +void ARM_Dynarmic_32::SaveContext(ThreadContext32& ctx) const { Dynarmic::A32::Jit* j = jit.load(); ctx.cpu_registers = j->Regs(); ctx.extension_registers = j->ExtRegs(); @@ -425,11 +426,11 @@ void ARM_Dynarmic_32::LoadContext(const ThreadContext32& ctx) { } void ARM_Dynarmic_32::SignalInterrupt() { - jit.load()->HaltExecution(break_loop); + jit.load()->HaltExecution(BreakLoop); } void ARM_Dynarmic_32::ClearInterrupt() { - jit.load()->ClearHalt(break_loop); + jit.load()->ClearHalt(BreakLoop); } void ARM_Dynarmic_32::ClearInstructionCache() { @@ -462,39 +463,4 @@ void ARM_Dynarmic_32::PageTableChanged(Common::PageTable& page_table, jit_cache.emplace(key, std::move(new_jit)); } -std::vector ARM_Dynarmic_32::GetBacktrace(Core::System& system, - u64 fp, u64 lr, u64 pc) { - std::vector out; - auto& memory = system.ApplicationMemory(); - - out.push_back({"", 0, pc, 0, ""}); - - // fp (= r11) points to the last frame record. - // Frame records are two words long: - // fp+0 : pointer to previous frame record - // fp+4 : value of lr for frame - for (size_t i = 0; i < 256; i++) { - out.push_back({"", 0, lr, 0, ""}); - if (!fp || (fp % 4 != 0) || !memory.IsValidVirtualAddressRange(fp, 8)) { - break; - } - lr = memory.Read32(fp + 4); - fp = memory.Read32(fp); - } - - SymbolicateBacktrace(system, out); - - return out; -} - -std::vector ARM_Dynarmic_32::GetBacktraceFromContext( - System& system, const ThreadContext32& ctx) { - const auto& reg = ctx.cpu_registers; - return GetBacktrace(system, reg[11], reg[14], reg[15]); -} - -std::vector ARM_Dynarmic_32::GetBacktrace() const { - return GetBacktrace(system, GetReg(11), GetReg(14), GetReg(15)); -} - } // namespace Core diff --git a/src/core/arm/dynarmic/arm_dynarmic_32.h b/src/core/arm/dynarmic/arm_dynarmic_32.h index 40fa768cf..c80924bb1 100755 --- a/src/core/arm/dynarmic/arm_dynarmic_32.h +++ b/src/core/arm/dynarmic/arm_dynarmic_32.h @@ -50,8 +50,11 @@ public: return (GetPSTATE() & 0x20) != 0; } - void SaveContext(ThreadContext32& ctx) override; - void SaveContext(ThreadContext64& ctx) override {} + Architecture GetArchitecture() const override { + return Architecture::Aarch32; + } + void SaveContext(ThreadContext32& ctx) const override; + void SaveContext(ThreadContext64& ctx) const override {} void LoadContext(const ThreadContext32& ctx) override; void LoadContext(const ThreadContext64& ctx) override {} @@ -64,14 +67,9 @@ public: void PageTableChanged(Common::PageTable& new_page_table, std::size_t new_address_space_size_in_bits) override; - static std::vector GetBacktraceFromContext(System& system, - const ThreadContext32& ctx); - - std::vector GetBacktrace() const override; - protected: - Dynarmic::HaltReason RunJit() override; - Dynarmic::HaltReason StepJit() override; + HaltReason RunJit() override; + HaltReason StepJit() override; u32 GetSvcNumber() const override; const Kernel::DebugWatchpoint* HaltedWatchpoint() const override; void RewindBreakpointInstruction() override; diff --git a/src/core/arm/dynarmic/arm_dynarmic_64.cpp b/src/core/arm/dynarmic/arm_dynarmic_64.cpp index 47c4ac388..b897c4961 100755 --- a/src/core/arm/dynarmic/arm_dynarmic_64.cpp +++ b/src/core/arm/dynarmic/arm_dynarmic_64.cpp @@ -10,8 +10,9 @@ #include "common/logging/log.h" #include "common/page_table.h" #include "common/settings.h" +#include "core/arm/dynarmic/arm_dynarmic.h" #include "core/arm/dynarmic/arm_dynarmic_64.h" -#include "core/arm/dynarmic/arm_exclusive_monitor.h" +#include "core/arm/dynarmic/dynarmic_exclusive_monitor.h" #include "core/core.h" #include "core/core_timing.h" #include "core/debugger/debugger.h" @@ -113,7 +114,7 @@ public: LOG_ERROR(Core_ARM, "Unimplemented instruction @ 0x{:X} for {} instructions (instr = {:08X})", pc, num_instructions, memory.Read32(pc)); - ReturnException(pc, ARM_Interface::no_execute); + ReturnException(pc, PrefetchAbort); } void InstructionCacheOperationRaised(Dynarmic::A64::InstructionCacheOperation op, @@ -148,11 +149,11 @@ public: return; case Dynarmic::A64::Exception::NoExecuteFault: LOG_CRITICAL(Core_ARM, "Cannot execute instruction at unmapped address {:#016x}", pc); - ReturnException(pc, ARM_Interface::no_execute); + ReturnException(pc, PrefetchAbort); return; default: if (debugger_enabled) { - ReturnException(pc, ARM_Interface::breakpoint); + ReturnException(pc, InstructionBreakpoint); return; } @@ -164,7 +165,7 @@ public: void CallSVC(u32 swi) override { parent.svc_swi = swi; - parent.jit.load()->HaltExecution(ARM_Interface::svc_call); + parent.jit.load()->HaltExecution(SupervisorCall); } void AddTicks(u64 ticks) override { @@ -207,7 +208,7 @@ public: if (!memory.IsValidVirtualAddressRange(addr, size)) { LOG_CRITICAL(Core_ARM, "Stopping execution due to unmapped memory access at {:#x}", addr); - parent.jit.load()->HaltExecution(ARM_Interface::no_execute); + parent.jit.load()->HaltExecution(PrefetchAbort); return false; } @@ -218,7 +219,7 @@ public: const auto match{parent.MatchingWatchpoint(addr, size, type)}; if (match) { parent.halted_watchpoint = match; - parent.jit.load()->HaltExecution(ARM_Interface::watchpoint); + parent.jit.load()->HaltExecution(DataAbort); return false; } @@ -383,12 +384,12 @@ std::shared_ptr ARM_Dynarmic_64::MakeJit(Common::PageTable* return std::make_shared(config); } -Dynarmic::HaltReason ARM_Dynarmic_64::RunJit() { - return jit.load()->Run(); +HaltReason ARM_Dynarmic_64::RunJit() { + return TranslateHaltReason(jit.load()->Run()); } -Dynarmic::HaltReason ARM_Dynarmic_64::StepJit() { - return jit.load()->Step(); +HaltReason ARM_Dynarmic_64::StepJit() { + return TranslateHaltReason(jit.load()->Step()); } u32 ARM_Dynarmic_64::GetSvcNumber() const { @@ -464,7 +465,7 @@ void ARM_Dynarmic_64::SetTPIDR_EL0(u64 value) { cb->tpidr_el0 = value; } -void ARM_Dynarmic_64::SaveContext(ThreadContext64& ctx) { +void ARM_Dynarmic_64::SaveContext(ThreadContext64& ctx) const { Dynarmic::A64::Jit* j = jit.load(); ctx.cpu_registers = j->GetRegisters(); ctx.sp = j->GetSP(); @@ -489,11 +490,11 @@ void ARM_Dynarmic_64::LoadContext(const ThreadContext64& ctx) { } void ARM_Dynarmic_64::SignalInterrupt() { - jit.load()->HaltExecution(break_loop); + jit.load()->HaltExecution(BreakLoop); } void ARM_Dynarmic_64::ClearInterrupt() { - jit.load()->ClearHalt(break_loop); + jit.load()->ClearHalt(BreakLoop); } void ARM_Dynarmic_64::ClearInstructionCache() { @@ -526,39 +527,4 @@ void ARM_Dynarmic_64::PageTableChanged(Common::PageTable& page_table, jit_cache.emplace(key, std::move(new_jit)); } -std::vector ARM_Dynarmic_64::GetBacktrace(Core::System& system, - u64 fp, u64 lr, u64 pc) { - std::vector out; - auto& memory = system.ApplicationMemory(); - - out.push_back({"", 0, pc, 0, ""}); - - // fp (= x29) points to the previous frame record. - // Frame records are two words long: - // fp+0 : pointer to previous frame record - // fp+8 : value of lr for frame - for (size_t i = 0; i < 256; i++) { - out.push_back({"", 0, lr, 0, ""}); - if (!fp || (fp % 4 != 0) || !memory.IsValidVirtualAddressRange(fp, 16)) { - break; - } - lr = memory.Read64(fp + 8); - fp = memory.Read64(fp); - } - - SymbolicateBacktrace(system, out); - - return out; -} - -std::vector ARM_Dynarmic_64::GetBacktraceFromContext( - System& system, const ThreadContext64& ctx) { - const auto& reg = ctx.cpu_registers; - return GetBacktrace(system, reg[29], reg[30], ctx.pc); -} - -std::vector ARM_Dynarmic_64::GetBacktrace() const { - return GetBacktrace(system, GetReg(29), GetReg(30), GetPC()); -} - } // namespace Core diff --git a/src/core/arm/dynarmic/arm_dynarmic_64.h b/src/core/arm/dynarmic/arm_dynarmic_64.h index 8d31616ff..f9910d439 100755 --- a/src/core/arm/dynarmic/arm_dynarmic_64.h +++ b/src/core/arm/dynarmic/arm_dynarmic_64.h @@ -43,8 +43,11 @@ public: void SetTPIDR_EL0(u64 value) override; u64 GetTPIDR_EL0() const override; - void SaveContext(ThreadContext32& ctx) override {} - void SaveContext(ThreadContext64& ctx) override; + Architecture GetArchitecture() const override { + return Architecture::Aarch64; + } + void SaveContext(ThreadContext32& ctx) const override {} + void SaveContext(ThreadContext64& ctx) const override; void LoadContext(const ThreadContext32& ctx) override {} void LoadContext(const ThreadContext64& ctx) override; @@ -57,14 +60,9 @@ public: void PageTableChanged(Common::PageTable& new_page_table, std::size_t new_address_space_size_in_bits) override; - static std::vector GetBacktraceFromContext(System& system, - const ThreadContext64& ctx); - - std::vector GetBacktrace() const override; - protected: - Dynarmic::HaltReason RunJit() override; - Dynarmic::HaltReason StepJit() override; + HaltReason RunJit() override; + HaltReason StepJit() override; u32 GetSvcNumber() const override; const Kernel::DebugWatchpoint* HaltedWatchpoint() const override; void RewindBreakpointInstruction() override; @@ -73,8 +71,6 @@ private: std::shared_ptr MakeJit(Common::PageTable* page_table, std::size_t address_space_bits) const; - static std::vector GetBacktrace(Core::System& system, u64 fp, u64 lr, u64 pc); - using JitCacheKey = std::pair; using JitCacheType = std::unordered_map, Common::PairHash>; diff --git a/src/core/arm/dynarmic/dynarmic_cp15.cpp b/src/core/arm/dynarmic/dynarmic_cp15.cpp new file mode 100755 index 000000000..92c548db0 --- /dev/null +++ b/src/core/arm/dynarmic/dynarmic_cp15.cpp @@ -0,0 +1,161 @@ +// SPDX-FileCopyrightText: 2017 Citra Emulator Project +// SPDX-License-Identifier: GPL-2.0-or-later + +#include +#include "common/logging/log.h" +#include "core/arm/dynarmic/arm_dynarmic_32.h" +#include "core/arm/dynarmic/dynarmic_cp15.h" +#include "core/core.h" +#include "core/core_timing.h" + +#ifdef _MSC_VER +#include +#endif + +using Callback = Dynarmic::A32::Coprocessor::Callback; +using CallbackOrAccessOneWord = Dynarmic::A32::Coprocessor::CallbackOrAccessOneWord; +using CallbackOrAccessTwoWords = Dynarmic::A32::Coprocessor::CallbackOrAccessTwoWords; + +template <> +struct fmt::formatter { + constexpr auto parse(format_parse_context& ctx) { + return ctx.begin(); + } + template + auto format(const Dynarmic::A32::CoprocReg& reg, FormatContext& ctx) { + return fmt::format_to(ctx.out(), "cp{}", static_cast(reg)); + } +}; + +namespace Core { + +static u32 dummy_value; + +std::optional DynarmicCP15::CompileInternalOperation(bool two, unsigned opc1, + CoprocReg CRd, CoprocReg CRn, + CoprocReg CRm, unsigned opc2) { + LOG_CRITICAL(Core_ARM, "CP15: cdp{} p15, {}, {}, {}, {}, {}", two ? "2" : "", opc1, CRd, CRn, + CRm, opc2); + return std::nullopt; +} + +CallbackOrAccessOneWord DynarmicCP15::CompileSendOneWord(bool two, unsigned opc1, CoprocReg CRn, + CoprocReg CRm, unsigned opc2) { + if (!two && CRn == CoprocReg::C7 && opc1 == 0 && CRm == CoprocReg::C5 && opc2 == 4) { + // CP15_FLUSH_PREFETCH_BUFFER + // This is a dummy write, we ignore the value written here. + return &dummy_value; + } + + if (!two && CRn == CoprocReg::C7 && opc1 == 0 && CRm == CoprocReg::C10) { + switch (opc2) { + case 4: + // CP15_DATA_SYNC_BARRIER + return Callback{ + [](void*, std::uint32_t, std::uint32_t) -> std::uint64_t { +#if defined(_MSC_VER) && defined(ARCHITECTURE_x86_64) + _mm_mfence(); + _mm_lfence(); +#elif defined(ARCHITECTURE_x86_64) + asm volatile("mfence\n\tlfence\n\t" : : : "memory"); +#elif defined(ARCHITECTURE_arm64) + asm volatile("dsb sy\n\t" : : : "memory"); +#else +#error Unsupported architecture +#endif + return 0; + }, + std::nullopt, + }; + case 5: + // CP15_DATA_MEMORY_BARRIER + return Callback{ + [](void*, std::uint32_t, std::uint32_t) -> std::uint64_t { +#if defined(_MSC_VER) && defined(ARCHITECTURE_x86_64) + _mm_mfence(); +#elif defined(ARCHITECTURE_x86_64) + asm volatile("mfence\n\t" : : : "memory"); +#elif defined(ARCHITECTURE_arm64) + asm volatile("dmb sy\n\t" : : : "memory"); +#else +#error Unsupported architecture +#endif + return 0; + }, + std::nullopt, + }; + } + } + + if (!two && CRn == CoprocReg::C13 && opc1 == 0 && CRm == CoprocReg::C0 && opc2 == 2) { + // CP15_THREAD_UPRW + return &uprw; + } + + LOG_CRITICAL(Core_ARM, "CP15: mcr{} p15, {}, , {}, {}, {}", two ? "2" : "", opc1, CRn, CRm, + opc2); + return {}; +} + +CallbackOrAccessTwoWords DynarmicCP15::CompileSendTwoWords(bool two, unsigned opc, CoprocReg CRm) { + LOG_CRITICAL(Core_ARM, "CP15: mcrr{} p15, {}, , , {}", two ? "2" : "", opc, CRm); + return {}; +} + +CallbackOrAccessOneWord DynarmicCP15::CompileGetOneWord(bool two, unsigned opc1, CoprocReg CRn, + CoprocReg CRm, unsigned opc2) { + if (!two && CRn == CoprocReg::C13 && opc1 == 0 && CRm == CoprocReg::C0) { + switch (opc2) { + case 2: + // CP15_THREAD_UPRW + return &uprw; + case 3: + // CP15_THREAD_URO + return &uro; + } + } + + LOG_CRITICAL(Core_ARM, "CP15: mrc{} p15, {}, , {}, {}, {}", two ? "2" : "", opc1, CRn, CRm, + opc2); + return {}; +} + +CallbackOrAccessTwoWords DynarmicCP15::CompileGetTwoWords(bool two, unsigned opc, CoprocReg CRm) { + if (!two && opc == 0 && CRm == CoprocReg::C14) { + // CNTPCT + const auto callback = [](void* arg, u32, u32) -> u64 { + const auto& parent_arg = *static_cast(arg); + return parent_arg.system.CoreTiming().GetClockTicks(); + }; + return Callback{callback, &parent}; + } + + LOG_CRITICAL(Core_ARM, "CP15: mrrc{} p15, {}, , , {}", two ? "2" : "", opc, CRm); + return {}; +} + +std::optional DynarmicCP15::CompileLoadWords(bool two, bool long_transfer, CoprocReg CRd, + std::optional option) { + if (option) { + LOG_CRITICAL(Core_ARM, "CP15: mrrc{}{} p15, {}, [...], {}", two ? "2" : "", + long_transfer ? "l" : "", CRd, *option); + } else { + LOG_CRITICAL(Core_ARM, "CP15: mrrc{}{} p15, {}, [...]", two ? "2" : "", + long_transfer ? "l" : "", CRd); + } + return std::nullopt; +} + +std::optional DynarmicCP15::CompileStoreWords(bool two, bool long_transfer, CoprocReg CRd, + std::optional option) { + if (option) { + LOG_CRITICAL(Core_ARM, "CP15: mrrc{}{} p15, {}, [...], {}", two ? "2" : "", + long_transfer ? "l" : "", CRd, *option); + } else { + LOG_CRITICAL(Core_ARM, "CP15: mrrc{}{} p15, {}, [...]", two ? "2" : "", + long_transfer ? "l" : "", CRd); + } + return std::nullopt; +} + +} // namespace Core diff --git a/src/core/arm/dynarmic/dynarmic_cp15.h b/src/core/arm/dynarmic/dynarmic_cp15.h new file mode 100755 index 000000000..d90b3e568 --- /dev/null +++ b/src/core/arm/dynarmic/dynarmic_cp15.h @@ -0,0 +1,42 @@ +// SPDX-FileCopyrightText: 2017 Citra Emulator Project +// SPDX-License-Identifier: GPL-2.0-or-later + +#pragma once + +#include + +#include +#include "common/common_types.h" + +namespace Core { + +class ARM_Dynarmic_32; + +class DynarmicCP15 final : public Dynarmic::A32::Coprocessor { +public: + using CoprocReg = Dynarmic::A32::CoprocReg; + + explicit DynarmicCP15(ARM_Dynarmic_32& parent_) : parent{parent_} {} + + std::optional CompileInternalOperation(bool two, unsigned opc1, CoprocReg CRd, + CoprocReg CRn, CoprocReg CRm, + unsigned opc2) override; + CallbackOrAccessOneWord CompileSendOneWord(bool two, unsigned opc1, CoprocReg CRn, + CoprocReg CRm, unsigned opc2) override; + CallbackOrAccessTwoWords CompileSendTwoWords(bool two, unsigned opc, CoprocReg CRm) override; + CallbackOrAccessOneWord CompileGetOneWord(bool two, unsigned opc1, CoprocReg CRn, CoprocReg CRm, + unsigned opc2) override; + CallbackOrAccessTwoWords CompileGetTwoWords(bool two, unsigned opc, CoprocReg CRm) override; + std::optional CompileLoadWords(bool two, bool long_transfer, CoprocReg CRd, + std::optional option) override; + std::optional CompileStoreWords(bool two, bool long_transfer, CoprocReg CRd, + std::optional option) override; + + ARM_Dynarmic_32& parent; + u32 uprw = 0; + u32 uro = 0; + + friend class ARM_Dynarmic_32; +}; + +} // namespace Core diff --git a/src/core/arm/dynarmic/dynarmic_exclusive_monitor.cpp b/src/core/arm/dynarmic/dynarmic_exclusive_monitor.cpp new file mode 100755 index 000000000..b5c9c43c4 --- /dev/null +++ b/src/core/arm/dynarmic/dynarmic_exclusive_monitor.cpp @@ -0,0 +1,73 @@ +// SPDX-FileCopyrightText: Copyright 2018 yuzu Emulator Project +// SPDX-License-Identifier: GPL-2.0-or-later + +#include "core/arm/dynarmic/dynarmic_exclusive_monitor.h" +#include "core/memory.h" + +namespace Core { + +DynarmicExclusiveMonitor::DynarmicExclusiveMonitor(Memory::Memory& memory_, std::size_t core_count_) + : monitor{core_count_}, memory{memory_} {} + +DynarmicExclusiveMonitor::~DynarmicExclusiveMonitor() = default; + +u8 DynarmicExclusiveMonitor::ExclusiveRead8(std::size_t core_index, VAddr addr) { + return monitor.ReadAndMark(core_index, addr, [&]() -> u8 { return memory.Read8(addr); }); +} + +u16 DynarmicExclusiveMonitor::ExclusiveRead16(std::size_t core_index, VAddr addr) { + return monitor.ReadAndMark(core_index, addr, [&]() -> u16 { return memory.Read16(addr); }); +} + +u32 DynarmicExclusiveMonitor::ExclusiveRead32(std::size_t core_index, VAddr addr) { + return monitor.ReadAndMark(core_index, addr, [&]() -> u32 { return memory.Read32(addr); }); +} + +u64 DynarmicExclusiveMonitor::ExclusiveRead64(std::size_t core_index, VAddr addr) { + return monitor.ReadAndMark(core_index, addr, [&]() -> u64 { return memory.Read64(addr); }); +} + +u128 DynarmicExclusiveMonitor::ExclusiveRead128(std::size_t core_index, VAddr addr) { + return monitor.ReadAndMark(core_index, addr, [&]() -> u128 { + u128 result; + result[0] = memory.Read64(addr); + result[1] = memory.Read64(addr + 8); + return result; + }); +} + +void DynarmicExclusiveMonitor::ClearExclusive(std::size_t core_index) { + monitor.ClearProcessor(core_index); +} + +bool DynarmicExclusiveMonitor::ExclusiveWrite8(std::size_t core_index, VAddr vaddr, u8 value) { + return monitor.DoExclusiveOperation(core_index, vaddr, [&](u8 expected) -> bool { + return memory.WriteExclusive8(vaddr, value, expected); + }); +} + +bool DynarmicExclusiveMonitor::ExclusiveWrite16(std::size_t core_index, VAddr vaddr, u16 value) { + return monitor.DoExclusiveOperation(core_index, vaddr, [&](u16 expected) -> bool { + return memory.WriteExclusive16(vaddr, value, expected); + }); +} + +bool DynarmicExclusiveMonitor::ExclusiveWrite32(std::size_t core_index, VAddr vaddr, u32 value) { + return monitor.DoExclusiveOperation(core_index, vaddr, [&](u32 expected) -> bool { + return memory.WriteExclusive32(vaddr, value, expected); + }); +} + +bool DynarmicExclusiveMonitor::ExclusiveWrite64(std::size_t core_index, VAddr vaddr, u64 value) { + return monitor.DoExclusiveOperation(core_index, vaddr, [&](u64 expected) -> bool { + return memory.WriteExclusive64(vaddr, value, expected); + }); +} + +bool DynarmicExclusiveMonitor::ExclusiveWrite128(std::size_t core_index, VAddr vaddr, u128 value) { + return monitor.DoExclusiveOperation(core_index, vaddr, [&](u128 expected) -> bool { + return memory.WriteExclusive128(vaddr, value, expected); + }); +} + +} // namespace Core diff --git a/src/core/arm/dynarmic/dynarmic_exclusive_monitor.h b/src/core/arm/dynarmic/dynarmic_exclusive_monitor.h new file mode 100755 index 000000000..57e6dd0d0 --- /dev/null +++ b/src/core/arm/dynarmic/dynarmic_exclusive_monitor.h @@ -0,0 +1,44 @@ +// SPDX-FileCopyrightText: Copyright 2020 yuzu Emulator Project +// SPDX-License-Identifier: GPL-2.0-or-later + +#pragma once + +#include + +#include "common/common_types.h" +#include "core/arm/dynarmic/arm_dynarmic_32.h" +#include "core/arm/dynarmic/arm_dynarmic_64.h" +#include "core/arm/exclusive_monitor.h" + +namespace Core::Memory { +class Memory; +} + +namespace Core { + +class DynarmicExclusiveMonitor final : public ExclusiveMonitor { +public: + explicit DynarmicExclusiveMonitor(Memory::Memory& memory_, std::size_t core_count_); + ~DynarmicExclusiveMonitor() override; + + u8 ExclusiveRead8(std::size_t core_index, VAddr addr) override; + u16 ExclusiveRead16(std::size_t core_index, VAddr addr) override; + u32 ExclusiveRead32(std::size_t core_index, VAddr addr) override; + u64 ExclusiveRead64(std::size_t core_index, VAddr addr) override; + u128 ExclusiveRead128(std::size_t core_index, VAddr addr) override; + void ClearExclusive(std::size_t core_index) override; + + bool ExclusiveWrite8(std::size_t core_index, VAddr vaddr, u8 value) override; + bool ExclusiveWrite16(std::size_t core_index, VAddr vaddr, u16 value) override; + bool ExclusiveWrite32(std::size_t core_index, VAddr vaddr, u32 value) override; + bool ExclusiveWrite64(std::size_t core_index, VAddr vaddr, u64 value) override; + bool ExclusiveWrite128(std::size_t core_index, VAddr vaddr, u128 value) override; + +private: + friend class ARM_Dynarmic_32; + friend class ARM_Dynarmic_64; + Dynarmic::ExclusiveMonitor monitor; + Core::Memory::Memory& memory; +}; + +} // namespace Core diff --git a/src/core/arm/exclusive_monitor.cpp b/src/core/arm/exclusive_monitor.cpp index 88d3cd4a2..acdcb36a4 100755 --- a/src/core/arm/exclusive_monitor.cpp +++ b/src/core/arm/exclusive_monitor.cpp @@ -2,7 +2,7 @@ // SPDX-License-Identifier: GPL-2.0-or-later #if defined(ARCHITECTURE_x86_64) || defined(ARCHITECTURE_arm64) -#include "core/arm/dynarmic/arm_exclusive_monitor.h" +#include "core/arm/dynarmic/dynarmic_exclusive_monitor.h" #endif #include "core/arm/exclusive_monitor.h" #include "core/memory.h" diff --git a/src/core/core.cpp b/src/core/core.cpp index f9b4b0b13..8b57a09aa 100755 --- a/src/core/core.cpp +++ b/src/core/core.cpp @@ -54,10 +54,10 @@ #include "video_core/renderer_base.h" #include "video_core/video_core.h" -MICROPROFILE_DEFINE(ARM_Jit_Dynarmic_CPU0, "ARM JIT", "Dynarmic CPU 0", MP_RGB(255, 64, 64)); -MICROPROFILE_DEFINE(ARM_Jit_Dynarmic_CPU1, "ARM JIT", "Dynarmic CPU 1", MP_RGB(255, 64, 64)); -MICROPROFILE_DEFINE(ARM_Jit_Dynarmic_CPU2, "ARM JIT", "Dynarmic CPU 2", MP_RGB(255, 64, 64)); -MICROPROFILE_DEFINE(ARM_Jit_Dynarmic_CPU3, "ARM JIT", "Dynarmic CPU 3", MP_RGB(255, 64, 64)); +MICROPROFILE_DEFINE(ARM_CPU0, "ARM", "CPU 0", MP_RGB(255, 64, 64)); +MICROPROFILE_DEFINE(ARM_CPU1, "ARM", "CPU 1", MP_RGB(255, 64, 64)); +MICROPROFILE_DEFINE(ARM_CPU2, "ARM", "CPU 2", MP_RGB(255, 64, 64)); +MICROPROFILE_DEFINE(ARM_CPU3, "ARM", "CPU 3", MP_RGB(255, 64, 64)); namespace Core { @@ -259,10 +259,10 @@ struct System::Impl { is_powered_on = true; exit_lock = false; - microprofile_dynarmic[0] = MICROPROFILE_TOKEN(ARM_Jit_Dynarmic_CPU0); - microprofile_dynarmic[1] = MICROPROFILE_TOKEN(ARM_Jit_Dynarmic_CPU1); - microprofile_dynarmic[2] = MICROPROFILE_TOKEN(ARM_Jit_Dynarmic_CPU2); - microprofile_dynarmic[3] = MICROPROFILE_TOKEN(ARM_Jit_Dynarmic_CPU3); + microprofile_cpu[0] = MICROPROFILE_TOKEN(ARM_CPU0); + microprofile_cpu[1] = MICROPROFILE_TOKEN(ARM_CPU1); + microprofile_cpu[2] = MICROPROFILE_TOKEN(ARM_CPU2); + microprofile_cpu[3] = MICROPROFILE_TOKEN(ARM_CPU3); LOG_DEBUG(Core, "Initialized OK"); @@ -539,7 +539,7 @@ struct System::Impl { ExitCallback exit_callback; std::array dynarmic_ticks{}; - std::array microprofile_dynarmic{}; + std::array microprofile_cpu{}; }; System::System() : impl{std::make_unique(*this)} {} @@ -927,14 +927,14 @@ void System::RegisterHostThread() { impl->kernel.RegisterHostThread(); } -void System::EnterDynarmicProfile() { +void System::EnterCPUProfile() { std::size_t core = impl->kernel.GetCurrentHostThreadID(); - impl->dynarmic_ticks[core] = MicroProfileEnter(impl->microprofile_dynarmic[core]); + impl->dynarmic_ticks[core] = MicroProfileEnter(impl->microprofile_cpu[core]); } -void System::ExitDynarmicProfile() { +void System::ExitCPUProfile() { std::size_t core = impl->kernel.GetCurrentHostThreadID(); - MicroProfileLeave(impl->microprofile_dynarmic[core], impl->dynarmic_ticks[core]); + MicroProfileLeave(impl->microprofile_cpu[core], impl->dynarmic_ticks[core]); } bool System::IsMulticore() const { diff --git a/src/core/core.h b/src/core/core.h index c16e92e7a..e0539c6ad 100755 --- a/src/core/core.h +++ b/src/core/core.h @@ -412,11 +412,11 @@ public: /// Register a host thread as an auxiliary thread. void RegisterHostThread(); - /// Enter Dynarmic Microprofile - void EnterDynarmicProfile(); + /// Enter CPU Microprofile + void EnterCPUProfile(); - /// Exit Dynarmic Microprofile - void ExitDynarmicProfile(); + /// Exit CPU Microprofile + void ExitCPUProfile(); /// Tells if system is running on multicore. [[nodiscard]] bool IsMulticore() const;