2018-01-04 04:10:11 +01:00
|
|
|
// Copyright 2018 Yuzu Emulator Team
|
2016-09-02 05:07:14 +02:00
|
|
|
// Licensed under GPLv2 or any later version
|
|
|
|
// Refer to the license.txt file included.
|
|
|
|
|
2016-09-21 08:52:38 +02:00
|
|
|
#include "core/arm/dynarmic/arm_dynarmic.h"
|
2016-09-02 05:07:14 +02:00
|
|
|
|
2018-01-03 04:24:12 +01:00
|
|
|
ARM_Dynarmic::ARM_Dynarmic() {
|
2018-01-04 04:10:11 +01:00
|
|
|
UNIMPLEMENTED();
|
2016-09-02 05:07:14 +02:00
|
|
|
}
|
|
|
|
|
2018-01-04 04:10:11 +01:00
|
|
|
void ARM_Dynarmic::MapBackingMemory(VAddr /*address*/, size_t /*size*/, u8* /*memory*/,
|
|
|
|
Kernel::VMAPermission /*perms*/) {
|
|
|
|
UNIMPLEMENTED();
|
2016-09-02 05:07:14 +02:00
|
|
|
}
|
|
|
|
|
2018-01-04 04:10:11 +01:00
|
|
|
void ARM_Dynarmic::SetPC(u64 /*pc*/) {
|
|
|
|
UNIMPLEMENTED();
|
2016-09-02 05:07:14 +02:00
|
|
|
}
|
|
|
|
|
2017-08-29 03:09:42 +02:00
|
|
|
u64 ARM_Dynarmic::GetPC() const {
|
2018-01-04 04:10:11 +01:00
|
|
|
UNIMPLEMENTED();
|
|
|
|
return {};
|
2016-09-02 05:07:14 +02:00
|
|
|
}
|
|
|
|
|
2018-01-04 04:10:11 +01:00
|
|
|
u64 ARM_Dynarmic::GetReg(int /*index*/) const {
|
|
|
|
UNIMPLEMENTED();
|
|
|
|
return {};
|
2016-09-02 05:07:14 +02:00
|
|
|
}
|
|
|
|
|
2018-01-04 04:10:11 +01:00
|
|
|
void ARM_Dynarmic::SetReg(int /*index*/, u64 /*value*/) {
|
|
|
|
UNIMPLEMENTED();
|
2016-09-02 05:07:14 +02:00
|
|
|
}
|
|
|
|
|
2018-01-04 04:10:11 +01:00
|
|
|
const u128& ARM_Dynarmic::GetExtReg(int /*index*/) const {
|
|
|
|
UNIMPLEMENTED();
|
|
|
|
static constexpr u128 res{};
|
|
|
|
return res;
|
2016-09-02 05:07:14 +02:00
|
|
|
}
|
|
|
|
|
2018-01-04 04:10:11 +01:00
|
|
|
void ARM_Dynarmic::SetExtReg(int /*index*/, u128& /*value*/) {
|
|
|
|
UNIMPLEMENTED();
|
2016-09-02 05:07:14 +02:00
|
|
|
}
|
|
|
|
|
2018-01-04 04:10:11 +01:00
|
|
|
u32 ARM_Dynarmic::GetVFPReg(int /*index*/) const {
|
|
|
|
UNIMPLEMENTED();
|
2017-10-10 05:56:20 +02:00
|
|
|
return {};
|
2016-09-02 05:07:14 +02:00
|
|
|
}
|
|
|
|
|
2018-01-04 04:10:11 +01:00
|
|
|
void ARM_Dynarmic::SetVFPReg(int /*index*/, u32 /*value*/) {
|
|
|
|
UNIMPLEMENTED();
|
2016-09-02 05:07:14 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
u32 ARM_Dynarmic::GetCPSR() const {
|
2018-01-04 04:10:11 +01:00
|
|
|
UNIMPLEMENTED();
|
|
|
|
return {};
|
2016-09-02 05:07:14 +02:00
|
|
|
}
|
|
|
|
|
2018-01-04 04:10:11 +01:00
|
|
|
void ARM_Dynarmic::SetCPSR(u32 /*cpsr*/) {
|
|
|
|
UNIMPLEMENTED();
|
2016-09-02 05:07:14 +02:00
|
|
|
}
|
|
|
|
|
2017-09-30 20:16:39 +02:00
|
|
|
VAddr ARM_Dynarmic::GetTlsAddress() const {
|
2018-01-04 04:10:11 +01:00
|
|
|
UNIMPLEMENTED();
|
|
|
|
return {};
|
2017-09-30 20:16:39 +02:00
|
|
|
}
|
|
|
|
|
2018-01-04 04:10:11 +01:00
|
|
|
void ARM_Dynarmic::SetTlsAddress(VAddr /*address*/) {
|
|
|
|
UNIMPLEMENTED();
|
2017-09-30 20:16:39 +02:00
|
|
|
}
|
|
|
|
|
2018-01-04 04:10:11 +01:00
|
|
|
void ARM_Dynarmic::ExecuteInstructions(int /*num_instructions*/) {
|
|
|
|
UNIMPLEMENTED();
|
2016-09-02 05:07:14 +02:00
|
|
|
}
|
|
|
|
|
2018-01-04 04:10:11 +01:00
|
|
|
void ARM_Dynarmic::SaveContext(ARM_Interface::ThreadContext& /*ctx*/) {
|
|
|
|
UNIMPLEMENTED();
|
2016-09-02 05:07:14 +02:00
|
|
|
}
|
|
|
|
|
2018-01-04 04:10:11 +01:00
|
|
|
void ARM_Dynarmic::LoadContext(const ARM_Interface::ThreadContext& /*ctx*/) {
|
|
|
|
UNIMPLEMENTED();
|
2016-09-02 05:07:14 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
void ARM_Dynarmic::PrepareReschedule() {
|
2018-01-04 04:10:11 +01:00
|
|
|
UNIMPLEMENTED();
|
2016-09-02 05:07:14 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
void ARM_Dynarmic::ClearInstructionCache() {
|
2018-01-04 04:10:11 +01:00
|
|
|
UNIMPLEMENTED();
|
2016-09-02 05:07:14 +02:00
|
|
|
}
|
2017-09-24 23:44:13 +02:00
|
|
|
|
|
|
|
void ARM_Dynarmic::PageTableChanged() {
|
2018-01-04 04:10:11 +01:00
|
|
|
UNIMPLEMENTED();
|
2017-09-24 23:44:13 +02:00
|
|
|
}
|