2014-04-26 07:47:52 +02:00
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// Copyright 2014 Citra Emulator Project
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// Licensed under GPLv2
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// Refer to the license.txt file included.
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2014-05-02 01:21:04 +02:00
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#include "core/hle/coprocessor.h"
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2014-04-26 07:47:52 +02:00
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#include "core/hle/hle.h"
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#include "core/mem_map.h"
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#include "core/core.h"
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2014-04-25 23:15:19 +02:00
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namespace HLE {
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2014-04-26 07:47:52 +02:00
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/// Data synchronization barrier
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2014-05-08 03:04:55 +02:00
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u32 DataSynchronizationBarrier() {
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2014-04-26 07:47:52 +02:00
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return 0;
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}
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2014-04-25 23:15:19 +02:00
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/// Returns the coprocessor (in this case, syscore) command buffer pointer
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2014-04-26 07:47:52 +02:00
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Addr GetThreadCommandBuffer() {
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2014-04-25 23:15:19 +02:00
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// Called on insruction: mrc p15, 0, r0, c13, c0, 3
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2014-05-08 03:04:55 +02:00
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return Memory::KERNEL_MEMORY_VADDR;
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2014-04-25 23:15:19 +02:00
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}
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2014-05-02 05:03:50 +02:00
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/// Call an MCR (move to coprocessor from ARM register) instruction in HLE
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s32 CallMCR(u32 instruction, u32 value) {
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CoprocessorOperation operation = (CoprocessorOperation)((instruction >> 20) & 0xFF);
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ERROR_LOG(OSHLE, "unimplemented MCR instruction=0x%08X, operation=%02X, value=%08X",
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instruction, operation, value);
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2014-05-08 03:04:55 +02:00
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return 0;
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2014-05-02 05:03:50 +02:00
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}
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/// Call an MRC (move to ARM register from coprocessor) instruction in HLE
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s32 CallMRC(u32 instruction) {
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CoprocessorOperation operation = (CoprocessorOperation)((instruction >> 20) & 0xFF);
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2014-04-25 23:15:19 +02:00
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switch (operation) {
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case DATA_SYNCHRONIZATION_BARRIER:
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2014-05-08 03:04:55 +02:00
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return DataSynchronizationBarrier();
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2014-04-25 23:15:19 +02:00
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case CALL_GET_THREAD_COMMAND_BUFFER:
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2014-04-26 07:47:52 +02:00
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return GetThreadCommandBuffer();
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2014-04-25 23:15:19 +02:00
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default:
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2014-05-02 05:03:50 +02:00
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ERROR_LOG(OSHLE, "unimplemented MRC instruction 0x%08X", instruction);
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2014-04-25 23:15:19 +02:00
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break;
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}
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2014-05-08 03:04:55 +02:00
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return 0;
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2014-04-25 23:15:19 +02:00
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}
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} // namespace
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