2022-04-23 10:59:50 +02:00
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// SPDX-FileCopyrightText: Copyright 2019 yuzu Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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2019-04-23 00:50:56 +02:00
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#pragma once
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#include <vector>
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#include "common/bit_field.h"
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#include "common/common_types.h"
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namespace Tegra {
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class MemoryManager;
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}
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2022-01-29 22:00:49 +01:00
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namespace VideoCore {
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class RasterizerInterface;
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}
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2019-04-23 00:50:56 +02:00
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namespace Tegra::Engines::Upload {
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2019-04-25 18:57:10 +02:00
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struct Registers {
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2019-04-23 00:50:56 +02:00
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u32 line_length_in;
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u32 line_count;
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struct {
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u32 address_high;
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u32 address_low;
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u32 pitch;
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union {
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BitField<0, 4, u32> block_width;
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BitField<4, 4, u32> block_height;
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BitField<8, 4, u32> block_depth;
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};
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u32 width;
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u32 height;
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u32 depth;
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u32 z;
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u32 x;
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u32 y;
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GPUVAddr Address() const {
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return static_cast<GPUVAddr>((static_cast<GPUVAddr>(address_high) << 32) | address_low);
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}
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u32 BlockWidth() const {
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2019-06-13 22:41:16 +02:00
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return block_width.Value();
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2019-04-23 00:50:56 +02:00
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}
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u32 BlockHeight() const {
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2019-06-13 22:41:16 +02:00
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return block_height.Value();
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2019-04-23 00:50:56 +02:00
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}
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u32 BlockDepth() const {
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2019-06-13 22:41:16 +02:00
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return block_depth.Value();
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2019-04-23 00:50:56 +02:00
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}
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} dest;
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};
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class State {
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public:
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2020-12-04 20:39:12 +01:00
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explicit State(MemoryManager& memory_manager_, Registers& regs_);
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2019-05-14 19:41:34 +02:00
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~State();
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2019-04-23 00:50:56 +02:00
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2020-12-04 20:39:12 +01:00
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void ProcessExec(bool is_linear_);
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2019-05-14 19:40:05 +02:00
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void ProcessData(u32 data, bool is_last_call);
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2019-04-23 00:50:56 +02:00
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2022-01-29 22:00:49 +01:00
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/// Binds a rasterizer to this engine.
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void BindRasterizer(VideoCore::RasterizerInterface* rasterizer);
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2019-04-23 00:50:56 +02:00
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private:
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u32 write_offset = 0;
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u32 copy_size = 0;
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std::vector<u8> inner_buffer;
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2019-04-25 18:57:10 +02:00
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std::vector<u8> tmp_buffer;
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bool is_linear = false;
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Registers& regs;
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2019-04-23 00:50:56 +02:00
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MemoryManager& memory_manager;
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2022-01-29 22:00:49 +01:00
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VideoCore::RasterizerInterface* rasterizer = nullptr;
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2019-04-23 00:50:56 +02:00
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};
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} // namespace Tegra::Engines::Upload
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