2021-02-06 03:11:23 +01:00
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// Copyright 2021 yuzu Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#pragma once
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2021-02-08 06:54:35 +01:00
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#include <sirit/sirit.h>
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#include "common/common_types.h"
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2021-02-06 03:11:23 +01:00
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#include "shader_recompiler/frontend/ir/microinstruction.h"
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#include "shader_recompiler/frontend/ir/program.h"
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namespace Shader::Backend::SPIRV {
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2021-02-08 06:54:35 +01:00
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using Sirit::Id;
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class VectorTypes {
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public:
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void Define(Sirit::Module& sirit_ctx, Id base_type, std::string_view name) {
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defs[0] = sirit_ctx.Name(base_type, name);
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std::array<char, 6> def_name;
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for (int i = 1; i < 4; ++i) {
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const std::string_view def_name_view(
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def_name.data(),
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fmt::format_to_n(def_name.data(), def_name.size(), "{}x{}", name, i + 1).size);
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defs[i] = sirit_ctx.Name(sirit_ctx.TypeVector(base_type, i + 1), def_name_view);
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}
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}
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[[nodiscard]] Id operator[](size_t size) const noexcept {
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return defs[size - 1];
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}
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private:
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std::array<Id, 4> defs;
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};
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class EmitContext final : public Sirit::Module {
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public:
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explicit EmitContext(IR::Program& program);
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~EmitContext();
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[[nodiscard]] Id Def(const IR::Value& value) {
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if (!value.IsImmediate()) {
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2021-02-15 02:46:40 +01:00
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return value.Inst()->Definition<Id>();
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}
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switch (value.Type()) {
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2021-02-14 05:24:32 +01:00
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case IR::Type::U1:
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return value.U1() ? true_value : false_value;
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case IR::Type::U32:
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return Constant(u32[1], value.U32());
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case IR::Type::F32:
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return Constant(f32[1], value.F32());
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default:
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throw NotImplementedException("Immediate type {}", value.Type());
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}
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}
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[[nodiscard]] Id BlockLabel(IR::Block* block) const {
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const auto it{std::ranges::lower_bound(block_label_map, block, {},
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&std::pair<IR::Block*, Id>::first)};
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if (it == block_label_map.end()) {
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throw LogicError("Undefined block");
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}
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return it->second;
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}
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Id void_id{};
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Id u1{};
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VectorTypes f32;
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VectorTypes u32;
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VectorTypes f16;
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VectorTypes f64;
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2021-02-14 05:24:32 +01:00
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Id true_value{};
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Id false_value{};
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Id workgroup_id{};
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Id local_invocation_id{};
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private:
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std::vector<std::pair<IR::Block*, Id>> block_label_map;
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};
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class EmitSPIRV {
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public:
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explicit EmitSPIRV(IR::Program& program);
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private:
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void EmitInst(EmitContext& ctx, IR::Inst* inst);
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2021-02-06 03:11:23 +01:00
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// Microinstruction emitters
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Id EmitPhi(EmitContext& ctx, IR::Inst* inst);
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void EmitVoid(EmitContext& ctx);
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void EmitIdentity(EmitContext& ctx);
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void EmitBranch(EmitContext& ctx, IR::Inst* inst);
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void EmitBranchConditional(EmitContext& ctx, IR::Inst* inst);
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void EmitLoopMerge(EmitContext& ctx, IR::Inst* inst);
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void EmitSelectionMerge(EmitContext& ctx, IR::Inst* inst);
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void EmitReturn(EmitContext& ctx);
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void EmitGetRegister(EmitContext& ctx);
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void EmitSetRegister(EmitContext& ctx);
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void EmitGetPred(EmitContext& ctx);
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void EmitSetPred(EmitContext& ctx);
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void EmitSetGotoVariable(EmitContext& ctx);
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void EmitGetGotoVariable(EmitContext& ctx);
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Id EmitGetCbuf(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset);
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void EmitGetAttribute(EmitContext& ctx);
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void EmitSetAttribute(EmitContext& ctx);
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void EmitGetAttributeIndexed(EmitContext& ctx);
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void EmitSetAttributeIndexed(EmitContext& ctx);
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void EmitGetZFlag(EmitContext& ctx);
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void EmitGetSFlag(EmitContext& ctx);
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void EmitGetCFlag(EmitContext& ctx);
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void EmitGetOFlag(EmitContext& ctx);
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void EmitSetZFlag(EmitContext& ctx);
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void EmitSetSFlag(EmitContext& ctx);
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void EmitSetCFlag(EmitContext& ctx);
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void EmitSetOFlag(EmitContext& ctx);
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Id EmitWorkgroupId(EmitContext& ctx);
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Id EmitLocalInvocationId(EmitContext& ctx);
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Id EmitUndefU1(EmitContext& ctx);
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Id EmitUndefU8(EmitContext& ctx);
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Id EmitUndefU16(EmitContext& ctx);
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Id EmitUndefU32(EmitContext& ctx);
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Id EmitUndefU64(EmitContext& ctx);
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void EmitLoadGlobalU8(EmitContext& ctx);
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void EmitLoadGlobalS8(EmitContext& ctx);
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void EmitLoadGlobalU16(EmitContext& ctx);
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void EmitLoadGlobalS16(EmitContext& ctx);
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void EmitLoadGlobal32(EmitContext& ctx);
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void EmitLoadGlobal64(EmitContext& ctx);
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void EmitLoadGlobal128(EmitContext& ctx);
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void EmitWriteGlobalU8(EmitContext& ctx);
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void EmitWriteGlobalS8(EmitContext& ctx);
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void EmitWriteGlobalU16(EmitContext& ctx);
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void EmitWriteGlobalS16(EmitContext& ctx);
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void EmitWriteGlobal32(EmitContext& ctx);
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void EmitWriteGlobal64(EmitContext& ctx);
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void EmitWriteGlobal128(EmitContext& ctx);
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void EmitLoadStorageU8(EmitContext& ctx);
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void EmitLoadStorageS8(EmitContext& ctx);
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void EmitLoadStorageU16(EmitContext& ctx);
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void EmitLoadStorageS16(EmitContext& ctx);
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Id EmitLoadStorage32(EmitContext& ctx, const IR::Value& binding, const IR::Value& offset);
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void EmitLoadStorage64(EmitContext& ctx);
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void EmitLoadStorage128(EmitContext& ctx);
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void EmitWriteStorageU8(EmitContext& ctx);
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void EmitWriteStorageS8(EmitContext& ctx);
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void EmitWriteStorageU16(EmitContext& ctx);
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void EmitWriteStorageS16(EmitContext& ctx);
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void EmitWriteStorage32(EmitContext& ctx);
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void EmitWriteStorage64(EmitContext& ctx);
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void EmitWriteStorage128(EmitContext& ctx);
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void EmitCompositeConstructU32x2(EmitContext& ctx);
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void EmitCompositeConstructU32x3(EmitContext& ctx);
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void EmitCompositeConstructU32x4(EmitContext& ctx);
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void EmitCompositeExtractU32x2(EmitContext& ctx);
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Id EmitCompositeExtractU32x3(EmitContext& ctx, Id vector, u32 index);
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void EmitCompositeExtractU32x4(EmitContext& ctx);
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void EmitCompositeConstructF16x2(EmitContext& ctx);
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void EmitCompositeConstructF16x3(EmitContext& ctx);
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void EmitCompositeConstructF16x4(EmitContext& ctx);
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void EmitCompositeExtractF16x2(EmitContext& ctx);
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void EmitCompositeExtractF16x3(EmitContext& ctx);
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void EmitCompositeExtractF16x4(EmitContext& ctx);
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void EmitCompositeConstructF32x2(EmitContext& ctx);
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void EmitCompositeConstructF32x3(EmitContext& ctx);
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void EmitCompositeConstructF32x4(EmitContext& ctx);
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void EmitCompositeExtractF32x2(EmitContext& ctx);
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void EmitCompositeExtractF32x3(EmitContext& ctx);
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void EmitCompositeExtractF32x4(EmitContext& ctx);
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void EmitCompositeConstructF64x2(EmitContext& ctx);
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void EmitCompositeConstructF64x3(EmitContext& ctx);
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void EmitCompositeConstructF64x4(EmitContext& ctx);
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void EmitCompositeExtractF64x2(EmitContext& ctx);
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void EmitCompositeExtractF64x3(EmitContext& ctx);
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void EmitCompositeExtractF64x4(EmitContext& ctx);
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void EmitSelect8(EmitContext& ctx);
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void EmitSelect16(EmitContext& ctx);
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void EmitSelect32(EmitContext& ctx);
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void EmitSelect64(EmitContext& ctx);
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void EmitBitCastU16F16(EmitContext& ctx);
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Id EmitBitCastU32F32(EmitContext& ctx, Id value);
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void EmitBitCastU64F64(EmitContext& ctx);
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void EmitBitCastF16U16(EmitContext& ctx);
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Id EmitBitCastF32U32(EmitContext& ctx, Id value);
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void EmitBitCastF64U64(EmitContext& ctx);
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void EmitPackUint2x32(EmitContext& ctx);
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void EmitUnpackUint2x32(EmitContext& ctx);
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void EmitPackFloat2x16(EmitContext& ctx);
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void EmitUnpackFloat2x16(EmitContext& ctx);
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void EmitPackDouble2x32(EmitContext& ctx);
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void EmitUnpackDouble2x32(EmitContext& ctx);
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void EmitGetZeroFromOp(EmitContext& ctx);
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void EmitGetSignFromOp(EmitContext& ctx);
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void EmitGetCarryFromOp(EmitContext& ctx);
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void EmitGetOverflowFromOp(EmitContext& ctx);
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void EmitFPAbs16(EmitContext& ctx);
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void EmitFPAbs32(EmitContext& ctx);
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void EmitFPAbs64(EmitContext& ctx);
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Id EmitFPAdd16(EmitContext& ctx, IR::Inst* inst, Id a, Id b);
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Id EmitFPAdd32(EmitContext& ctx, IR::Inst* inst, Id a, Id b);
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Id EmitFPAdd64(EmitContext& ctx, IR::Inst* inst, Id a, Id b);
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Id EmitFPFma16(EmitContext& ctx, IR::Inst* inst, Id a, Id b, Id c);
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Id EmitFPFma32(EmitContext& ctx, IR::Inst* inst, Id a, Id b, Id c);
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Id EmitFPFma64(EmitContext& ctx, IR::Inst* inst, Id a, Id b, Id c);
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void EmitFPMax32(EmitContext& ctx);
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void EmitFPMax64(EmitContext& ctx);
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void EmitFPMin32(EmitContext& ctx);
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void EmitFPMin64(EmitContext& ctx);
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Id EmitFPMul16(EmitContext& ctx, IR::Inst* inst, Id a, Id b);
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Id EmitFPMul32(EmitContext& ctx, IR::Inst* inst, Id a, Id b);
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Id EmitFPMul64(EmitContext& ctx, IR::Inst* inst, Id a, Id b);
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void EmitFPNeg16(EmitContext& ctx);
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void EmitFPNeg32(EmitContext& ctx);
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void EmitFPNeg64(EmitContext& ctx);
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void EmitFPRecip32(EmitContext& ctx);
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void EmitFPRecip64(EmitContext& ctx);
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void EmitFPRecipSqrt32(EmitContext& ctx);
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void EmitFPRecipSqrt64(EmitContext& ctx);
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void EmitFPSqrt(EmitContext& ctx);
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void EmitFPSin(EmitContext& ctx);
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void EmitFPSinNotReduced(EmitContext& ctx);
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void EmitFPExp2(EmitContext& ctx);
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void EmitFPExp2NotReduced(EmitContext& ctx);
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void EmitFPCos(EmitContext& ctx);
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void EmitFPCosNotReduced(EmitContext& ctx);
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void EmitFPLog2(EmitContext& ctx);
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void EmitFPSaturate16(EmitContext& ctx);
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void EmitFPSaturate32(EmitContext& ctx);
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void EmitFPSaturate64(EmitContext& ctx);
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void EmitFPRoundEven16(EmitContext& ctx);
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void EmitFPRoundEven32(EmitContext& ctx);
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void EmitFPRoundEven64(EmitContext& ctx);
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void EmitFPFloor16(EmitContext& ctx);
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void EmitFPFloor32(EmitContext& ctx);
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void EmitFPFloor64(EmitContext& ctx);
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void EmitFPCeil16(EmitContext& ctx);
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void EmitFPCeil32(EmitContext& ctx);
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void EmitFPCeil64(EmitContext& ctx);
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void EmitFPTrunc16(EmitContext& ctx);
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void EmitFPTrunc32(EmitContext& ctx);
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void EmitFPTrunc64(EmitContext& ctx);
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Id EmitIAdd32(EmitContext& ctx, IR::Inst* inst, Id a, Id b);
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void EmitIAdd64(EmitContext& ctx);
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Id EmitISub32(EmitContext& ctx, Id a, Id b);
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void EmitISub64(EmitContext& ctx);
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Id EmitIMul32(EmitContext& ctx, Id a, Id b);
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void EmitINeg32(EmitContext& ctx);
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void EmitIAbs32(EmitContext& ctx);
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Id EmitShiftLeftLogical32(EmitContext& ctx, Id base, Id shift);
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void EmitShiftRightLogical32(EmitContext& ctx);
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void EmitShiftRightArithmetic32(EmitContext& ctx);
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void EmitBitwiseAnd32(EmitContext& ctx);
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void EmitBitwiseOr32(EmitContext& ctx);
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void EmitBitwiseXor32(EmitContext& ctx);
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void EmitBitFieldInsert(EmitContext& ctx);
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void EmitBitFieldSExtract(EmitContext& ctx);
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Id EmitBitFieldUExtract(EmitContext& ctx, Id base, Id offset, Id count);
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2021-02-15 00:15:42 +01:00
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Id EmitSLessThan(EmitContext& ctx, Id lhs, Id rhs);
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2021-02-08 06:54:35 +01:00
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void EmitULessThan(EmitContext& ctx);
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void EmitIEqual(EmitContext& ctx);
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void EmitSLessThanEqual(EmitContext& ctx);
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void EmitULessThanEqual(EmitContext& ctx);
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2021-02-15 00:15:42 +01:00
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Id EmitSGreaterThan(EmitContext& ctx, Id lhs, Id rhs);
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2021-02-08 06:54:35 +01:00
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void EmitUGreaterThan(EmitContext& ctx);
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void EmitINotEqual(EmitContext& ctx);
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void EmitSGreaterThanEqual(EmitContext& ctx);
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Id EmitUGreaterThanEqual(EmitContext& ctx, Id lhs, Id rhs);
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void EmitLogicalOr(EmitContext& ctx);
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void EmitLogicalAnd(EmitContext& ctx);
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void EmitLogicalXor(EmitContext& ctx);
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void EmitLogicalNot(EmitContext& ctx);
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void EmitConvertS16F16(EmitContext& ctx);
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void EmitConvertS16F32(EmitContext& ctx);
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void EmitConvertS16F64(EmitContext& ctx);
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void EmitConvertS32F16(EmitContext& ctx);
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void EmitConvertS32F32(EmitContext& ctx);
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void EmitConvertS32F64(EmitContext& ctx);
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void EmitConvertS64F16(EmitContext& ctx);
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void EmitConvertS64F32(EmitContext& ctx);
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void EmitConvertS64F64(EmitContext& ctx);
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void EmitConvertU16F16(EmitContext& ctx);
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void EmitConvertU16F32(EmitContext& ctx);
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void EmitConvertU16F64(EmitContext& ctx);
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void EmitConvertU32F16(EmitContext& ctx);
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void EmitConvertU32F32(EmitContext& ctx);
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void EmitConvertU32F64(EmitContext& ctx);
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void EmitConvertU64F16(EmitContext& ctx);
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void EmitConvertU64F32(EmitContext& ctx);
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void EmitConvertU64F64(EmitContext& ctx);
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void EmitConvertU64U32(EmitContext& ctx);
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void EmitConvertU32U64(EmitContext& ctx);
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2021-02-06 03:11:23 +01:00
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};
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} // namespace Shader::Backend::SPIRV
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