mirror of
https://git.suyu.dev/suyu/suyu.git
synced 2024-11-16 03:42:47 +01:00
106 lines
3.1 KiB
C++
106 lines
3.1 KiB
C++
|
// Copyright 2021 yuzu Emulator Project
|
||
|
// Licensed under GPLv2 or any later version
|
||
|
// Refer to the license.txt file included.
|
||
|
|
||
|
#include "shader_recompiler/backend/spirv/emit_spirv.h"
|
||
|
|
||
|
namespace Shader::Backend::SPIRV {
|
||
|
|
||
|
void EmitSPIRV::EmitCompositeConstructU32x2(EmitContext&) {
|
||
|
throw NotImplementedException("SPIR-V Instruction");
|
||
|
}
|
||
|
|
||
|
void EmitSPIRV::EmitCompositeConstructU32x3(EmitContext&) {
|
||
|
throw NotImplementedException("SPIR-V Instruction");
|
||
|
}
|
||
|
|
||
|
void EmitSPIRV::EmitCompositeConstructU32x4(EmitContext&) {
|
||
|
throw NotImplementedException("SPIR-V Instruction");
|
||
|
}
|
||
|
|
||
|
void EmitSPIRV::EmitCompositeExtractU32x2(EmitContext&) {
|
||
|
throw NotImplementedException("SPIR-V Instruction");
|
||
|
}
|
||
|
|
||
|
Id EmitSPIRV::EmitCompositeExtractU32x3(EmitContext& ctx, Id vector, u32 index) {
|
||
|
return ctx.OpCompositeExtract(ctx.u32[1], vector, index);
|
||
|
}
|
||
|
|
||
|
void EmitSPIRV::EmitCompositeExtractU32x4(EmitContext&) {
|
||
|
throw NotImplementedException("SPIR-V Instruction");
|
||
|
}
|
||
|
|
||
|
void EmitSPIRV::EmitCompositeConstructF16x2(EmitContext&) {
|
||
|
throw NotImplementedException("SPIR-V Instruction");
|
||
|
}
|
||
|
|
||
|
void EmitSPIRV::EmitCompositeConstructF16x3(EmitContext&) {
|
||
|
throw NotImplementedException("SPIR-V Instruction");
|
||
|
}
|
||
|
|
||
|
void EmitSPIRV::EmitCompositeConstructF16x4(EmitContext&) {
|
||
|
throw NotImplementedException("SPIR-V Instruction");
|
||
|
}
|
||
|
|
||
|
void EmitSPIRV::EmitCompositeExtractF16x2(EmitContext&) {
|
||
|
throw NotImplementedException("SPIR-V Instruction");
|
||
|
}
|
||
|
|
||
|
void EmitSPIRV::EmitCompositeExtractF16x3(EmitContext&) {
|
||
|
throw NotImplementedException("SPIR-V Instruction");
|
||
|
}
|
||
|
|
||
|
void EmitSPIRV::EmitCompositeExtractF16x4(EmitContext&) {
|
||
|
throw NotImplementedException("SPIR-V Instruction");
|
||
|
}
|
||
|
|
||
|
void EmitSPIRV::EmitCompositeConstructF32x2(EmitContext&) {
|
||
|
throw NotImplementedException("SPIR-V Instruction");
|
||
|
}
|
||
|
|
||
|
void EmitSPIRV::EmitCompositeConstructF32x3(EmitContext&) {
|
||
|
throw NotImplementedException("SPIR-V Instruction");
|
||
|
}
|
||
|
|
||
|
void EmitSPIRV::EmitCompositeConstructF32x4(EmitContext&) {
|
||
|
throw NotImplementedException("SPIR-V Instruction");
|
||
|
}
|
||
|
|
||
|
void EmitSPIRV::EmitCompositeExtractF32x2(EmitContext&) {
|
||
|
throw NotImplementedException("SPIR-V Instruction");
|
||
|
}
|
||
|
|
||
|
void EmitSPIRV::EmitCompositeExtractF32x3(EmitContext&) {
|
||
|
throw NotImplementedException("SPIR-V Instruction");
|
||
|
}
|
||
|
|
||
|
void EmitSPIRV::EmitCompositeExtractF32x4(EmitContext&) {
|
||
|
throw NotImplementedException("SPIR-V Instruction");
|
||
|
}
|
||
|
|
||
|
void EmitSPIRV::EmitCompositeConstructF64x2(EmitContext&) {
|
||
|
throw NotImplementedException("SPIR-V Instruction");
|
||
|
}
|
||
|
|
||
|
void EmitSPIRV::EmitCompositeConstructF64x3(EmitContext&) {
|
||
|
throw NotImplementedException("SPIR-V Instruction");
|
||
|
}
|
||
|
|
||
|
void EmitSPIRV::EmitCompositeConstructF64x4(EmitContext&) {
|
||
|
throw NotImplementedException("SPIR-V Instruction");
|
||
|
}
|
||
|
|
||
|
void EmitSPIRV::EmitCompositeExtractF64x2(EmitContext&) {
|
||
|
throw NotImplementedException("SPIR-V Instruction");
|
||
|
}
|
||
|
|
||
|
void EmitSPIRV::EmitCompositeExtractF64x3(EmitContext&) {
|
||
|
throw NotImplementedException("SPIR-V Instruction");
|
||
|
}
|
||
|
|
||
|
void EmitSPIRV::EmitCompositeExtractF64x4(EmitContext&) {
|
||
|
throw NotImplementedException("SPIR-V Instruction");
|
||
|
}
|
||
|
|
||
|
} // namespace Shader::Backend::SPIRV
|