2022-04-28 18:24:11 +02:00
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// SPDX-FileCopyrightText: Ryujinx Team and Contributors
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// SPDX-License-Identifier: MIT
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2020-10-27 04:07:36 +01:00
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2021-01-15 08:02:57 +01:00
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#include <bit>
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2024-03-08 23:44:03 +01:00
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#include "common/thread.h"
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#include "core/core.h"
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2020-10-27 04:07:36 +01:00
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#include "video_core/cdma_pusher.h"
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#include "video_core/engines/maxwell_3d.h"
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2022-01-30 10:31:13 +01:00
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#include "video_core/host1x/control.h"
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2022-01-30 22:26:01 +01:00
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#include "video_core/host1x/host1x.h"
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2022-01-30 10:31:13 +01:00
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#include "video_core/host1x/nvdec.h"
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#include "video_core/host1x/nvdec_common.h"
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#include "video_core/host1x/vic.h"
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#include "video_core/memory_manager.h"
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namespace Tegra {
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CDmaPusher::CDmaPusher(Host1x::Host1x& host1x_, s32 id)
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: host1x{host1x_}, memory_manager{host1x.GMMU()},
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2024-03-16 01:05:43 +01:00
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host_processor{std::make_unique<Host1x::Control>(host1x_)}, current_class{
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static_cast<ChClassId>(id)} {
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thread = std::jthread([this](std::stop_token stop_token) { ProcessEntries(stop_token); });
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}
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CDmaPusher::~CDmaPusher() = default;
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2024-03-08 23:44:03 +01:00
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void CDmaPusher::ProcessEntries(std::stop_token stop_token) {
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Common::SetCurrentThreadPriority(Common::ThreadPriority::High);
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ChCommandHeaderList command_list{host1x.System().ApplicationMemory(), 0, 0};
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u32 count{};
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u32 method_offset{};
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u32 mask{};
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bool incrementing{};
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while (!stop_token.stop_requested()) {
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{
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std::unique_lock l{command_mutex};
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Common::CondvarWait(command_cv, l, stop_token,
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[this]() { return command_lists.size() > 0; });
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if (stop_token.stop_requested()) {
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return;
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2020-10-27 04:07:36 +01:00
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}
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command_list = std::move(command_lists.front());
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command_lists.pop_front();
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}
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size_t i = 0;
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for (const auto value : command_list) {
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i++;
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if (mask != 0) {
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const auto lbs = static_cast<u32>(std::countr_zero(mask));
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mask &= ~(1U << lbs);
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ExecuteCommand(method_offset + lbs, value.raw);
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continue;
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} else if (count != 0) {
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--count;
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ExecuteCommand(method_offset, value.raw);
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if (incrementing) {
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++method_offset;
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}
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continue;
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}
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const auto mode = value.submission_mode.Value();
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switch (mode) {
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case ChSubmissionMode::SetClass: {
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mask = value.value & 0x3f;
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method_offset = value.method_offset;
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current_class = static_cast<ChClassId>((value.value >> 6) & 0x3ff);
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break;
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}
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case ChSubmissionMode::Incrementing:
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case ChSubmissionMode::NonIncrementing:
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count = value.value;
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method_offset = value.method_offset;
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incrementing = mode == ChSubmissionMode::Incrementing;
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break;
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case ChSubmissionMode::Mask:
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mask = value.value;
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method_offset = value.method_offset;
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break;
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case ChSubmissionMode::Immediate: {
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const u32 data = value.value & 0xfff;
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method_offset = value.method_offset;
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ExecuteCommand(method_offset, data);
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break;
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}
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default:
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LOG_ERROR(HW_GPU, "Bad command at index {} (bytes 0x{:X}), buffer size {}", i - 1,
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(i - 1) * sizeof(u32), command_list.size());
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UNIMPLEMENTED_MSG("ChSubmission mode {} is not implemented!",
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static_cast<u32>(mode));
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break;
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}
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2020-10-27 04:07:36 +01:00
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}
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}
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}
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void CDmaPusher::ExecuteCommand(u32 method, u32 arg) {
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switch (current_class) {
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case ChClassId::Control:
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LOG_TRACE(Service_NVDRV, "Class {} method 0x{:X} arg 0x{:X}",
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static_cast<u32>(current_class), method, arg);
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host_processor->ProcessMethod(static_cast<Host1x::Control::Method>(method), arg);
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break;
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default:
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thi_regs.reg_array[method] = arg;
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switch (static_cast<ThiMethod>(method)) {
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case ThiMethod::IncSyncpt: {
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const auto syncpoint_id = static_cast<u32>(arg & 0xFF);
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[[maybe_unused]] const auto cond = static_cast<u32>((arg >> 8) & 0xFF);
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LOG_TRACE(Service_NVDRV, "Class {} IncSyncpt Method, syncpt {} cond {}",
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static_cast<u32>(current_class), syncpoint_id, cond);
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auto& syncpoint_manager = host1x.GetSyncpointManager();
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syncpoint_manager.IncrementGuest(syncpoint_id);
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syncpoint_manager.IncrementHost(syncpoint_id);
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break;
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}
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case ThiMethod::SetMethod1:
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LOG_TRACE(Service_NVDRV, "Class {} method 0x{:X} arg 0x{:X}",
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static_cast<u32>(current_class), static_cast<u32>(thi_regs.method_0), arg);
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ProcessMethod(thi_regs.method_0, arg);
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2020-10-27 04:07:36 +01:00
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break;
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default:
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break;
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}
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}
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}
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} // namespace Tegra
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