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shader: Teach global memory base tracker to follow vectors
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parent
97e80dda55
commit
04ef2160f9
1 changed files with 14 additions and 15 deletions
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@ -253,12 +253,12 @@ struct LowAddrInfo {
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/// Tries to track the first 32-bits of a global memory instruction
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/// Tries to track the first 32-bits of a global memory instruction
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std::optional<LowAddrInfo> TrackLowAddress(IR::Inst* inst) {
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std::optional<LowAddrInfo> TrackLowAddress(IR::Inst* inst) {
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// The first argument is the low level GPU pointer to the global memory instruction
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// The first argument is the low level GPU pointer to the global memory instruction
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const IR::U64 addr{inst->Arg(0)};
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const IR::Value addr{inst->Arg(0)};
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if (addr.IsImmediate()) {
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if (addr.IsImmediate()) {
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// Not much we can do if it's an immediate
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// Not much we can do if it's an immediate
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return std::nullopt;
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return std::nullopt;
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}
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}
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// This address is expected to either be a PackUint2x32 or a IAdd64
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// This address is expected to either be a PackUint2x32, a IAdd64, or a CompositeConstructU32x2
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IR::Inst* addr_inst{addr.InstRecursive()};
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IR::Inst* addr_inst{addr.InstRecursive()};
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s32 imm_offset{0};
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s32 imm_offset{0};
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if (addr_inst->GetOpcode() == IR::Opcode::IAdd64) {
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if (addr_inst->GetOpcode() == IR::Opcode::IAdd64) {
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@ -274,25 +274,24 @@ std::optional<LowAddrInfo> TrackLowAddress(IR::Inst* inst) {
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if (iadd_addr.IsImmediate()) {
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if (iadd_addr.IsImmediate()) {
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return std::nullopt;
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return std::nullopt;
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}
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}
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addr_inst = iadd_addr.Inst();
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addr_inst = iadd_addr.InstRecursive();
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}
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// With IAdd64 handled, now PackUint2x32 is expected without exceptions
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if (addr_inst->GetOpcode() != IR::Opcode::PackUint2x32) {
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return std::nullopt;
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}
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}
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// With IAdd64 handled, now PackUint2x32 is expected
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if (addr_inst->GetOpcode() == IR::Opcode::PackUint2x32) {
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// PackUint2x32 is expected to be generated from a vector
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// PackUint2x32 is expected to be generated from a vector
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const IR::Value vector{addr_inst->Arg(0)};
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const IR::Value vector{addr_inst->Arg(0)};
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if (vector.IsImmediate()) {
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if (vector.IsImmediate()) {
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return std::nullopt;
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return std::nullopt;
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}
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}
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// This vector is expected to be a CompositeConstructU32x2
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addr_inst = vector.InstRecursive();
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IR::Inst* const vector_inst{vector.InstRecursive()};
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}
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if (vector_inst->GetOpcode() != IR::Opcode::CompositeConstructU32x2) {
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// The vector is expected to be a CompositeConstructU32x2
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if (addr_inst->GetOpcode() != IR::Opcode::CompositeConstructU32x2) {
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return std::nullopt;
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return std::nullopt;
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}
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}
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// Grab the first argument from the CompositeConstructU32x2, this is the low address.
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// Grab the first argument from the CompositeConstructU32x2, this is the low address.
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return LowAddrInfo{
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return LowAddrInfo{
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.value{IR::U32{vector_inst->Arg(0)}},
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.value{IR::U32{addr_inst->Arg(0)}},
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.imm_offset = imm_offset,
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.imm_offset = imm_offset,
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};
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};
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}
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}
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